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Oxide-based thin-film transistors (TFTs) with a lateral in-plane electrode are self-assembled on paper substrates, and the electrical modulation effect of the in-plane electrode is investigated. A \SiO2-based solid-electrolyte film with high specific capacitance is used as the gate dielectric, and the operation voltage is reduced to less than 2.0 V. The threshold voltage (Vth) of such paper TFTs is tuned from -0.98 to 0.94 V by different voltage biases on the in-plane electrode. The threshold voltage shift (\Delta Vth) can be described by \Delta Vth = -(CG2/CG1)VG2, where CG2 and CG1 are the in-plane electrode and bottom-gate specific capacitance values. High electrical performance with a current on/off ratio of \6 \times \10^5 \sim \10^6, a subthreshold swing of 0.14 \sim 0.19 V/dec, and a mobility of \8.64 \sim \9.45\ \cm^2/\V\cdot \s is obtained at different in-plane electrode voltage biases. Such low-voltage paper TFTs are promising for low-cost and portable electronics. [ABSTRACT FROM PUBLISHER]

An electrophoretic display (EPD) cell with a triple-layered microcavity structure was fabricated using a convenient dry film resist. The inherent structural advantage arising from the function of the middle channel layer as a background colored state enabled the EPD to operate with two different-colored states by using a single type of electronic-ink particles, thereby eliminating the possible agglomeration of oppositely charged ink particles and supporting the potential application of the proposed structure to color the electronic paper. The preliminary operation of this new EPD structure was demonstrated as white and blue display states on a rigid glass exhibiting a contrast ratio of 1.5 : 1 with saturation voltages of +30 and -30 V, respectively. Successful demonstrations on both the indium–tin–oxide-patterned glass and flexible polyethylene substrates are also provided. [ABSTRACT FROM AUTHOR]

In this paper, a microfluidic device is introduced based on direct current (dc) dielectrophoresis for the separation of circulating tumor cells from normal blood cells. Differential sidewall electrodes are designed inside the channel and two middle-channel outlets are located after the end of the electrodes, which are assigned to collect the normal blood cells. A maximum dc potential of 3 V is applied to the electrodes, resulting in a differential dielectrophoretic forces acting on the cells. This paper involves isolating MCF-7 breast cancer cells from white blood cells (WBCs) and red blood cells (RBCs), eliminating the demand for primary RBC lysis. Numerical simulation results revealed that the differential electrodes not only suppressed successfully the need for high applied voltages by dc dielectrophoresis but also diminished the joule heating effects. Besides that, the arrangement of the differential electrodes was observed to play a critical role in the separation performance. In particular, designing the outlets, as well as adjusting the electrode potentials, has effectively assisted the device to be tunable for different cancer cells even with different radii. More strikingly, the ability of the device to deflect the waste cells (WBCs and RBCs) to out of the microchannel prior to the cancer cells was proven to positively affect the separation efficiency and purity. The proposed device was capable of separating different cells leveraging various diameters with capture purity and efficiency of higher than 83% and 100%, respectively. [ABSTRACT FROM AUTHOR]

Photodetectors (PDs) based on organic–inorganic hybrid materials such as graphene and perovskites have recently emerged at the forefront of the research in optoelectronic devices. Despite the remarkable progress in the performance of optoelectronic devices based on hybrid materials, some aspects such as stability have so far not been thoroughly addressed. This paper serves to demonstrate a fully inkjet-printed PD fabricated by hybrid perovskite (CH3NH3PbClx-3I3) layer between the two graphene electrodes as graphene/perovskite/graphene (GPG) heterostructure. The fully inkjet-printed GPG PD is found to be effective for the visible light region, which can be attributed by the high uniformity and low defects of the printed materials. Thus, the GPG PD achieves a high responsivity of 0.53 A/W. Fully inkjet-printed hybrid perovskite PD demonstrated in this paper unveils the facile, potentially large-scale and cost-effective methods for fabrication of hybrid perovskites-based optoelectronic devices, including PDs and solar cells. [ABSTRACT FROM AUTHOR]

In this paper, a novel vertical phototransistor was reported and compared with planar phototransistors for the first time. As compared with the planar phototransistors, the vertical ones exhibited much better photoelectric performance, which is attributed to an ultrashort photo-generated holes transfer distance and a stronger excitons dissociating electrical field due to their ultrashort channel length (tens of nanometers). Moreover, in order to examine the transport and trapping of different carrier charges separately, the impact of [6,6]-phenyl C61-butyric acid methyl ester (PCBM) dopant on the performance of planar and vertical phototransistors was investigated. The vertical devices exhibited an ultrahigh responsivity (~6600 A/W) as well as an excellent detectivity ($\sim 7\times 10^{15}~\text{Jones}$) and a fast photoresponse (rise time of 0.28 s), whereas slight changes were observed in the planar ones with doping of PCBM. The high performance of the blend vertical phototransistors is due to the trapping of the photo-generated electrons with PCBM and the effective transport of holes due to the ultrashort channel length. This paper provided a promising pathway for low-cost, high-performance phototransistors. [ABSTRACT FROM AUTHOR]

The instability of amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs) under ultraviolet (UV) light was thoroughly investigated in this paper. Unlike in a darkened state, an off-state leakage current can be found in the dual-sweep I–V transfer curve of a-IGZO TFTs under UV light illumination. Furthermore, despite the same UV light condition, the forward sweep and reverse sweep show different I–V curves, representing two different physical mechanisms. First, the subthreshold swing degradation and threshold voltage shift to the negative direction in the forward sweep are due to the total channel barrier lowering and can be confirmed by changing the light exposure region. Second, in the reverse sweep, the suggested back-channel leakage current can be controlled by dual-gate TFTs. UV light exposure of the metal–insulator–semiconductor–metal structure verifies that the off-state leakage current passes through the back channel in a reverse sweep. Finally, the physical mechanism links between forward and reverse sweeps have comprehensive interpretation in this paper. [ABSTRACT FROM AUTHOR]

In this paper, an enhanced compact model of multiwalled carbon nanotube (MWCNT) interconnects while considering defects and contact resistance is proposed. Based on the atomistic-level simulations, we have found that defect densities impact MWCNT resistance and ultimately their electrical performance. Furthermore, we have computed by atomistic-level simulations, the end-contact resistance between single-wall carbon nanotube and palladium (Pd) electrode to mimic the Pd–CNT end-contact resistance of each CNT shell in MWCNT. We have developed an advanced shell-by-shell model to include various parameters, such as shell diameter, shell chirality, defects on each shell, and connectivity of each shell to end contacts. We run Monte Carlo simulations to perform variability studies on each of these parameters to understand the electrical performance variation on MWCNT interconnects. We present the simulation results to convey the critical impact of variations. The impact of doping on MWCNT variability in the form of Fermi level shift will be addressed in Part II of this paper. [ABSTRACT FROM AUTHOR]

The introduction of metal nanocrystals (NCs) has been confirmed to improve electrical uniformity of oxide-based resistive random access memory (RRAM) devices significantly; however, the current reports do not systematically elucidate the relationship between the size/distribution of NCs and the electrical uniformity of RRAM devices. In this paper, we focused on the impact of metal NCs size and areal density on the resistive switching (RS) performances of oxide RRAM by atomic layer deposition (ALD) based on the experimental results and theoretical calculation. The dependence of ALD cycles of 50–130 during Pt or CoPtx NCs growth on the RS parameters of Al2O3 or HfO2 memory units has been evaluated systematically. The RRAM embedded Pt or CoPtx NCs shows the trends: with increasing ALD cycles, the forming voltage, set/reset voltage, the resistance in off and on state, and ${R}_{ \mathrm{\scriptscriptstyle OFF}}/{R}_{ \mathrm{\scriptscriptstyle ON}}$ ratio entirely first decrease, then flatten, and increase later with a minimum value at about 100 cycles. Although all metal NCs with various sizes enhance the electric field strength compared to at the planar region, only metal NCs with proper NCs size and areal density (9 nm/6– $10\times 10^{\textsf {11}}$ /cm2 in this paper) can effectively produce stronger localized electric field at the tip of metal NCs, leading to optimal RS behavior. [ABSTRACT FROM AUTHOR]

In this paper of thermoelectric generators, metals are used as the prospective thermoelectric materials or thermoelements on flexible copper (Cu)-clad polyimide substrate. The fabricated thick film generators have planar and lateral structures with lateral heat flow and lateral thermopile layout. Hereby, two prototypes of thermoelectric generators are made, the first employing Cu and nickel (Ni) and the second Cu and cobalt (Co) as their positive and negative thermoelements, respectively. This paper also investigates the roles of geometrical structures such as the thermoleg’s length and width and the generator’s size in promoting elevated thermoelectric power generation. Consequently, the highest performing thermoleg designs (length: 5–20 mm; width: 100– $1000~\mu \text{m}$) for the two prototypes are identified as having a length, width, and thickness of 5 mm, $1000~\mu \text{m}$ , and $31~\mu \text{m}$ , respectively, with generator dimensions of 1.1 cm length and 4.3 cm width. Collectively, this design has an accumulated average temperature difference, output power density, and thermoelectric efficiency factor of 60 K, $0.59~\mu $ Wcm−2, and $1.64\times 10^{-\textsf {4}}\,\,\mu $ Wcm−2K−2, respectively, for the Cu–Ni generator, while the corresponding values for the Cu–Co generator are 64 K, $1.15~\mu $ Wcm−2, and $2.81\times 10^{-\textsf {4}}\,\,\mu $ Wcm−2K−2. An improvement factor of 1.71 is realized by the Cu–Co generator compared to the Cu–Ni one due to its larger Seebeck coefficient and figure of merit. This highlights the Cu–Co metallic couple as an encouraging thermoelement in thermoelectricity. Promisingly, the thick film and lateral device structures are more compatible and favorable for metal-based thermoelectric generators. [ABSTRACT FROM AUTHOR]

With the development of novel device applications, e.g., in the field of Internet of Things or point-of-care personalized diagnostic systems, came an increased demand for MESFETs for fast and low-power consumption integrated circuits and active-matrix displays. In this paper, we present fabrication and characterization of transparent Ru–Si–O/In–Ga–Zn–O MESFETs on flexible substrates. The use of transparent conducting oxide, namely, Ru–Si–O, as Schottky gate electrode, allows for processing the devices at room temperature, enabling the utilization of such low-temperature substrates as polyethylene terephthalate foil and paper. It was shown that tuning the device geometry allows realization of transistors providing on-current up to 2 mA, while the highest on-to-off current ratio equals 2\times 10^\mathrm 5 , with off-current below 1 nA, carrier mobility in the channel exceeds 9 cm ^\mathrm 2\cdot \textV^\mathrm -1\cdot \texts^\mathrm -1 , and subthreshold swing is below 250 mV $\cdot $ decade ^{\mathrm { {-1}}} . [ABSTRACT FROM PUBLISHER]

This paper presents a ternary content-addressable memory (TCAM) cell based on a skewed straintronic magnetotunneling junction (MTJ) switch. A straintronic magnetotunneling junction (s-MTJ) is a three-terminal switch, where the resistance between two of the terminals switches when a potential is applied to the third (gate) terminal that induces strain in the magnetostrictive free-layer. An s-MTJ is a highly energy-efficient switch that would dissipate only ~aJ of energy during switching. This paper discusses a novel variant of s-MTJ, namely skewed s-MTJ (ss-MTJ), where the MTJ switching can be controlled by two gate terminals. The current through an ss-MTJ is minimum when the potentials at the first and second gate terminals ( V2 and V3 , respectively) obey the relation V3 = V2+VF . Here, VF is a fixed voltage (“offset voltage”). Current in an ss-MTJ increases steeply when V2 and V3 deviate from the above “match” condition. This unconventional I – V characteristic of an ss-MTJ is exploited to design a non-Boolean TCAM cell based on just one transistor, one trench capacitor, and one ss-MTJ. We also discuss search and write operations in the ss-MTJ-TCAM cell, and show that the cell requires very small voltages to operate because of the unique I – V characteristics of the ss-MTJ. [ABSTRACT FROM PUBLISHER]

Recently, 2-D cross-point array of resistive random access memory (RRAM) has been proposed for implementing the weighted sum and weight update operations to accelerate the neuro-inspired learning algorithms on chip. This paper aims to extend such 2-D cross-point array to 3-D vertical array for storing and computing the large-scale weight matrices in the neural network. Considering the fabrication and 3-D integration of analog synapses (i.e., multilevel RRAM devices) are premature at this stage, we propose using today’s available digital or binary RRAM devices for implementing a ternary neural network, which aggressively reduces the weight precision to ternary levels (+1, 0,−1) for the weighted sum in both feedforward and backward inference, while the multiple 3-D layers could serve for accumulating the small errors in a higher precision format for weight update. Compared to the 2-D implementation, the proposed 3-D vertical implementation shows larger read/write margin for weighted sum/weight update, smaller latency, and energy consumption for weight update. This paper demonstrates the attractiveness for building a monolithic 3-D neuromorphic hardware platform. [ABSTRACT FROM PUBLISHER]

Direct conversion crystalline silicon X-ray imagers are used for low-energy X-ray photon (4–20 keV) detection in scientific research applications such as protein crystallography. In this paper, we demonstrate a novel pixel architecture that integrates a crystalline silicon X-ray detector with a thin-film transistor amorphous silicon pixel readout circuit. We describe a simplified two-mask process to fabricate a complete imaging array and present preliminary results that show the fabricated pixel to be sensitive to 5.89-keV photons from a low activity Fe-55 gamma source. This paper presented can expedite the development of high spatial resolution, low cost, direct conversion imagers for X-ray diffraction and crystallography applications. [ABSTRACT FROM PUBLISHER]

This paper addresses the design challenges of simulating the 3-D vertical-resistive random access memory (V-RRAM) toward MB-level. The interconnect IR drop and sneak paths are known to be the limiting factors for building large-scale V-RRAM arrays. The previous approach to evaluate the write/read margin of V-RRAM was based on the exhaustive SPICE simulations, which prohibits the design exploration to MB-level as it takes huge amount of computation resources. In this paper, a quasi-analytical model is proposed, which aims to reduce the simulation time and the required memory usage. Through the validation with the SPICE simulation results, the proposed model shows a similar accuracy. Based on the proposed quasi-analytical model, the worst case data pattern of 3-D V-RRAM with large array size up to 4 MB is analyzed. The results show that it is more efficient to increase the number of stack layers than expanding the horizontal array size to achieve large subarray size. [ABSTRACT FROM AUTHOR]

This paper studies on the RF MEMS switch based on flexible liquid crystal polymer (LCP) substrate and the influence of the LCP substrate bending characteristics on mechanical properties of the switch. Due to the excellent properties of flexible LCP materials, RF MEMS devices based on LCP substrates will be very suitable for microwave systems with high space requirements and wearable devices. Obviously, the deformation of flexible substrate will affect the performance of RF MEMS switch. Therefore, this paper proposes a modeling of the substrate bending to analyze it. The experimental results of the fabricated switches show that the pull-in voltage of the switch is $\sim 22$ V, the insertion loss is better than −0.6 dB, the isolation is better than −15 dB, and the return loss is better than −18 dB up to 20 GHz. According to the experiments, we can find that when the curvature of the substrate is increased from zero to 22.2 (1/m), then the measured pull-in voltage is increased from 22.1 to 23.9 V and when the curvature of the substrate is increased from 22.2 to 44.2 (1/m), then the measured pull-in voltage is decreased from 23.9 to 18.9 V. In conclusion, with the increase of substrate curvature, the switch pull-in voltage will increase at first and then decrease. The experimental results are in good agreement with the modeling. [ABSTRACT FROM AUTHOR]

3D printing offers a novel, time-efficient, and multi-material fabrication platform for numerous applications owing to its potential to rapidly manufacture low-cost and 3D printed (3DP) structures. In this paper, polylactic acid (PLA) and conductive composite graphene/PLA filaments were used to fabricate 3DP microchannels and electrodes intended for enzymatic biofuel cells (EBFCs) using a commercial bench-top 3D printer. This 3D printing technology delivers a simplistic, cost-effective, and quick fabrication process, which eliminates the requirement of any further amendment and post-processing. With this technology, we demonstrate structurally simple, miniature 3DP microfluidic membraneless EBFCs (3DP-MM-EBFCs), served with glucose and oxygen with the utilization of redox mediators generating continuous power. The cell performance was evaluated at different flow rates, obtaining open circuit potential (OCP) 0.425 V and maximum peak power density (PD) $4.15~\mu \text{W}$ /cm2 at a current density (CD) of $13.36~\mu \text{A}$ /cm2. The advancement in 3DP electrode surface characteristic and the dimethylformamide (DMF) treatment is carried onto the electrode surface followed by the immobilization of the enzymes individually. The 3DP fabrication technology demonstrated the feasibility of simple and advanced microfabrication techniques to build a well-organized plug-and-play and rapidly analyzed device to power several portable low-power devices. [ABSTRACT FROM AUTHOR]

In this paper, metallic thermoelectric generators were studied and fabricated using copper (Cu) and cobalt (Co) as their respective positive and negative thermoelements. Thus, the chosen Cu-clad polyimide substrate alleviated the deposition of Cu and eased the microfabrication. A lateral device structure might assist in generating larger output power through its longer thermoleg length. Hence, the fabricated thick-film devices had planar and lateral structures with lateral heat flow and lateral thermopile layout. The strong correlations of electrical and thermal conductivities in metal thermoelements have resulted in lower Seebeck coefficient along with reduced thermoelectric power-generating performances. Alternatively, a thermoleg cross-sectional area (${A}$) optimization approach may optimize these disrupting correlations and improve their power-generating effectiveness, whereas a sandwiched planar structure can allow more thermopiles to be integrated without influencing the generator’s size. Both A optimization and sandwiched planar structure have rarely been applied and studied in the past works and have never been implemented using metal thermoelements. Hereafter, a Cu–Co device was enhanced through ${A}$ optimization by increasing the thickness of Co over 3.86 times the Cu thickness, and the implementations of a sandwiched planar structure. Herein, a flexible sandwiched planar thermoelectric generator was fabricated for the first time, using simpler microfabrication. This enhanced Cu–Co generator achieved a thermoelectric efficiency factor of ${6.6} \times {10}^{-{3}}\,\,\mu $ Wcm−2K−2($12.89~\mu $ Wcm−2) at a temperature difference of 44.2 K. It remarked 3.1 times of improvement (by stacking three sets of thermopile) than its similar single Cu–Co thermopile of ten thermocouples. [ABSTRACT FROM AUTHOR]

The rapid sintering of printable metal nanoparticle inks is vital for the industrial mass production of electronic devices. In this paper, we report a rapid laser annealing method for printed Ag nanoparticle-based inks. We also fabricate Ag circuits and organic thin-film transistors (OTFTs) on flexible plastic substrates through spontaneous patterning under deep ultraviolet (DUV) exposure. Compared to the conventional thermal annealing, laser annealing significantly reduces the processing time from 3600 to 10 s while preventing damage caused by excessive heat. The OTFT with laser-annealed Ag source/drain electrodes achieved good performance with saturated mobility of 1.68 cm $^{{2}}\cdot \text{V}^{-{1}}\cdot \text{s}^{-{1}}$ , high-reliability factor of 86.75%, and large saturated drain current resulting from the small channel resistance. This rapid laser annealing method is feasible for printing flexible electronics using metal nanoparticle-based inks in industrial mass production. [ABSTRACT FROM AUTHOR]

Thin-film transistors (TFTs) fabricated using solution-processed zinc–tin-oxide (ZTO) semiconductor thin films as the channel layers are proposed in this paper. Effect of the ZTO annealing temperature on the TFT performance is studied. Significant reduction of oxygen-vacancy and chlorine residue contents in the ZTO semiconductor can be obtained when the annealing temperatures are 500 °C–700 °C. The ZTO semiconductor with the annealing process at 600 °C in air can give an optimal ZTO TFT having a low leakage current of 10−12 A and a high ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ ratio of 3 $\times \,\,10^{7}$. The subthreshold swing is 0.39 V/decade corresponding to an interface trap density of $1.2\times \,\,10^{12}\,\,$ cm−2eV−1. [ABSTRACT FROM AUTHOR]

In this paper, we propose a novel technique to overcome the conductance limitation in metal contacted single-walled carbon nanotubes (SWNTs)-based devices using metal nanoparticles (MNPs). Schottky barrier (SB) height at metal-SWNTs contact is believed to be the major contributor for this conductance limitation. Metal contacts with SWNTs are fabricated on a thermally grown SiO2/Si substrate using a conventional lithography process. The SWNTs are aligned between the metal electrodes using dielectrophoresis method. MNPs are introduced in the device using a small drop of MNP suspension to decorate the SWNTs. It is observed that the introduction of MNPs in the device reduces the SB height significantly. We found 0.34 eV reduction in SB height with silver (Ag) nanoparticles (NPs) and 0.15 eV with gold (Au) NPs. The proposed technique has improved the conductance in decorated SWNTs four times for Ag and Au NPs as compared to the bare SWNTs. Improvement in the conductance behavior of the SWNTs using MNPs enhances the sensitivity and switching speed of the devices, therefore, make it a promising alternative to silicon-based devices. [ABSTRACT FROM AUTHOR]

In this paper, the optical and electrical pulse responses of an optimized high-speed organic light-emitting diode (OLED) is investigated as a function of the pulse duration. The original design is based on the coplanar waveguide electrodes that are implemented on a transparent and conductive oxide thin film. The designed electrodes with reduced serial resistances (13 $\Omega $) allow to maximize the pulse energy delivery and to feed the organic device with short electrical pulses of few nanoseconds for the first time. This is achieved by designing the electrodes to have 50- $\Omega $ characteristic impedance, thanks to microwave techniques, and by implementing small values of capacitance (4.5 pF). The experimental results demonstrate $\boldsymbol \mu $ -OLED electrical and optical responses to electrical excitation pulses as short as 2.5 ns, for the first time, and state-of-the-art current densities above 1.7 kA/cm2. Moreover, and rather unexpectedly, the developed characterization procedure to extract the reported results demonstrated the first direct measurement of the electroluminescence lifetime of organic materials in the nanosecond time scale. [ABSTRACT FROM AUTHOR]

In this paper, we explore new metal electrodes for ferroelectric capacitors based on Al-doped HfO2. We find that Ti/Pd, Ti/Au, and W top electrodes can induce much higher remanent polarization as compared to the traditional TiN top electrode. The endurance of the capacitors with Ti/Pd electrodes is also much better than that with TiN and W electrodes. These results indicate that Ti/Pd is a very promising candidate for ferroelectric Al-doped HfO2. In addition, we find that the remanent polarization reaches maximum when the annealing temperature is around 900 °C–950 °C. At a given annealing temperature, the optimal Hf-to-Al cycle ratio corresponding to the highest remanent polarization is around 23:1. With optimized process conditions, we demonstrate high-performance Ti/Pd gated ferroelectric Al-doped HfO2 capacitors with remanent polarization up to $20~\mu \text{C}$ /cm2, endurance higher than 108 cycles, and retention over ten years at room temperature. Another interesting feature of the ferroelectric capacitors with Ti/Pd electrodes is high tunability of polarization by external pulses, which will be important for neurosynaptic computing applications. [ABSTRACT FROM AUTHOR]

In this paper, a super-junction p-type lateral diffused metal–oxide–semiconductor transistor (SJ-pLDMOS) utilizing electron to enhance the current capability is proposed. The proposed SJ-pLDMOS has an n-channel in the drain region and is controlled by an auto-generated voltage signal (${V}_{\mathrm {\textsf {Gn}}}$). The voltage signal ${V}_{\mathrm {\textsf {Gn}}}$ is generated during the ON- and OFF-state of the hole current which flows across an integrated resistor (${R}\text{p}$) implemented in the p-base region. Thus, the proposed SJ-pLDMOS utilizes both hole and electron currents to significantly enhance the current capability. Simulation results show that the current capability of the proposed SJ-pLDMOS without any conductivity modulation effect is comparable with that of a super-junction nLDMOS (SJ-nLDMOS). The total power loss of the proposed super-junction pLDMOS (SJ-pLDMOS) is reduced by about 26.7% and 18% compared with that of the SJ-nLDMOS and Triple Resurf nLDMOS (TR nLDMOS) at a rated load current density of $25~\mu \text{A}/\mu \text{m}$ , respectively. [ABSTRACT FROM AUTHOR]

In this paper, we report the fabrication of flexible and transparent InGaZnO thin-film transistors on muscovite mica substrates. The mica substrate is compatible with four-step photolithographic processes as well as high-temperature processes. The field-effect mobility, subthreshold swing, ON/OFF ratio, threshold voltage, and hysteresis voltage are improved after annealing both at 300° C and 400° C in nitrogen. The device demonstrates more stable performance under positive gate bias stress when annealed at 400° C than at 300° C. The electrical performances are stable when exposed to tensile bending cycles up to 10 000 times. The mica with devices shows small optical loss in the visible region, where the average transmittance is as high as 86.75%. [ABSTRACT FROM AUTHOR]

An L-ascorbic acid (L-AA) biosensor based on an indium–gallium–zinc oxide (IGZO)/aluminum (Al) membrane modified by graphene oxide (GO) and magnetic beads (MBs) was produced and trusted to investigate its potential biosensor applications. An atomic force microscope, scanning electron microscope (SEM), and electrochemical impedance spectroscopy (EIS) were used to analyze electron transfer resistance (${R} _{\textsf {et}}$), surface roughness, and surface morphology. The experimental results show that the L-AA biosensor possessed the average sensitivity of 78.9 mV/decade with a linearity of 0.997. The experimental results from the EIS confirm that ${R} _{\textsf {et}}$ can be improved by the addition of GO and MBs. This paper opens a new window for the detection of L-AA based on MBs-ascorbate oxidase/GO/IGZO/Al sensing membranes. [ABSTRACT FROM AUTHOR]

This paper investigates the issues of oxygen accumulation and variation in the high-resistance state of HfO2-based resistive random access memory (RRAM), with improvement attained by inserting a thin oxygen-vacancy-rich layer of indium-tin-oxide (ITO) film. By acting as the oxygen ion reservoir, this ITO thin film on the TiN electrode can further stabilize resistance switching (RS) characteristics. In terms of reliability, ac endurance, and retention tests confirm stable RS characteristics for the Pt/HfO2/ITO/TiN device. Finally, a conducting model was proposed to explain the influence of the ITO thin layer and clarify the physical mechanism of electrical improvements. [ABSTRACT FROM AUTHOR]

A new 500-V ON-state breakdown voltage (ON-BV) parasitic JFET is proposed in this paper. Compared with traditional structures, a special junction field-effect transistor (JFET) region is located at the edge of the LDMOS. The drift region length of the JFET is larger than that of the LDMOS region. When JFET works in high-voltage on-state, the carriers are separated from the LDMOS region by a transition region close to the JFET region. Then the peak electric field and the impact ionization rate are suppressed. It helps the device to achieve the high ON-BV. Experimental results show that the ON-BV of the proposed structure is larger than 500 V, which is far larger than that of the traditional structures. In addition, the OFF-state breakdown voltage is 550 V. [ABSTRACT FROM AUTHOR]

Resistive random access memory (ReRAM), a new emerging nonvolatile memory technology based on changes in electrical resistivity of a dielectric film, offers promising advantages such as scalability, fast switching, and low operation voltage. However, for ReRAM to become a successful technology, it is necessary to accurately control the stochastic nature of the conductive nanoscale filaments (CNFs) that governs the resistive switching (RS) behavior of the device and limits its long-term stability and reliability. In this paper, we developed a highly scalable nanostructured/textured electrode that is composed of an array of Al nanotips based on an anodic aluminum oxide template. The nanotips improve the RS characteristics by intensifying the electric field at the apex of each nanotip which is demonstrated using numerical simulations. The localized electric field induces the repetitive nucleation/ formation/rupture of the CNFs in a more controlled fashion compared to a flat Al electrode. As a result, the nanotip sample exhibits uniform and reduced forming/reset voltages as low as 4.70 ± 0.98V/1.00 ± 0.19 V, stable endurance, and long-term retention. As a result, we were able to achieve ultralow-power and error-free operation of 100 cells covering a large area, significantly demonstrating improved uniformity and reliability compared to devices made using flat Al electrodes. This universal bottom-up strategy of self-organized nanostructured-electrodes provides a pathway toward large-scale, highly reliable, and RS memory devices. [ABSTRACT FROM AUTHOR]

In this paper, a tunable acid-resistant Zr-doped indium oxide (ZrInO) semiconductor material was developed. Detailed studies showed that the acid resistance of ZrInO thin films is tunable and increases with the increase in annealing temperature. Taking advantage of this special property, we successfully fabricated back-channel-etched (BCE) thin-film transistors (TFTs) based on the tunable acid-resistant ZrInO thin film. ZrInO-TFTs with BCE structure exhibited excellent electrical performance with a saturation mobility of 21.4 cm $^{\textsf {2}}\textsf {V}^{-\textsf {1}}\textsf {s}^{-\textsf {1}}$ , a subthreshold swing of 0.28 V/decade, and an ON/OFF current ratio of $1.0\times107$. These results envision that the developed ZrInO semiconductor with tunable acid resistance has a good prospect for the channel layer of BCE-TFTs. [ABSTRACT FROM AUTHOR]

In the study of resistive random access memory using GeTeOx film as the switching layer, the device performed excellent property of bipolar resistive switching (BRS), which could be gradually transformed to the complementary resistive switching (CRS) by varying SET process current compliance. The conductive filament conduction mechanism of BRS could be verified by electrical characteristics and reliable data fitting. Through increasing current compliance of the SET process, CRS could be achieved due to higher activity of oxygen vacancies originated from the intensified thermal effect. This paper was beneficial to understand the switching mechanisms of BRS and CRS and provide a method to realize interconversion. Moreover, it was also a potential and promising device to be applied in the neurosynaptic biomimetic field. [ABSTRACT FROM AUTHOR]

A new concept high-voltage pseudo-p-channel lateral double-diffused MOS (p-LDMOS) with multiple current paths for conduction is proposed and investigated in this paper. The proposed power device consists of two hole current paths (p-channel MOS device) and one electron current path (n-channel MOS device). The gate of the n-channel device is automatically controlled by an induced signal inside the chip, thus the proposed device can be considered as a p-LDMOS with more than 66.2% reduction of specific on-resistance in comparison with the conventional p-LDMOS device. Furthermore, the proposed device has a much better safe operation area, since the compensation of the electric flux density brought by electron and hole currents. [ABSTRACT FROM AUTHOR]

An intentionally introduced interface layer in the resistive random-access memory (RRAM) devices play an important role in the improvement of resistive switching characteristics. In this paper, the resistive switching characteristics of ZrO2-based RRAM devices by inserting a thin TiO2 interface layer between electrodes and ZrO2 resistive switching layer were investigated. Compared with the Cu/ZrO2/Pt and Cu/ZrO2/TiO2/Pt devices, the Cu/TiO2/ZrO2/Pt and Cu/TiO2/ZrO2/TiO2/Pt devices showed much improved programing voltages, including lower forming voltage and lower set voltage. Moreover, the reset current was also improved. These results indicate that the TiO2 interface layer between the anode electrode and the resistive switching layer plays an important role in improving device performance. [ABSTRACT FROM AUTHOR]

In modern electronic devices, a variety of novel materials have been introduced such as transition metal oxides, chalcogenides, ferroelectric, and magnetic materials. The electrical response of such materials, used also as active layers, is strongly affected by atomic defects, which affect device performances, variability, and reliability. Extracting the defect properties (i.e., density, energy, and atomic nature) is, thus, crucial to both engineer the performances of electron devices and correctly project their scaling potential and reliability. In this paper, we propose a simple method to extract the atomic properties of defects from the thermal activation energy of the leakage current using a charge trapping relaxation model. [ABSTRACT FROM AUTHOR]

Among the diverse and ever-expanding list of candidate technologies to serve the Internet of Everything, the rise of thin-film transistors on plastic as active components for ubiquitous ICs has been nothing short of meteoric. The stage for this explosion of interest was set by a pivotal advantage of the low manufacturing cost and ultrathin form factor, as demonstrated in recent prototypes of thin-film radio frequency identification (RFID) tags. Most RFID tags use inductive antennas, whereas, in this paper, capacitively coupled antenna is presented. Advantages of capacitive-coupled tags are the monolithic integrated antenna, the compact size, the additional security due to very short range of operation, and the localization and orientation abilities. The main circuit block of the tag, a 12-bit code generator, is demonstrated achieving only 160 nW of power dissipation at 0.3 V power supply transmitting data at 810 b/s on a 18 $\mu \text{m}$ -thick plastic substrate. The footprint of the monolithic integrated antenna is 1 cm2 and essentially defines the size of the full tag. [ABSTRACT FROM AUTHOR]

This paper investigates the effects of parasitic source/drain (S/D) field plates (FPs) on electrical characteristics of channel-passivated amorphous indium gallium zinc oxide thin-film transistors (a-IGZO TFTs). For the S/D metal of the channel-passivated TFT, besides acting as conducting electrodes, they can be FPs to influence the carrier conduction in the semiconductor layer via the channel passivation (CHP) layer. We first fabricated a standard channel-passivated a-IGZO TFT. Based on this TFT, performance variations caused by different lengths of the S/D FPs under different thicknesses of the CHP and a-IGZO layers are explored by technology computer-aided design simulation. Carrier concentration distributions and current flow patterns are examined to study the physical mechanisms of the corresponding performance degradation or improvement. [ABSTRACT FROM AUTHOR]

This paper reports the fabrication of MEMS-based guided two-beam piezoelectric energy harvester for low-frequency operation. A highly c-axis-oriented zinc oxide thin film of 2.5- $\mu \text{m}$ thickness covered with 0.5- $\mu \text{m}$ plasma-enhanced chemical vapor deposition SiO2 is sandwiched between the aluminum electrodes to form split electrodes on the two beams. A pyramidal-shaped seismic mass that gives a higher electric potential is realized by bulk micromachining using CMOS compatible 25 wt% tetramethyl ammonium hydroxide wet etching. The thickness of the beams is optimized using deep reactive-ion etching to achieve a low-frequency operation. COMSOL Multiphysics has been used to study the stress distribution to optimize the dimension and placement of the split electrodes. The optimized split electrodes give a reduced resonance frequency by 4.2% when compared with previously used electrode pattern ensuring maximum electric potential generation for guided two-beam structure. The resonance frequency of the device measured experimentally using laser Doppler vibrometer comes to be 466 Hz. The packaged device exhibits a maximum sensitivity of 1.5089 mV/m/s2 in the frequency range from 160 to 1000 Hz. [ABSTRACT FROM AUTHOR]

Measuring the interfacial stress between robots and objects is a prerequisite for robots to finish complicated works. In general, the interfacial stress is the 3-D interfacial stress which not only couple with the vertical normal interfacial stress but also the parallel shear interfacial stress. It is very important to develop a method to decouple the 3-D interfacial stress. This paper presents a measurement method that was able to decouple the measurement of the 3-D interfacial stress components. To implement the method, a 3-D interfacial stress sensor was fabricated based on graphene foams and superelastic materials. A high-resolution multichannel resistance measurement circuit was developed, and experiments were carried out with 3-D stress simulation equipment. The results showed that the sensor was capable of measuring z-direction normal stress at a range of 0–21 kPa with a sensitivity of 0.029 kPa−1 and x- and y-direction shear stresses at a range of 0–12.5 kPa with sensitivities of 0.020, 0.019, 0.018, and 0.019 kPa−1, and the measurement circuit was capable of measuring a range of $100\,\,\Omega -100\,\,\textsf {M}\Omega $ with a resolution of 1%. This method can be utilized in robots to decouple the measurement of the 3-D interfacial stress components. [ABSTRACT FROM AUTHOR]

In this paper, we report a low thermal budget manufacturing method to produce highly rectifying Schottky diodes with ultrathin ZnO films grown at near room temperature by plasma-enhanced atomic layer deposition. A bottom Schottky electrode with Pt and a top ohmic electrode with Al/Au stacks were used for metallization. The resultant diodes demonstrated high rectifying ratios on the order of 106, relatively low ideal factor ${n}$ values of 1.36 ±0.05, effective Schottky barrier height $\Phi _{B}$ values of 0.77 ± 0.01 eV, and high breakdown fields of 1.67 MV/cm extrapolated from the current–voltage (${I}$ – ${V}$) characteristics at room temperature. These specifications are among the best-reported performance of Schottky diodes with ZnO thin films in nanoscale thickness. The interface at the Schottky contacts was investigated and revealed a lateral nonuniform distribution of interface defect states. A modified Richardson plot was used to deduce a mean barrier height ($\overline {\Phi }_{B{0}}$) of 1.25 ± 0.1 eV and an apparent Richardson constantc (${A}^{\ast \ast }$) of 11.64 A/cm2/K2. In addition, ${I}$ – ${V}$ characteristics of the diodes were observed to improve with aging. This newly developed, low thermal budget technique of ZnO Schottky nanodiodes is attractive for hybrid circuit systems and polymer electronics with integration constraints. [ABSTRACT FROM AUTHOR]

A general equivalent circuit model for the metal/organic semiconductor (OSC)/liquid/metal system is presented. Each circuital element, representative of a physically observable phenomenon associated with the device working principle, is analyzed and discussed. Two case studies of electrochemical impedance spectroscopy of devices featuring NaCl (concentration of 0.1 M) and MilliQ water as liquid are reported, showing that both cases can be considered as a particular case of the general model presented in this paper. Experimental verification of the two practical cases is achieved by performing measurements onto electrodes coated by either an n-type or a p-type OSC deposited by sublimation or drop casting, respectively. The good agreement with the experimental data makes our model a useful tool for the characterization and failure analysis of electronic devices, such as water-gated transistors, electrophysiological interfaces, fuel cells, and others electrochemical systems. [ABSTRACT FROM AUTHOR]

When developing silicon carbide (SiC) devices, the reliability of the internal body diode is an important issue. Stacking faults (SFs) are expanded from basal plane defects by using a body diode. Although it is well known that ON-voltage degradation occurs due to SFs, their effects on dynamic reliability have not been studied well. Furthermore, including the effects of SFs, there are not many reports about the dynamic reliability of SiC-MOSFETs. In this paper, a double-pulse switching test using 3.3-kV SiC-MOSFETs was carried out to clarify the failure mechanism of the switching operation of SiC-MOSFETs and effects of SFs on the safe operation area (SOA). Before the switching test, current stress was applied to the body diode of the devices under test (DUTs) to expand the SFs. The circuit configuration was half-bridge type, and a double-pulse gate signal was applied to the lower arm DUT. The switching voltage was 1.8 kV, and the switching current increased at about 8-A steps to failure. As a result, reverse recovery SOA (RRSOA) reliability decreased depending on the amount of SFs in the SiC-MOSFET. Because RRSOA failure was caused by avalanche due to the hole concentration during reverse recovery and the SFs raised local current density, reverse bias SOA (RBSOA) hardly decreased even if SFs containing SiC-MOSFETs were used. This is because RBSOA failure was caused by degradation of the gate isolation layer due to overheating and the temperature coefficient of the SFs electric resistance indicated negative. [ABSTRACT FROM AUTHOR]

Tunnel field-effect transistors (TFETs) have shown attractive device performance making them a potential candidate to replace MOSFETs in future technologies. However, the inherent ambipolar characteristic of TFETs poses challenge in digital applications. The gate–drain overlap in conventional TFETs efficiently suppresses the ambipolar conductivity. On the other hand, in dopingless TFETs (DLTFETs), due to the requirement of separate gate and drain electrodes for electrostatically creating doped and intrinsic regions, gate–drain overlap cannot be realized. However, gate–drain overlap can be effectively realized using oversized back gate (OBG). Therefore, in this paper, we have proposed a DLTFET with an OBG that effectively suppresses ambipolar behavior even upto gate voltage ${V}_{\textsf {GS}} = -\textsf {1}$ V. Misalignment study is also performed for the gate length ${L}_{G} = \textsf {20}$ nm which has been reported to degrade the tunneling phenomenon at gate–source interface. It is observed that the proposed device is more tolerant to misalignment due to its OBG. The OBG also provides improvement in ${I}_{\textsf {on}}$ ($\sim 1.4\times $) due to enhanced band bending at gate–source interface. To demonstrate the advantage of proposed device architecture over existing architectures, we compare the performance of proposed device with other existing techniques such as dual material gate and dual material drain architectures. The OBG-DLTFET has shown better ambipolar and on-state characteristics in comparison to the existing techniques. [ABSTRACT FROM AUTHOR]

The switching properties of Te and TeTiW top electrodes (TEs) on TiW/SiN/TiN resistive switching memory devices are explored in this paper. The TeTiW TE device exhibits more favorable bipolar resistive switching behavior because of the decrease in binding energy after its use. This finding is confirmed through X-ray photoelectron spectroscopy analyses. The filament of the TeTiW TE device is metal like after forming, and the reset process corresponds with the thermal-dissolution mechanism. A physical model based on a Te filament is constructed to explain such phenomena. The TeTiW TE device provides the excellent endurance of more than 104 cycles, with an ON/OFF ratio of 500. The improvement can be attributed to the filament’s robustness during the forming and set processes, which prevent its diffusion even at high temperature. The device also features long retention for up to 104 s at 225 °C without stress, and 104 s at 85 °C with stress of −0.3 V. Therefore, it has high potential for high-density nonvolatile memory applications. [ABSTRACT FROM AUTHOR]

In this paper, we demonstrate the linear conductance-change characteristics of a conductive-bridging RAM (CBRAM) to be employed as an artificial synapse device in neuromorphic systems. The CBRAM with a bilayer electrolyte structure (${\mathrm {Cu/Cu}}_{{2}-{x}}\text{S}$ / $\mathrm {WO}_{{3}-{x}}$ /W) exhibits analog switching behavior during the depression process due to the well-controlled dissolution of the conductive filament. To analyze the origin of this motion, we investigate the effective voltage applied to $\mathrm {Cu}_{{2}-{x}}\text{S}$ and $\mathrm {WO}_{{3}-{x}}$. Our findings reveal that $\mathrm {Cu}_{{2}-{x}}\text{S}$ , acting as a voltage divider, helps in suppressing the large voltage drop in $\mathrm {WO}_{{3}-{x}}$ , where the formation/dissolution of filament occurs. Furthermore, due to the diode-like characteristics of $\mathrm {Cu}_{{2}-{x}}\text{S}$ and the division of voltage drop between $\mathrm {WO}_{{3}-{x}}$ and $\mathrm {Cu}_{{2}-{x}}\text{S}$ , an optimum programming energy is applied to $\mathrm {WO}_{{3}-{x}}$ during the depression process. This leads to linear conductance-change characteristics under identical pulses. However, abrupt conductance-change characteristics are observed during the potentiation process. Thus, we use only the device characteristics of the depression part for the neuromorphic system. An excellent classification accuracy is achieved due to the linear conductance-change characteristics and optimized pulse conditions. [ABSTRACT FROM AUTHOR]

Inkjet technology is commonly used as a nonimpact, versatile, and additive digital manufacturing/printing technology. The flexibility offered by this technology toward deposition accuracy, usage, industrial upscaling relevance, and even testing of various solution processable functional materials, e.g., conductors and insulators, makes it very attractive for printed electronic applications. The focus of this paper is improving the curing time durations for inkjet-printed polymeric dielectric layers. In this paper, enhancement with regard to curing time durations is performed and they were found to be reduced dramatically down to less than 1 min using Infrared (IR) emitters, whereas the state-of-the-art curing demands a minimum of 60 min. Here in the experiments, inkjet printing was done using conductive and dielectric inks for developing fundamental devices like a capacitor. The sintering of silver electrodes was done using a conventional oven, and curing of the polymeric dielectric was done using a conventional oven as well as IR radiation. Observations are made on the basis of the dielectric insulation between the top and bottom electrodes for the capacitors containing dielectrics cured in conventional oven and those which are cured using IR radiation under two different manufacturing platforms, i.e., sheet to sheet and roll to roll. [ABSTRACT FROM PUBLISHER]

Thermionic energy converter (TEC) is a heat engine that generates electricity directly using heat as its source of energy and electron as its working fluid. Despite having a huge potential as an efficient direct energy conversion device, the progress in vacuum-based thermionic energy converter development has always been hindered by the space charge problem and the unavailability of materials with low work function. It is only recently that researchers have started to look back into this technology as recent advances in manufacturing technology techniques have made it possible to solve these problems, making TECs a viable option in replacing current energy production systems. The focus of this paper is to review the challenges of producing efficient and practical TECs, along with recent findings and developments in mitigating these challenges. Furthermore, this paper looked into potential applications of TECs, based on recent works and technologies, and found that, with certain improvements, it can be applied in many sectors. [ABSTRACT FROM PUBLISHER]

This paper uses nonvacuum ultrasonic spray pyrolysis deposition method to grow TiO2 for ultraviolet (UV) detection. The analyses of the materials like X-ray photoelectron spectroscopy, X-ray diffraction, and photoluminescence were investigated. The 600 °C annealing temperature is the optimum condition to obtain the anatase TiO2. The metal–semiconductor–metal (MSM) photodetectors (PDs) with 3-, 5-, 7-, 10- \mu \textm finger spacing were fabricated and the performance was investigated. The PD with 10- \mu \textm finger spacing has the lowest dark current of 2.92\times 10^-11 A and the highest UV-to-visible rejection ratio ( $R_{{{{\rm UV}/{\rm VIS}}}}) of 2.1\times 10^5 at 5 V. The PD with 5- \mu \textm finger spacing has the lowest noise equivalent power of 2.57\times 10^-9 W and the highest detectivity ( D^\ast ) of 5.46\times 10^{8} cmHz ^{0.5}\text{W}^{-1}$ . The rising time and the falling time of the PD are 5 and 12 s. In addition, the TiO2-based MSM PD in this paper operated normally at 450 K; however, the performance is slightly degraded. The mechanisms causing degradation at high temperature were investigated. [ABSTRACT FROM AUTHOR]

This paper presents a new theoretical equivalent model (TEM) for organic light-emitting diodes (OLEDs). The parameters of TEM are identified using a simple characterization procedure based on auxiliary circuits and low-cost equipment. From this TEM, a method for intrinsic capacitance identification is proposed. This model is useful to simulate and analyze OLED devices considering dynamic and steady-state operation conditions. In addition, it provides guidelines for manufacturers and lighting designers to enhance the device performance and to design dedicated OLED drivers. In order to validate the proposal of this paper, four commercial OLEDs are tested, and the comparison between the theoretical and the experimental results is satisfactory. [ABSTRACT FROM PUBLISHER]

In this paper, simultaneous multiwavelength detection using quantum dots (QDs) and energy selective contacts is investigated. This detection can be achieved by intersubband and interband transitions in QD-based superlattices. Here, we show that attaching a double-barrier resonant tunneling to the QD-based active layer solves the basic problem of carrier extraction from each discrete energy level to individual electrodes (as a multicontact package). The mini-band energy levels and corresponding wave functions for arrays of QDs are calculated using the 2-D Schrodinger equation. We present simultaneous multiwavelength detection by QD structures with selective contacts for the first time according to the best of our knowledge. This paper opens the way to new strategies in the engineering and the fabrication of simple detectors for multiband radiation detection. In addition, for more clarification, photocurrent and dark current of photodetector with two independent output paths are obtained. [ABSTRACT FROM PUBLISHER]

Vertical zinc oxide (ZnO) thin-film transistors (TFTs) with submicrometer channel length have good performance, including large current density (>10 mA/mm), high mobility (> 14 cm ^2 /Vs), and large current ON–OFF ratio ( >10^7) . They also have asymmetric current–voltage ( $I$ – $V$ ) characteristics in the saturation region when the source and drain electrodes are interchanged. We have used 2-D simulations with the Synopsis Sentaurus Device to model vertical ZnO TFTs. The devices studied in this paper had ZnO active layers deposited using spatial atomic layer deposition (SALD). Model parameters were calibrated by matching simulation results with experimental results of planar bottom-gate ZnO TFTs and further adjusted to fit vertical TFT (VTFT) experimental characteristics. We find we need acceptor-like traps above and below the conduction band minimum to model the SALD ZnO semiconductor behavior; in this paper, we introduced these as bulk traps. We find the asymmetric $I$ – $V$ characteristics arise from an ungated region near the foot of the VTFT, and which has a more significant effect on charge injection than on charge extraction. Modeling TFTs with different ungated region lengths gave good agreement with experimental characteristics. [ABSTRACT FROM AUTHOR]

A comprehensive study is conducted on the electron transport in conductive polymer matrix composites (CPMCs), employing the nonequilibrium Green’s function formalism. This paper provides a microscopic insight into the electron tunneling through the potential barriers existing between conducting sites. It is shown that Wentzel–Kramers–Brillouin approximation as well as other models with simple barrier shapes, which are widely used in literature, can lead to inaccurate results in comparison with the quantum mechanical approach using a hyperbolic barrier. In this paper, unlike most previous ones, percolation-related effects are disregarded for further focus on electron transport through the polymer potential barriers. It is assumed that a tunneling-conductive channel exists between the electrodes. This can be created either by applying electric field alignment or using a filler volume fraction higher than the percolation threshold. A two electrode resistive device is studied and the results indicate that a conductor–insulator transition occurs at a barrier thickness of $\sim 1.7$ nm and the barrier thickness should be larger than several angstroms. Next, a novel tunneling field-effect structure based on CPMCs is introduced and its characteristics are comprehensively investigated. This device features a remarkably simple structure, an extremely high channel to gate coupling, a large transconductance, and a high current level. Besides, it has the advantage of being based on polymers. This ensures favorable physical properties, ease of fabrication, and low-cost processing techniques. [ABSTRACT FROM AUTHOR]