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Motors and inverters are increasingly being used in vehicles. As more vehicle components are being adopted, requirement for safety and installation space are increasing. Growing attention is being paid to the use of six-phase permanent magnet synchronous motors (PMSMs) and their parallel control by two inverters, because of their reduced size and enhanced safety. This paper proposes a pulsewidth modulation (PWM) control algorithm for a six-phase PMSM. In low-voltage vehicle components such as electric power steering, the current is usually acquired with resistors placed under the low-side switching devices. In the proposed control algorithm, the neutral voltage of the two inverters is shifted to either a lower or higher voltage within a certain range to allow for the signal conditioning time delay after the switching device turns on or off, and the time taken for the phase current to rise or settle. The paper proposes a novel PWM control algorithm that ensures that the on-time of the low-side switching devices satisfies the restriction on current sensing with resistors and reduces the current in the capacitor at the same time. The work contributes to reducing the current in a practical configuration involving low-voltage vehicle components. [ABSTRACT FROM AUTHOR]

This paper proposes a new dc–ac converter with a reduced number of semiconductor switches and gate drive and control circuit components. A salient feature of this inverter is its pure sinusoidal line-to-line voltages with no need for output filter. Also, the proposed inverter improves the voltage utilization factor of the input dc supply compared to the four-switch three-phase inverter (first best topology in the literature from the number of switches point of view) and standard six-switch inverter with sine pulsewidth modulation. The proposed inverter is capable of operating with a wide range of output voltages from zero to the full value of the dc input voltage by appropriately altering the instantaneous duty cycle. A three-phase universal inverter with only three power switch has been proposed in this paper for the first time ever, to our knowledge. For the purpose of providing a good compromise between fast transient response and stability, a model predictive controller is proposed. All the design expressions have been derived. A comparison with other dc–ac converters is given to show the merits of the proposed converter. Finally, satisfactory circuit operation is confirmed by experimental results from a laboratory prototype. [ABSTRACT FROM AUTHOR]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

This paper analyzes the combination in a cascaded H-bridge multilevel inverter (CHBI) based on transformers with the different turn ratios for increasing the voltage level and proposes the switching method for achieving the output voltage distribution among H-bridge cells (HBCs). The transformers used in this paper are connected to the output of the respective HBCs, and the secondary sides of all the transformers are connected in series for generating the final output voltage. Only one of the transformers, in particular, has a different turn ratio for increasing the output voltage level. In this paper, the possible turn ratio of the special transformer with a different turn ratio is discussed in detail, and a switching method based on the level-shifted switching method for the topology used in this paper is proposed. To verify the effectiveness of the proposed method, a three-phase 21-level CHBI is experimentally tested. [ABSTRACT FROM PUBLISHER]

In this paper, new half-bridge and full-bridge topologies for a switched-boost inverter are proposed. These topologies have a high boost factor in comparison with conventional types. In addition, the proposed topologies have continuous input current and can generate zero-voltage level in output. In this paper, the operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed. Moreover, the used switching pattern and its logical diagram are introduced. A comprehensive comparison between the proposed and conventional topologies in terms of the boost factor, the number of elements, and the efficiency shows the good features of the proposed inverters. Finally, to verify correct operation of the proposed topologies and derived equations, simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

A novel hybrid pulse width modulation (PWM) technique is proposed in this paper for two parallel interleaved, two-level, three-phase voltage source inverters (VSIs). The two parallel interleaved VSIs are analyzed as a three-level (3L) inverter. A 3L inverter provides minimum line current ripple when nearest three voltage vectors are applied. In this paper, a novel carrier-based PWM technique is developed that ensures the application of nearest voltage vectors, keeping average circulating current to zero over a switching period. For carrier-based implementation of the proposed PWM, generalized common-mode (CM) offsets are derived in terms of maximum and minimum values of reference signals. Each 3L space-vector sector is divided into seven subsectors. For each subsector, a CM offset is calculated, addition of which to reference signals ensures the minimum line current ripple and zero average circulating current. Simulation and experimental results are provided to validate the proposed technique. [ABSTRACT FROM PUBLISHER]

For power converters with inductive loads, a freewheeling path is needed for the current due to reactive power. The MOSFET synchronous rectification (SR) is widely used to reduce the conduction loss during the freewheeling period. Due to the wide band gap of silicon carbide (SiC), the intrinsic body diode of SiC MOSFET exhibits a high voltage drop. Hence, an antiparallel SiC Schottky diode is normally implemented to eliminate its conduction. However, the external SiC Schottky diode is not fully utilized as it only works during the dead time. In this paper, the hard-switching SR is investigated in an SiC three-phase inverter and compared with a conventional inverter using freewheeling diode (FWD). An improved power loss model for the two inverters has been developed. It is found that the inverter using SR has higher efficiency due to the smaller switching loss. A 7-kW prototype of SiC three-phase inverter is built, which achieves a peak efficiency of 98.8% ($\pm$ 0.15%) and 98.5% ($\pm$ 0.15%) at 40 kHz using SR and FWD, respectively. This paper confirms that the SiC MOSFET is an ideal candidate for the SR. [ABSTRACT FROM PUBLISHER]

This paper proposes and validates model predictive control as an alternative control strategy for H-bridgeneutral-point-clamped (H-NPC) converters for single-phase grid-tied string photovoltaic (PV) systems. The presented control scheme achieves good quality current waveforms with unity power factor, dc-link voltage control, and neutral-point voltage minimization. Furthermore, the predictive controller has been further enhanced by including an average device switching frequency restriction and a $dv/dt$ mitigation. The main contribution of this paper is the avoidance of the potential leakage current due to parasitic capacitance of the PV modules by using a predictive model based control technique instead of modulated schemes and eliminating high-frequency common-mode voltage components. Experimental results during steady state and dynamic operation are presented to illustrate the behavior of the H-NPC converter commanded by the proposed control scheme. [ABSTRACT FROM AUTHOR]

This paper proposes an effective sliding mode controller (SMC) for a grid-connected 7-level packed U-cell (PUC7) inverter. The aim is to design a simple controller that deals effectively with the complex control problem of the PUC7 inverter (multiobjective control problem). The selection of the control actions is achieved according to the system state error at every sampling time, regardless of the previous values, which makes the control technique model-independent. The control algorithm evaluates online two cost functions (one for each state error), which are derived on the basis of sliding mode theory, and it selects the optimal control input in order to satisfy the reaching conditions of the two cost functions. Compared with the existing solutions, the proposed SMC technique ensures lower average switching frequency by tuning the hysteresis bandwidth of the capacitor-voltage error. The fast implementation, needless of gains tuning, and simple design procedure are the main features of the proposed algorithm. Simulation and experimental results are presented to prove the effectiveness of the proposed technique in controlling the PUC7 inverter with high dynamic performance and robustness against disturbances and parameters mismatch. [ABSTRACT FROM AUTHOR]

In this paper, a new Lyapunov-based model predictive controller is proposed for a 7-level packed U-cell (PUC7) grid-connected inverter. A cost function of the proposed model predictive controller is designed from the system stability point of view, inspired by the Lyapunov control theory. The proposed controller eliminates the need for gains that are associated with cost function coefficients, as seen in classical model predictive control based controllers. Therefore, the control design problem is significantly simplified. In addition, the average switching frequency is also reduced, as shown in both simulation and experimental results, leading to a reduction in switching losses. Simulation and experimental tests, on a PUC7 lab prototype, demonstrate the excellent performance of the proposed control system, in terms of high disturbance rejection, robustness to parameter mismatches, and fast dynamic response. Such features qualify the proposed control strategy as a good candidate for grid-tied applications. [ABSTRACT FROM AUTHOR]

The magnetic resonant wireless power transfer (WPT) system with a class E inverter has wide application in mid-range power transmission, especially for several megahertz scenario. However, it is cumbersome for the existing modeling and analysis methods to obtain the analytical solution to the system variables, which limits the evaluation of system characteristic. This paper proposes a nonlinear mathematical model for the WPT system with a class E inverter. The equivalent small parameter method (ESPM) is first adopted to solve the proposed six-order nonlinear model, and symbolic-form steady-state periodic solutions are yielded. During the whole solving process, only three iteration steps are needed for the proposed method. Compared with other existing modeling and analysis methods, the symbolic periodic results acquired by the ESPM exhibit sufficient accuracy by virtue of the combination of more higher harmonics. Meanwhile, the calculation complexity is simplified remarkably. Simulation and available experiments validate the effectiveness and accuracy of the proposed method. [ABSTRACT FROM AUTHOR]

In this paper, a generalized switching modification method is proposed to reduce the root-mean-square (rms) current flowing into a dc-link capacitor in a dc–dc–ac structure consisting of a boost converter and a three-phase inverter. To analyze the current flowing into the capacitor, we analyze the currents at the respective converter and inverter sides. Based on this analysis, we derive an analytical method to find the modification time between the converter and inverter pulsewidth modulation (PWM) carriers through a Fourier series and approximation to facilitate real-time implementation. Real-time implementation of the modification time calculated by the derived method is described. To verify the validity of the proposed method, experimental results are presented based on a 1-kVA dc–dc–ac prototype. The proposed method has a better capacitor rms current reduction performance than the conventional method in various inverter power factors and PWM strategies. Especially, it has an excellent performance in mid-power factor level (0.95–0.1). [ABSTRACT FROM AUTHOR]

In this paper, an improved direct torque control (DTC) technique of a two-level inverter-fed five-phase induction motor (FPIM) drive for low-speed operation is presented. The operation of the FPIM with distributed winding requires the elimination of third-harmonic voltage, which, if not taken care of, would generate distorted stator current. For this, the concept of virtual vectors (VVs) is utilized. Before selecting the VVs for the DTC operation, a theoretical analysis is carried out to find the effects of these VVs on the torque and flux response of the FPIM under different speed and loading conditions. It is found that the rotor speed plays a crucial role in the selection of VVs. A particular VV has different effects on the torque change as speed varies. This analysis helps in the selection of VVs, hysteresis torque bandwidth, flux bandwidth, and efficient formation of sectors. Furthermore, in this paper, the performance of the FPIM during low-speed operation is improved by avoiding the demagnetization of the stator flux. To achieve this, a new modified lookup table is proposed. Superiority of the proposed method over the reported approaches is illustrated by experimental results. [ABSTRACT FROM PUBLISHER]

In this paper, a new topology for half-bridge Z-source inverter is proposed. The proposed topology has only one impedance network. Unlike to the conventional half-bridge inverter, the proposed topology can provide zero voltage level at the output. It also increases output voltage level and stabilizes it in the desired value. Capacitor voltage stress in the proposed topology is low, and, therefore, nominal voltage of capacitor and cost decreases. In this paper, the steady-state analysis of the proposed inverter in two new operations which are named synchronous operation of diodes and asynchronous operation of diodes is conducted based on mathematics calculations. A method to obtain high-voltage gains by cascading the Z-network and combining middle inductors is presented that leads to cost, size, and weight reduction. Comparison among the proposed converter with conventional ones shows its excellent performance. The experimental results have good agreement with analytical analysis for the proposed topology. [ABSTRACT FROM PUBLISHER]

Zero-common-mode-voltage (CMV) operation of multilevel inverters results in reduced dc-bus utilization and reduced linear modulation range. In this paper, a method to increase the linear modulation range for zero-CMV operation without increasing the dc-bus voltage using a cascaded multilevel inverter with a single dc supply is presented. Using this method, the peak fundamental output voltage can be increased from 0.499 to 0.637  \textV\text{dc} with zero CMV inside the linear modulation range. Also, various pulse width modulation (PWM) switching sequences are analyzed in this paper, and the PWM sequence that gives minimum current ripple is used for the zero-CMV operation of the inverter. The inverter topology with single dc supply is realized by cascading a two-level inverter with two floating-capacitor-fed full-bridge modules. Simulation and experimental results for steady-state and dynamic operating conditions are presented to validate the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a model predictive control technique applied to a dual-active bridge inverter where one of the bridges is floating. The proposed floating bridge topology eliminates the need for isolation transformer in a dual inverter system and therefore reduces the size, weight, and losses in the system. To achieve multilevel output voltage waveforms, the floating inverter dc-link capacitor is charged to the half of the main dc-link voltage. A finite-set model predictive control technique is used to control the load current of the converter as well as the floating capacitor voltage. Model predictive control does not require any switching sequence design or complex switching time calculations as used for space vector modulation; thus, the technique has some advantages in this application. A detailed analysis of the converter as well as the predictive control strategy is given in this paper. Simulation and experimental results to validate the approach are also presented. [ABSTRACT FROM PUBLISHER]

This paper presents a three-phase open-end winding induction motor drive. The drive consists of a three-phase induction machine with open stator phase windings and dual-bridge inverter supplied from a single dc voltage source. To achieve multilevel output voltage waveforms, a floating capacitor bank is used for the second of the dual bridges. The capacitor voltage is regulated using redundant switching states at half of the main dc-link voltage. This particular voltage ratio (2:1) is used to create a multilevel output voltage waveform with three levels. A modified modulation scheme is used to improve the waveform quality of this dual inverter. This paper also compares the losses in the dual-inverter system in contrast with a single-sided three-level neutral point clamped converter. Finally, detailed simulation and experimental results are presented for the motor drive operating as an open-loop v /f controlled motor drive and as a closed-loop field-oriented motor controller. [ABSTRACT FROM PUBLISHER]

Two three-level inverters driving an open-end winding induction motor can generate equivalent voltage waveforms as a single five-level inverter-based drive. In addition, it can bring in benefits such as reduced dc-link voltage, less number of devices, and fault-tolerant capability, which is favored in high-power motor drive applications. The main challenge with this type of configuration is the appearance of large zero-sequence current circulating between the two inverters, which generates extra losses in the switching devices and the motor as well as affects the normal operation of the machine. Another challenge is to balance the dc-link neutral point voltage of the two three-level inverters. This paper has proposed a simplified decoupled space-vector pulsewidth-modulation (PWM) strategy to eliminate the averaged zero-sequence voltage in each switching cycle by the placement of redundant vectors of each individual inverter using a time shift. Neutral point voltage balance is further achieved by adjusting the time duration of the redundant vectors. In this paper, it is shown that it is possible to operate this kind of drive configuration with a single dc power supply and achieve averaged zero-sequence voltage elimination and neutral-point voltage balancing at the same time. Experimental results of a 5.5-kW dual three-level inverter drive using the proposed PWM strategy are presented, which validates the control method and drive configuration. [ABSTRACT FROM PUBLISHER]

This paper presents a novel model predictive control (MPC) for the T-type single-phase three-level inverters. The cumbersome procedure in tuning of weighting factors is eliminated so that the implementation of the proposed MPC becomes easy. The constant switching frequency is achieved during the control implementation in order to facilitate the filter design. In order to optimize the distribution of the output current harmonics, multiple voltage vectors are employed in each control cycle with their application times setting inversely proportion to the respective cost function. The redundant small voltage vectors are utilized to balance the neutral point voltage of the inverter by directly regulating the upper and lower dc-link capacitors voltages. Finally, the proposed MPC algorithm is experimentally evaluated and compared with other two unfixed switching frequency MPC algorithms in terms of the steady state, transient performance, and parameter sensitivity. [ABSTRACT FROM AUTHOR]

This paper presents a new reconfiguration module for asymmetrical multilevel inverters in which the capacitors are used as the dc links to create the levels for staircase waveforms. This configuration of the multilevel converter makes a reduction in dc sources. On the other hand, it is possible to generate 13 levels with lower dc sources. The proposed module of the multilevel inverter generates 13 levels with two unequal dc sources (2VDC and 1VDC). It also involves two chargeable capacitors and 14 semiconductor switches. The capacitors are self-charging without any extra circuit. The lower number of components makes it desirable to be used in wide range of applications. The module is schematized as two back-to-back T-type inverters and some other switches around it. Also, it can be connected as a cascade modular which leads to a modular topology with more voltage levels at higher voltages. The proposed module makes the inherent creation of the negative voltage levels without any additional circuit (such as H-bridge circuit). Nearest level control switching modulation scheme is applied to achieve high-quality sinusoidal output voltage. Simulations are executed in MATLAB/Simulink and a prototype is implemented in the power electronics laboratory in which the simulation and experimental results show a good performance. [ABSTRACT FROM AUTHOR]

Due to the pulsating power at the inverter output terminals, the passive storage elements of the boost stage of the current-fed switched inverter (CFSI) contain a power frequency harmonic component (100 Hz), apart from dc and switching frequency components. In prior designs, the second harmonic component is suppressed by increasing the size of the input filter inductor and capacitor or by using additional circuits. This paper presents a complete characterization of a control-based approach to suppress the power frequency harmonic component in the input inductor current of a CFSI. It also presents a comprehensive characterization of the harmonic power redistribution. Using the proposed approach, it is demonstrated that the inductor value of a CFSI is reduced by 61% for the same peak-to-peak ripple. This leads to an improvement in the conversion ratio, efficiency, and power density of the overall converter. A SiC MOSFET-based CFSI with 75-kHz switching frequency is used to verify the proposed design philosophy. [ABSTRACT FROM AUTHOR]

This paper presents a high-efficiency inverter with the aid of the soft-switching technology, which is accomplished by the resonance of the in-series inductance with the snubber capacitance. The equivalent circuit of the quarter-phase ultrasonic motor is initially deduced, based on which the topology along with the operations of the novel inverter is subsequently presented. The configuration of the new quarter-phase inverter shows its uniqueness in terms of the shared arms and the especially designed snubber capacitance in comparison with the existing inverters. The circuit analysis infers that the dead time of the inverter is the key factor to arrive at the zero-voltage-switching or the zero-current-switching operations. Experimental measurements have demonstrated that the efficiency of the whole drive increases by a factor of 1.25 after replacing the traditional inverter with the proposed one. It should also be noted that the proposed inverter in association with the design method of the dead time not only can work for the quarter-phase ultrasonic motor, but also can be applicable for other kinds of quarter-phase devices. The soft-switching operations are achieved in the quarter-phase inverter for the first time, whose amplitudes of the output voltage and switching frequency are not required to be constant any more. [ABSTRACT FROM AUTHOR]

This paper explores a power-conversion system for single-phase transformerless ac module application. A nonisolated high-gain dc–dc stage is coupled with a doubly grounded dynamic dc-link inverter to implement the microinverter topology. The front-end boost stage steps up the single-module voltage to a higher dc voltage, typically to 200 or 400 V as required for the following inverter stage. It is a hybrid of an interleaved boost and switched capacitor concept capable of achieving high gain while simultaneously maintaining reduced voltage and current stress, and thus lowering switching and conduction loss for most of the switches. By directly connecting the grid neutral to the photovoltaic (PV) negative, the doubly grounded voltage swing inverter has the advantage of zero capacitive-coupled common-mode ground currents, critical for transformerless PV inverters. The two dc links of the inverter stage share the double-line frequency power decoupling with a combination of higher value of mean voltage and relatively large 120-Hz ripple component–the dynamic dc-link approach. Through an optimization algorithm, the decoupling capacitance is minimized enabling an all-film capacitor implementation while satisfying the converter's operating constraints over a wide range of power factors. The simulation as well as experimental results from a GaN-based hardware prototype validate the converter's performance. [ABSTRACT FROM AUTHOR]

The development of a photovoltaic ac module composed of a high static gain nonisolated dc–dc converter with current source output characteristic followed by an unfolding low-frequency inverter is presented in this paper. The operation of the dc–dc converter with high static gain and with reduced switch voltage is obtained using the Cuk converter integrated with the switched-inductor technique. The nonisolated structure allows the elimination of the volume and losses of the power transformer and leakage inductance, and an output filter configuration is proposed to reduce the high-frequency ground leakage current. The grid-tied inverter operating in a discontinuous conduction mode (DCM) allows a sinusoidal output current with low harmonic distortion (THD = 3.72%) to be obtained without current control loop and without the use of a current sensor at the output. The maximum power point tracking operation is obtained without the use of the current sensor. The DCM operation increases the current stress, but the proposed converter presents two switches and two input inductors sharing the input current in these components. The theoretical analysis, design procedure, and experimental results are presented for a prototype with a dc input voltage Vi = 30 V, an ac output voltage Vo = 127 V, and output power Po = 180 W. [ABSTRACT FROM AUTHOR]

To reduce the common-mode voltage (CMV) and eliminate the CMV spikes for two-level voltage source inverters (2L-VSIs), an improved model predictive control (MPC) based CMV reduction method is proposed in this paper considering dead-time effects. First, an improved voltage vector (VV) preselection strategy is proposed to reduce the CMV spikes caused by the dead time. Second, a new hybrid VV preselection strategy based on a delay compensation strategy and a modified current sector division strategy is proposed to completely eliminate the CMV spikes. As the proposed hybrid VV preselection based MPC strategy makes full use of the six nonzero VVs of the 2L-VSI, the current total harmonic distortions and ripples are reduced. The simulation and experiments are carried out to verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

In this paper, a fixed switching frequency model predictive current controller is designed and implemented on a sensorless five-level packed U-cell (PUC5) inverter interfacing the utility. The predictive control methodology is based on a voltage vector generation technique for the cost function optimization by nullifying its derivative. The aim of the controller is to allow a fixed-frequency operation with no iterations while operating as a utility line current regulator. A pulsewidth modulator based on employing PUC5 redundant switching states fixes the PUC5 auxiliary dc bus capacitor voltage to its desired level with no necessity of a regulator; the overall technique reduces system complexity with less sensors and no loops in the predictive algorithm making it suitable for industrial applications. System discrete model is developed and experimental results verify the performance of the designed controller in making a fast response in regulating the grid current and balancing the capacitor voltage. [ABSTRACT FROM AUTHOR]

To solve the problem of poor robustness due to the high dependence of model predictive control (MPC) on the three-phase inverter model, the influence mechanism of the mismatch of circuit parameters R and L, the model discretization error, and sampling errors on MPC prediction error are analyzed in this paper. A feedback self-correction is proposed, which the next current errors are predicted and used to modify the model, based on the previous prediction errors. This proposed method involves simple structure and a small amount of calculation. Steady-state effects of the proposed method are quantized to prove a good inhibitory ability on multifactorial prediction errors. Finally, experimental results in a three-phase inverter are presented to support the theoretical analysis and demonstrate the feasibility of the proposed method. [ABSTRACT FROM AUTHOR]

Multilevel inverters are now-a-days being applied in electric vehicles (EV). Considering the dynamic operating conditions of an EV propelled by an induction motor, this paper proposes a flexible discontinuous modulation strategy for three-level neutral-point-clamped (NPC) inverter that can shift modulation pattern seamlessly from sinusoidal pulsewidth modulation (SPWM) to discontinuous PWM (DPWM). The modulation scheme is generalized at each degree of discontinuity to ensure minimum switching losses for variable load power factors. Additionally, a hybrid voltage balancing strategy, which comprises two sets of compensating offset signals with complementary features, has been introduced to mitigate voltage deviation problem at neutral point of the inverter. The unique feature of the proposed hybrid balancing approach is that it generates uniform compensating neutral current regardless of the level of discontinuity. This results in identical and predictable voltage balancing dynamics for the entire modulation transition covering SPWM and DPWM. It has been shown that the proposed hybrid balancing strategy does not lose its unbalance compensation strength even during transition from one modulation pattern to another. The effectiveness of the proposed scheme for wide variations in operating conditions is studied through extensive simulation, and validated in experimentation using a prototype NPC inverter with induction motor loads. [ABSTRACT FROM AUTHOR]

Wireless power transfer with a self-tuning LCC inverter using pulsewidth modulation (PWM) controlled switched capacitor is proposed in this paper in order to compensate for the variations of Tx inductance. Usually, receivers contain magnetic and conductive materials for shielding and mechanical support. The inductance of the Tx coil is sensitive to the variation of Tx–Rx alignment because the interaction between the Tx coil and the Rx magnetic–conductive materials is also varied. It is shown that the detuning of the Tx inductance value exacerbates the losses in the LCC inverter. In the proposed method, the PWM duty ratio of a single capacitor adjusts the effective output impedance of the LCC inverter. The PWM feedback loop is designed such that the power factor and the real-part impedance of the LCC inverter are maximized. The PWM switch is turned on at zero voltage and turned off with low dv/dt, minimizing switching losses. Such a soft-switching tunable capacitor can handle higher power compared to the traditional hard-switching capacitor, p-n junction capacitor, or an analog IC capacitor. Another advantage of the proposed technique is the continuity in achievable capacitance value using only one capacitor. The feedback can be fully implemented by analog components, obviating the necessity of digital samplings, ADC/DACs, and microcontrollers. The power of 54 W is transferred at 76.6% and 60.7% with and without the proposed method, respectively. [ABSTRACT FROM AUTHOR]

Soft-switching inverters can achieve high efficiencies and low switchdv/dtanddi/dt, but often impose additional stress on the switches due to their resonant behavior. Multicell converters, on the other hand, can process high voltages by arranging the switches to share the stress. This paper proposes a buck–boost multicell soft-switching inverter with inherent cell voltage balancing. Both the current and voltage stresses are shared by the cells. Soft-switching conditions are achieved for all switching transitions without any need for auxiliary circuitry or clamps. A multiple-winding transformer transfers energy between the terminals and provides galvanic isolation. An analytical study and experimental results on a 1200-W prototype verify the operation of the inverter. [ABSTRACT FROM AUTHOR]

In this paper, a fast and practical method is proposed for open-circuit (OC) fault diagnosis (FD) in a three-phase quasi-Z-source inverter (q-ZSI). Compared with the existing fast OC FD techniques in three-phase voltage source inverters, this method is more cost-effective since no ultrafast processor or high-speed measurement is required. Additionally, the method is independent of the load condition. The proposed method is only applicable to Z-source family inverters and is based on observing the effect of shoot-through intervals on the system variables during switching periods. The proposed algorithm includes two consecutive stages: OC detection and fault location identification. When both stages of the OC FD algorithm are done, a redundant leg is activated and utilized instead of the failed leg. The accuracy of the proposed method is confirmed by the experimental results from a low-voltage q-ZSI prototype. [ABSTRACT FROM AUTHOR]

Recently, a few fault-tolerant control strategies have been proposed for T-type three-level inverters to improve the reliability of the inverter system. However, the neutral-point (NP) voltage oscillations suppression is never considered in the previous fault-tolerant control strategies. In order to suppress the NP voltage oscillations when open-circuit fault occurs to NP switches, this paper proposes two novel fault-tolerant control strategies named as improved two-level switching tolerant control and hybrid switching tolerant control (HS-TC). Both methods are implemented by adding an optimal time-offset to the three-phase turn-ontimes. The corresponding time-offset value of each method is simply calculated considering the phase current and dwell time of [O] state. Moreover, an NP voltage balancing algorithm to eliminate the dc deviation and a dc bias to further reduce the NP voltage oscillations are used in the HS-TC. The performance and comparison of the tolerant controls with respect to the NP voltage oscillations, current total harmonic distortion, and dynamic response are illustrated and analyzed through the simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes advanced speed control for a five-leg voltage source inverter (FLVSI) that drives the dual three-phase induction motor system used in industrial manufacturing processes. The advanced speed control method consists of two controllers: 1) The first is a slip controller that satisfies the application requirement, i.e., to control the mechanical speed of two motors equally regardless of the load condition. 2) The second is an angle controller that satisfies the FLVSI requirement, i.e., to control the phase angle difference between the two motors for minimizing the common leg current because the common leg current can be twice higher than other leg's current depending on the operation condition of the dual motor. Stability analysis of the two controllers under advanced speed control is implemented, and the whole performance of the advanced speed control for the FLVSI-fed dual-motor drive system is shown to identify its feasibility through the experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a transformerless line-interactive uninterruptible power supply (UPS) with low ground leakage current. A high-efficiency bidirectional inverter is suggested, which performs the line-interactive UPS functions with low ground leakage current. It has a full-bridge inverter and a bidirectional switch, which operate with the unipolar pulsewidth modulation. Because the bidirectional switch operates at the line-frequency, switching losses can be lower than the previous transformerless inverters. As the inverter operates, the parasitic capacitance between the inverter and the ac voltage ground is clamped to zero voltage for a positive line cycle and to the ac voltage for a negative line cycle, respectively. Thus, the parasitic capacitance can be prevented from being charged or discharged, which ensures the absence of the ground leakage current. The operation modes of the proposed system are described. The control schemes are presented to design the proposed inverter for the line-interactive UPS. Experimental results for a 2.0 kW prototype are discussed to verify the performance of the proposed system. [ABSTRACT FROM AUTHOR]

In this paper, a three-level quasi-switched boost T-type inverter (3L qSBT2I) is proposed. A new pulse-width modulated (PWM) control method is presented to reduce the inductor current ripple of the qSBT2 I. In the introduced PWM technique, the shoot-through duty cycle is maintained constant to keep the modulation index as high as possible. Then, the only control parameters of the qSBT2I are the duty cycles of the two additional switches. By controlling the duty cycles of the two additional switches, the voltage gain of the proposed qSBT2 I can be improved to a value larger than that of the conventional 3L impedance source inverters. The steady-state analysis, operating principles, and comparisons with the impedance source-based 3L inverters are presented. A 1-kW prototype is constructed to verify the operating principle of the 3L qSBT2I. An indirect dc-link voltage regulator and a capacitor voltage-balance controller are applied to the proposed qSBT2I. Simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

This paper proposes a zero-sequence circulating current (ZSCC) control scheme for the multiparalleled three-level T-type inverters (3LT2Is). Based on the analysis with the proposed generalized model of multiparalleled 3LT2Is, it is seen that the ZSCC is influenced by the circuit parameters, duty cycles, and the circulating currents of the l th and first 3LT2I. To mitigate the circulating currents, a deadbeat control strategy for n-paralleled (n≥3) inverters is proposed, which is realized by adjusting the duty cycle of the small vectors in each PWM sampling period. Compared with the conventional PI control method, the ZSCC spike is mitigated with the proposed scheme, thus improving the quality of the output currents. Also, the reliability of the 3LT2Is system is improved because such a scheme only needs the information about the ZSCC and zero-sequence duty ratio in the l th and the first inverter. The proposed method can also be applied to the neutral-point-clamped converters. Simulation and experimental results verify the effectiveness of the theoretical analysis and the proposed method. [ABSTRACT FROM PUBLISHER]

Microinverters operating into the single-phase grid from new energy source with low-voltage output face the challenges of efficiency bottleneck and twice-line-frequency variation. This paper proposed a multilevel inverter based on bridge modular switched-capacitor (BMSC) circuits with its superiority in conversion efficiency and power density. The topology is composed of dc–dc and dc–ac stages with independent control for each stage, aiming to improve system stability and simplify the control method. The BMSC dc–dc stage, which can be expanded to synthesize more levels, not only features multilevel voltage gain but also partially replaces the original bulk input capacitor and functions as an active energy buffer to enhance power-decoupling ability between dc and ac sides. In dc–ac stage, the control strategy of optimized unipolar frequency doubling sine-wave pulse width modulation is proposed to improve the quality of output waveform. Meanwhile, the multilevel voltage phase has been optimized to further reduce the power loss. Finally, a prototype has been built and tested. Associated with the simulation, the experimental results validate the practicability of these analyses. [ABSTRACT FROM PUBLISHER]

This paper characterizes the sampling effect in digital sinusoidal pulse width modulation (SPWM) of voltage source inverter (VSI). The time-domain analysis presented in this paper establishes the relation between the fundamental frequency, carrier frequency, and the sampling frequency at different modulation indices of the SPWM. The analysis investigates the effect of sampling frequency of the digital controller on the output of the VSI. It is shown that the low-frequency harmonic components appear in the frequency spectrum of the VSI output voltage due to sampling. As a result, the output current of digitally controlled VSI is stepped in nature. The double Fourier integral solution of the switched waveform for inner and outer integral limits has been used to derive the expression. The integral solution is obtained using Jacobi-Anger expansions. The generalized results developed in this paper are useful to investigate the sampling effect in high switching frequency DSPWM. The proposed sampling effect has been analyzed for SPWM of single-phase H-bridge inverter. The analytical results are verified using simulation and experimental results. The experimental results have been obtained with the use of field-programmable gate array (FPGA) as a digital controller. [ABSTRACT FROM PUBLISHER]

A new pulsewidth modulation (PWM) strategy which is an alternative approach of the discontinuous PWM (DPWM) for a three-level neutral-point-clamped (NPC) inverter is proposed in this paper. A three-level NPC inverter is completely mature and very well-established topology in high-power applications. However, the three-level NPC inverter has an inheritance problem of the neutral-point voltage unbalancing due to the split dc-link capacitors. This structure can cause large neutral-point voltage ripple. Furthermore, output currents of the three-level NPC inverter are distorted by the neutral-point voltage ripple. Therefore, the neutral-point voltage must be controlled. In this paper, a new DPWM method using two different offsets for the neutral-point ripple reduction is proposed and the effectiveness of the proposed DPWM method is verified by using the simulation and the experimental results. [ABSTRACT FROM PUBLISHER]

A four-level five-phase open-end winding (OeW) drive topology is introduced in this paper. The drive comprises a five-phase induction machine with open-end stator windings, supplied using two two-level voltage-source inverters with isolated and unequal dc-link voltages, in the ratio 2 : 1. The topology offers the advantages of a modular structure with fewer semiconductor components and has a greater potential for fault tolerance, as compared with an equivalent single-sided four-level drive. Due to the large number of switching states, development of a suitable space vector pulsewidth-modulation (PWM) method can be challenging. Hence, this paper examines the implementation of two-level-shifted carrier-based PWM methods. The effect of dead time on the drive performance is discussed, and it is shown that simultaneous PWM switching of both inverters can lead to degraded output phase voltage waveforms. Detailed analysis of this phenomenon is presented, a solution is proposed, and the modified modulation techniques are incorporated in an experimental setup, at first in conjunction with $V/f$ control. Once the proof of concept has been provided, full field-oriented control is implemented in this OeW drive topology for the first time; detailed experimental testing is conducted, and results are reported. [ABSTRACT FROM AUTHOR]

A merit of the interleaving reducing the switching harmonics allows for the reduction of the filter inductance. However, in the case of direct parallel voltage source inverters (VSIs), a severe circulating current occurs. To suppress the high frequency circulating current, coupled inductors (CIs) for the high impedance is inserted. However, the employed CIs induce a positive- or negative-sequence circulating current (i.e., a cross current) besides the zero-sequence circulating current already mentioned in the other papers. Due to different impedances developed by the current characteristics and the cross current in the CIs, VSIs becomes unstable when the resonant controllers are applied for the harmonic compensation such as 5, and 7th harmonics. In this paper, the cross currents and the impedances of CIs varying with the current characteristics are mathematically analyzed, and a novel current controller is proposed to solve this stability problem. The experimental results validate the proposed control scheme. [ABSTRACT FROM PUBLISHER]

A new single inductor dual buck full-bridge inverter is proposed in this paper. The inverter is improved on the basis of a dual buck inverter, and it retains the advantage of a no reverse recovery of body diode. The dc voltage utilization rate can be increased by adopting the voltage commutation bridge instead of the voltage-dividing capacitors in the inverter. In addition, comparing with other dual buck inverters, the inverter has just one filter inductor, which can make the volume and weight of the system decreased observably and improve the integration. The controlling method, combining the high- and low-frequency modulation, is adopted to weaken the complexity of control and improve the reliability and stability of the system. The operating principle, characteristic analysis, simulation and experiment are provided in this paper. A 1-kW prototype is established and tested, and the results of simulation and experiment verify the correctness of the theoretical analysis. [ABSTRACT FROM PUBLISHER]

As inverters are often used in critical applications, reliability is an important issue. In particular, the power electronic switches and gate drivers, the most essential components of the inverter, are vulnerable parts in real live operation. Therefore, this paper focuses on open-switch fault detection for multilevel inverters. When a single-switch open-circuit fault occurs in one of the power electronic switches, the algorithm can detect the fault and the switch that is causing it. The detection is worked out for both a linear resistive inductive load and an induction motor. The proposed algorithm is an extension of an already available finite-set model-based predictive control algorithm. Therefore, no extra hardware or measurements are required. This paper also discusses a suggested method for reconfiguration after fault detection. Computer simulation and experimental verifications validate the proposed methods. [ABSTRACT FROM PUBLISHER]

Exploiting the rich switching redundancies of the dual inverter, new hybrid pulsewidth-modulation (PWM) switching methods are proposed in this paper using the degree of freedom of operating the individual inverters independently, in addition to exercising the degree of freedom of controlling the switching action of the individual legs independently. Two voltage entities, namely, common-mode voltage (CMV) and differential-mode voltage are identified in the dual inverter, and all hybrid PWMs are envisaged aimed at reducing and also eliminating the CMV in it. The effects of such attempts on motor shaft voltage and also the motor bearing currents are presented in detail. Furthermore, bearing current profiles of an open-end winding induction motor are also presented with both conventional and hybrid PWMs proposed in this paper. Electric discharge machining discharge currents are completely eliminated with the use of all hybrid PWM methods proposed in this paper. In addition, implications of completely eliminating the CMV are also presented in this paper. All hybrid PWMs proposed in this paper are first simulated using MATLAB and are experimentally verified on a dual two-level inverter feeding a 1.1-kW 415-V 3- $\phi$ open-end winding induction motor drive. [ABSTRACT FROM PUBLISHER]

Multilevel inverters with dodecagonal (12-sided polygon) voltage space vector structure have advantages, such as complete elimination of fifth and seventh harmonics, reduction in electromagnetic interference, reduction in device voltage ratings, reduction of switching frequency, extension of linear modulation range, etc., making it a viable option for high-power medium-voltage drives. This paper proposes two power circuit topologies capable of generating multilevel dodecagonal voltage space vector structure with symmetric triangles (for the first time) with minimum number of dc-link power supplies and floating capacitor H-bridges. The first power topology is composed of two hybrid cascaded five-level inverters connected to either side of an open-end winding induction machine. Each inverter consists of a three-level neutral-point-clamped inverter, which is cascaded with an isolated H-bridge making it a five-level inverter. The second topology is for a normal induction motor. Both of these circuit topologies have inherent capacitor balancing for floating H-bridges for all modulation indexes, including transient operations. The proposed topologies do not require any precharging circuitry for startup. A simple pulsewidth modulation timing calculation method for space vector modulation is also presented in this paper. Due to the symmetric arrangement of congruent triangles within the voltage space vector structure, the timing computation requires only the sampled reference values and does not require any offline computation, lookup tables, or angle computation. Experimental results for steady-state operation and transient operation are also presented to validate the proposed concept. [ABSTRACT FROM PUBLISHER]

In this paper, the conventional I- and T-type three-level neutral-point-clamped (3L-NPC) inverter for low-voltage renewable energy systems is first investigated. Literature research shows that the T-type inverter improves I-type's insulated-gate bipolar transistor (IGBT) $+$ IGBT current paths. However, the IGBT $+$ diode paths are the same. The calculation in this paper further reveals that the IGBT $+$ diode current paths dominate the conduction losses and even the whole semiconductor losses. Based on the aforementioned recognitions, a novel T-type inverter is presented as an alternative to be applied in the low-voltage renewable energy systems. In the proposed 3L-NPC, four CoolMosfets replace the IGBT $+$ diode middle bidirectional switch. In the proposed topology, there is no diode involved in the current path supposing the unity power factor. In this way, the conduction loss is expected to be reduced compared with that from the conventional T-type 3L-NPC, particularly in the low and medium power ranges. [ABSTRACT FROM PUBLISHER]

In this paper, a real-time implementation of selective harmonic elimination pulsewidth modulation (SHEPWM) using generalized Hopfield neural network (GHNN) as applied to the single-phase inverter is designed and discussed. Finding the location of the switching instants in the case of SHEPWM involves the solution of a set of nonlinear algebraic transcendental equations. The problem is redrafted as an optimization problem, and it is solved by using GHNN. Though, in principle, the $n$ number of harmonics can be eliminated using the presented methodology, this paper tries for the case of the elimination of the 5th-, 7th-, 11th-, and 13th-order harmonics while retaining the desired fundamental. An energy function is formulated for this problem and the set of ordinary differential equations (ODEs) describing the behavior of GHNN is obtained. A program in KEIL C was developed to solve these systems of ODEs by the Runge–Kutta fourth-order method to give the switching instants for continuously varying modulation indexes $(M)$. A MATLAB simulation was carried out, and an experimental setup was also constructed in order to validate the simulated results. The fast Fourier transform analysis of the simulated output voltage waveform and the experimental output voltage waveform confirms the effectiveness of the proposed method. Hence, the proposed method proves that it is much applicable in the industrial applications by virtue of its suitability in real-time applications. [ABSTRACT FROM PUBLISHER]

A two-motor drive, supplied by a five-leg inverter, is considered in this paper. The independent control of machines with full dc-bus voltage utilization is typically achieved using an existing pulsewidth modulation (PWM) technique in conjunction with field-oriented control, based on PI current control. However, model predictive control (MPC), based on a finite number of control inputs [finite-control-set MPC (FCS-MPC)], does not utilize a pulsewidth modulator. This paper introduces three FCS-MPC schemes for synchronous current control in this drive system. The first scheme uses all of the available switching states. The second and third schemes are aimed at reducing the computational burden and utilize a reduced set of voltage vectors and a duty ratio partitioning principle, respectively. Steady-state and transient performances are analyzed and compared both against each other and with respect to the field-oriented control based on PI controllers and PWM. All analyses are experimental and use the same experimental rig and test conditions. Comparison of the predictive schemes leads to the conclusion that the first two schemes have the fastest transient response. The third scheme has a much smaller current ripple while achieving perfect control decoupling between the machines and is of low computational complexity. Nevertheless, at approximately the same switching loss, the PI-PWM control yields the lowest current ripple but with slower electrical transient response. [ABSTRACT FROM PUBLISHER]

This paper presents a comparison of two modulation methods for the seven-level switched-capacitor (SC) inverter using series/parallel conversion (SCISPC). The SCISPC is a multilevel inverter which has the less number of switching devices than the conventional multilevel inverters. The level-shifted pulsewidth modulation (PWM) (LS-PWM) was applied to the seven-level SCISPC in the previous research. In this paper, the level- and phase-shifted PWM (LPS-PWM) and the LS-PWM are applied to the seven-level SCISPC, and LPS-PWM is compared with LS-PWM for the seven-level SCISPC. The LPS-PWM has both the characteristics of the phase-shifted PWM (PS-PWM) and the LS-PWM. The voltage reduction during the discharging term of the SCs is reduced by means of the shorter discharging period compared to LS-PWM. The voltage ripple of the capacitors is also reduced, which leads to higher power conversion efficiency. The difference of the two modulation methods is confirmed by the theoretical approach, simulation with PSIM, and circuit experiment. [ABSTRACT FROM PUBLISHER]

A circuit configuration, a circuit topological family, a buck-mode active clamped circuit, and an instantaneous output voltage feedback control strategy of combined bidirectional buck–boost dc–dc chopper-mode inverter with high-frequency (HF) link (HFL) were proposed and fully investigated in this paper. The steady principle characteristic and the design criteria for the key circuit parameters were given in this paper. The circuit configuration is composed of two identical isolated bidirectional buck–boost dc–dc choppers with the same input and output filters. These two choppers in parallel at input end and in series at output end generate unipolarity sinusoidal pulsewidth modulation current waveforms with positive and negative half low-frequency cycles separately. The circuit topological family includes four circuit topologies, such as one-transistor mode. Taking the one-transistor mode circuit topology as an example, the 750VA48VDC/220V50HzAC prototype is designed and implemented. The theoretical analysis and principle test show the inverters have excellent performance. [ABSTRACT FROM PUBLISHER]