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Partial discharge (PD) detection is a fundamental tool for the design and diagnosis of insulation systems, particularly organic materials that must operate throughout their life without PD. While the methods for PD measurements under sinusoidal supply voltage are well-established, the same does not hold under repetitive-pulse voltage waveforms, such as those provided by inverters. Electromagnetic noise generated by electronic switch commutation in inverters can overlap with PD pulses, making it difficult to measure, separate from noise, and identify PD. This is particularly more cumbersome when fast rise-time switches are employed. To address these issues, this paper investigates methods to detect PD pulses on enameled wires under repetitive impulsive voltages with different rise times of 60, 500, and 1000 ns, proposing techniques which allow separation of PD from noise even when they overlap in time and frequency domains. This paper employs a time-domain approach using standard deviation curve acquired from a set of measurements to discriminate PD from repetitive commutation disturbance. These techniques can be implemented to achieve unsupervised noise rejection, which would be an important goal for both offline and online PD testing. The proposed approach is validated successfully through tests carried out on a low-voltage motor. [ABSTRACT FROM AUTHOR]

DC shipboard power systems have been considered as a promising solution for stricter environmental regulations on ships due to their main benefits in fuel savings with variable speed engines and easy integration of energy storage systems. In order to employ the dc solution in the shipboard power systems, the dc power systems have to be protected from a system fault with protection selectivity to minimize impacts of the fault or to avoid other undesirable situations in the system. For low-voltage dc shipboard power systems, a three-level protection has been proposed: 1) fast action (first)—bus separation by solid-state dc bus-tie switch; 2) medium action (second)—feeder protection by high-speed fuse; and 3) slow action (third)—generator–rectifier fault controls. This paper proposes a new method by means of additional bus capacitance added in main dc buses to help reliable operation of the three-level protection. The principle of the proposed method is introduced and the sizing of the additional bus capacitance is addressed in this paper. With the modeling of the dc shipboard power systems, the analyses of voltage drops for the bus separation failure and fault clearing time for the feeder protection are carried out to verify the proposed method. The results show that the proposed method not only mitigates the voltage drop for the bus separation failure, but also achieves the selectivity and the sensitivity for the feeder protection. [ABSTRACT FROM AUTHOR]

In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

A space vector modulation (SVM) technique of a dual-inverter system for an open-end winding motor drive is described in this paper, where one inverter has a battery power source and the other has an only capacitor across the dc bus. The SVM must be achieved to operate the motor with field-oriented control and simultaneously to control the capacitor voltage at a constant value by using redundant switching states of the dual-inverter system. The control of the capacitor voltage is carried out by selecting a charging or a discharging mode in each redundant switching state, taking the instantaneous motor power factor into account. In addition, it is also required to reduce the error voltage pulses, which are generated in output multilevel voltage waveforms during the dead time. The compensation method of the existing dead-time scheme and the improved SVM sequence to reduce the error voltage vectors are proposed in this paper. The proposed methods are examined through several experimental tests and are confirmed to generate superior output voltage waveforms from the viewpoint of the measured total harmonic distortion and dv/dt. [ABSTRACT FROM AUTHOR]

In this paper, a single-inductor dual-output (SIDO) dc–dc converter is proposed. The significant feature of the proposed converter is feeding a constant power load in low-voltage side (LVS) port, where even feeding a variable load at LVS does not have any cross regulation to high-voltage side port with the desired approximation. Magnificently, both merits are obtained in open-loop manner, which is an outstanding characteristic in comparison with that of the existed converters. In this paper, soft commutation and soft switching of switches and diodes are investigated along with the aforementioned main novelty. Moreover, detailed theoretical analyses of the proposed SIDO dc–dc converter in continuous conduction mode are presented besides the comparisons with some other structures. Finally, theoretical analyses are verified through a 1500 W experimental prototype results. [ABSTRACT FROM AUTHOR]

In this paper, a series-capacitor-based interleaving buck power factor correction (PFC) converter is proposed, the intermediate energy storage capacitance of which is operated at discontinuous capacitor voltage mode (DCVM), and automatic power factor (PF) correction for this converter is obtained. Moreover, the voltage across the series capacitor of the proposed PFC converter is clamped at the input voltage, and thus peak voltage stress existed in the traditional DCVM buck PFC could be relieved. By effectively regulating the charge/discharge time for the series capacitor, ultrahigh step-down conversion ratio of the proposed converter is achieved, the conversion ratio of which is independent of the duty cycle and only related to the switching frequency and circuit parameters. Therefore, high PF can be obtained due to very narrow deadtime of the input current. Meanwhile, the proposed PFC converter can realize the soft turn-on of part power switch and soft turn-off of part power diodes. In addition, comparing with the traditional discontinuous inductor current mode PFC, the input current of the proposed PFC converter is continuous so that the peak value and root-mean-square value of input current can be reduced. The operational principle, performance analysis, and parameter design principle are given in this paper. The analysis results show that the PF and total harmonic distortion are also independent of the duty cycle. Finally, a 220-Vac input, 60 W/15 V output experimental prototype is built to verify the validity of the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper proposes a capacitor voltage regulation method for the dual converter with a floating bridge for aerospace applications. This topology has previously been reported, but with a constrained voltage utilization factor due to the need for capacitor voltage regulations. In this paper, the effect of switching states on the voltage variation of capacitor is quantitatively modeled and an enhanced space vector modulation scheme with current feedback is proposed to achieve an active control of the floating capacitor voltages. This proposed method also allows further exploitation and utilization of converter voltage. The relationship between the allowed modulation index of dual converter and load power factor is obtained and expressed using a fitted polynomial equation. The advantages of the proposed method include boosted voltage utilization and superior performance in term of capacitor voltage balance. These advantages have been proven through simulation and experimental results on RL loads as well as with an open-end winding induction motor. The proposed modulation scheme can boost the converter voltage utilization by at least 10% while achieving full four-level operation. More importantly, the higher available voltage allows extending the constant torque region of the motor, the further beginning of field weakening operation could be postponed. [ABSTRACT FROM AUTHOR]

This paper proposes a visible light communication (VLC) system consisting of a single-stage buck–boost power factor correction converter operating in the discontinuous conduction mode with dimming capability. Additionally, this paper proposes the on–off M-frequency shift keying modulation for the VLC system. This modulation allows for the transmission of more than a single bit for each switching period without affecting the dimming characteristics of the light-emitting diode luminaire. The design of the whole system is discussed in detail, including both transmitter and receiver modules. A 20-W laboratory prototype was built in order to verify the proposed modulation scheme. The experimental evaluation showed a good performance of the transmitter, which was able to perform simultaneously the desired functions, namely power factor correction, dimming, and data transmission. The receiver also achieved the desired performance with a low bit error rate (BER). The results showed that the proposed system was able to transfer data between emitter and receiver with a bit rate of 1.11 Mb/s at a frequency of up to 375 kHz over a distance of 10 m, and with a BER lower than $10^{-3}$ under the influence of external lighting sources with illuminance levels up to 500 lx. [ABSTRACT FROM AUTHOR]

The extra-LC auxiliary-resonant-snubber-based converter (ELCARSC), as a soft-switching converter, has the advantages of low switching loss, low electromagnetic interference noise, and low-output distortion caused by the dead-time effect. However, the dead-time effect is still the main problem in a high-precision application. Besides, the traditional control and compensation methods rely on the accuracy of the circuit parameters, especially the junction capacitance, thus resulting in compensation error. Therefore, this paper proposed a novel high-precision control method through modulating the initial resonant current to eliminate the dead-time effect of ELCARSC. The method does not need complicated online calculation and reduces the dependence on the accuracy of the circuit parameters, especially the influence of the junction capacitances of the switches. In this paper, the dead-time effect of the ELCARSC is analyzed. The output voltage error with the conventional variable-timing control method is analyzed. Subsequently, the proposed modulated initial resonant current control is introduced. Finally, a prototype was developed that verified the effectiveness of the control method. The quality of the output current and voltage is improved by utilizing the proposed control method. However, the peak current of the auxiliary switch is increased. [ABSTRACT FROM AUTHOR]

A trinary multilevel converter uses a few heterogeneous H-bridge submodules (SMs) to synthesize an output voltage with multiple levels. Two major limitations of this converter are that it needs multiple dc sources and it cannot operate under pulsewidth modulation (PWM). This paper addresses these limitations by adding a low-voltage H-bridge SM to this converter and proposing a new switching algorithm. The resulting PWM-based asymmetric cascaded H-bridge converter uses only one dc source and synthesizes a high-quality output voltage. This improved converter can be a potential choice for real and reactive power support in power system applications. This paper also proposes methods for stability analysis and design of this converter. Experimental case studies evaluate the performance of the proposed converter for both standalone and grid-connected modes of operation. [ABSTRACT FROM AUTHOR]

This paper presents a uniform control strategy for the bidirectional ac/dc interlinking converter (BIC) in hierarchical controlled hybrid microgrid. The uniform control strategy unifies different control structures for multifunctional BIC in terms of power management, ac and dc voltage support. With the unified control structure, various triggering mechanisms for BIC mode-switch are not compulsory in response to the relevant scenario changes in the power network. Therefore, the negative consequences, such as unsmooth transition and system collapse due to the inaccurate or slower mode switch, can be avoided. Moreover, the uniform control strategy is also applicable for the hierarchical controlled hybrid microgrid, whose control architecture is typically comprised of the centralized and decentralized levels. This enables the communication fault ride-through capability and the impact from the communication failures can thus be mitigated. To sum up the above two features, the proposed control strategy is able to provide a smooth operation for the BIC without control mode switch in the event of unintentional scenario changes in power or communication network. To verify the validity of the proposed uniform control strategy, the controller hardware-in-the-loop experimental results have been provided in this paper. [ABSTRACT FROM PUBLISHER]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel fuzzified mechanical sensorless speed estimation technique for permanent magnet direct current (PMDC) brushed motor operated with pulse width modulation (PWM) based terminal voltage. For replacement of conventional mechanical speed sensors, few mechanical sensorless speed estimation techniques have been reported recently in the field of PMDC brushed motor. In this paper, a novel technique is applied over a recently reported semianalytical dynamic time-domain PMDC brushed motor model incorporating space-domain effects, namely slotting effect and commutation phenomenon to simulate the proposed estimation process. Ripple and back electromotive force based standalone estimation approaches are hybridized in order to eliminate uncertainties in all regions of estimation. In this paper, a discrete fuzzified hybrid speed estimation model has been proposed with adequate dynamic simulation responses. Further the proposed discrete speed estimation model has been applied experimentally over a PWM-driven 24-V, 12-teeth, 100-W PMDC brushed motor and various dynamic real-time responses have been compared with conventionally captured speed samples to validate the proposed model. [ABSTRACT FROM PUBLISHER]

In this paper, new half-bridge and full-bridge topologies for a switched-boost inverter are proposed. These topologies have a high boost factor in comparison with conventional types. In addition, the proposed topologies have continuous input current and can generate zero-voltage level in output. In this paper, the operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed. Moreover, the used switching pattern and its logical diagram are introduced. A comprehensive comparison between the proposed and conventional topologies in terms of the boost factor, the number of elements, and the efficiency shows the good features of the proposed inverters. Finally, to verify correct operation of the proposed topologies and derived equations, simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

The nine-switch converter is a multiport converter having two three-phase terminals and a dc-link, just like a 12-switch back-to-back (BTB) converter, but with 25% reduction of active switch count. However, the reduction from 12-switch to 9-switch may not always be an efficient choice considering losses in the switches. Only the load–source combination for the ac–ac common frequency mode and the source–source combination for the ac–dc different frequency (ac–dc DF) mode have been reported, so far, to yield relatively lower loss for the nine-switch converter. This paper shows that the nine-switch converter can have relatively lower loss even with a load–source combination, instead of only source–source combination in its ac–dc DF mode—when the upper terminal is connected to a dc load and the lower terminal is connected to an ac source. Mathematical proof is presented with derivation of the particular operating parameters for which the nine-switch converter will have comparatively lower losses. The analysis is validated with simulation and experimental results of a 1-kW system. Finally, the benchmark of the application criteria of the nine-switch converter for having lower conduction loss than the BTB converter is updated in this paper. [ABSTRACT FROM AUTHOR]

The aim of this paper is to study the dynamics of a permanent magnet direct current (PMDC) brushed motor while two crucial space-domain effects, namely, slotting effect and commutation phenomenon are taken into account. Semi-analytical dynamic time-domain PMDC brushed motor model inclusive of these space-domain effects is used to analyze and investigate the dynamics. Pulse width modulation operated discontinuous current PMDC brushed motor drive with steady duty cycle is employed to acquire the bifurcation patterns. The chaotic nature due to slotting effect and commutation is identified from the bifurcation patterns and reported. It also has to be admired that such nonlinear dynamical behavior with the same set of parameters at similar operating condition has not been observed when a conventional PMDC brushed motor dynamic model is considered. These space-domain effects, namely, slotting effect and commutation also have a prominent impact to make some time-domain states of a PMDC brushed motor drive chaotic. The role of slotting effect and commutation phenomenon to analyze the chaos over time-domain state variables of the PMDC brushed motor drive is investigated and validated experimentally in this paper. [ABSTRACT FROM PUBLISHER]

For power converters with inductive loads, a freewheeling path is needed for the current due to reactive power. The MOSFET synchronous rectification (SR) is widely used to reduce the conduction loss during the freewheeling period. Due to the wide band gap of silicon carbide (SiC), the intrinsic body diode of SiC MOSFET exhibits a high voltage drop. Hence, an antiparallel SiC Schottky diode is normally implemented to eliminate its conduction. However, the external SiC Schottky diode is not fully utilized as it only works during the dead time. In this paper, the hard-switching SR is investigated in an SiC three-phase inverter and compared with a conventional inverter using freewheeling diode (FWD). An improved power loss model for the two inverters has been developed. It is found that the inverter using SR has higher efficiency due to the smaller switching loss. A 7-kW prototype of SiC three-phase inverter is built, which achieves a peak efficiency of 98.8% ($\pm$ 0.15%) and 98.5% ($\pm$ 0.15%) at 40 kHz using SR and FWD, respectively. This paper confirms that the SiC MOSFET is an ideal candidate for the SR. [ABSTRACT FROM PUBLISHER]

This paper proposes a wide-range zero-voltage-switching (ZVS) active-clamped current-fed push–pull converter for fuel cell application. The presented converter achieves ZVS for all of the primary switches and ZCS for secondary diodes from rated load to 10% full load over the wide input voltage variation, improving the overall efficiency. The ZVS of switches is realized by the energy stored in the transformer leakage inductance aided by the secondary parallel inductor. An additional active clamping circuit suppresses the voltage spike as well as assists in realizing ZVS of switches. Low-voltage-rated switches with low on-state resistance can be used. Moreover, the voltage-doubler rectifier is adopted to release the reverse-recovery problem of rectifier diodes and reduce turns ratio of the high-frequency transformer. Detailed steady-state operation, analysis, design, control, comparative study, and experimental results are discussed in depth in this paper. Finally, a 200-W prototype has been built in the laboratory to verify the effectiveness of the proposed converter. [ABSTRACT FROM PUBLISHER]

In this paper, two topologies are presented for the enhanced-boost quasi-Z-source inverters (qZSI), namely continuous input current configuration and discontinuous input current configuration of enhanced-boost qZSI with two-switched impedance networks. Similar to enhanced-boost impedance-source inverters (ZSIs), these proposed inverter topologies possess very high boost voltage inversion at low shoot-through duty ratio and high modulation index to provide an improved quality output voltage. Compared to enhanced-boost ZSIs with two-switched Z-source impedance networks, these proposed inverter topologies share common ground with source and bridge inverter, overcome the starting inrush problem, and draw continuous input current and the lower voltage across the capacitors. Moreover, the input ripple current is negligible. This paper presents the operating principles and analysis of continuous input current configuration enhanced-boost qZSI with two-switched impedance networks and compares with ZSI, switched inductor ZSI, DA/CA-qZSI, and enhanced-boost ZSIs. The theoretical analysis is done and is validated through simulation and experimental results. [ABSTRACT FROM PUBLISHER]

Modular multilevel converter (MMC) has been one of the most popular candidates in high-voltage applications. However, reliability is a critical issue due to a large number of power switching devices and capacitors applied in the MMC. To improve the reliability of the MMC, a fast and reliable diagnosis strategy for the open-circuit fault is proposed in this paper, where submodule voltage sensors are relocated to the upper switching device. Furthermore, a voltage observer based on the submodule voltage sensor is established to monitor the capacitor and realize the power control of the MMC under normal operation. A Boolean logic operation based fault indicator is put forward based on the relationship of the operation state and binaried output of voltage sensors, which could detect and locate the open-circuit faults of the MMC very fast. The ratio of the increment of the observed and measured capacitor voltage during the period of positive arm current is applied to monitor the capacitor. The effectiveness of the proposed fault diagnosis strategy and the capacitor monitoring strategy is verified by the experiment results. [ABSTRACT FROM AUTHOR]

Conventional voltage balancers for the bipolar low-voltage dc (LVdc) distribution system have been composed of multiple power stages, which degrade their power density and cost effectiveness. To minimize the power stages, this paper presents a single-stage voltage balancer with high-frequency isolation. This voltage balancer is based on the three-level dual-active-bridge converter. Furthermore, for the proposed voltage balancer, an enhanced switching modulation, using the two switching patterns $\alpha$ and $\beta$ , is proposed to fully balance the bipolar voltage level under unbalanced load condition and even for when one of the dc poles has no load. Besides, a closed-loop control system can be implemented by using output voltage information and proportional-integral controllers. Finally, experimental results using a 3-kW laboratory prototype converter verify the effectiveness of the proposed voltage balancer. [ABSTRACT FROM AUTHOR]

This paper presents an improved rotating restart method for a sensorless permanent magnet synchronous motor (PMSM) drive system using repetitive zero voltage vectors. To restart the sensorless PMSM drive system, a method for estimating initial rotor position and speed is required due to the absence of sensors such as encoders and resolvers. The rotor position and speed can be estimated using the short-circuit current vectors generated by applying zero voltage vectors. However, the estimated rotor position and speed can be inaccurate. The inaccurate rotor position that causes the current is distorted by the back-electromotive force of the PMSM, and it is impossible to precisely control the system. Therefore, an improved rotating restart method for the sensorless PMSM drive system using repetitive zero voltage vectors is proposed. The effectiveness of the proposed method is verified through simulation and experimental results using a 5-kW PMSM drive system. [ABSTRACT FROM AUTHOR]

The conventional three-level inverter only has voltage buck capability. The quasi-Z-source three-level T-type inverter (QZS 3LT $^2$ I) has been proposed to realize voltage buck–boost operation. In this paper, we further propose a novel modulation scheme for the QZS 3LT $^2$ I to realize voltage boosting, reduce the common-mode voltage (CMV), and control the neutral-point voltage balance simultaneously. The proposed scheme adopts a large vector, a medium vector, a small vector with low CMV magnitude, a zero vector, and a shoot-through vector to generate the output voltage. According to sector number and neutral-point voltage difference, a p-type or n-type small vector with low CMV magnitude is properly selected to balance the neutral-point voltage. Shoot-through states are inserted within zero vector to boost the dc input voltage without affecting the ac output voltage. Dwell times of basic vectors are calculated through the revised volt–second balance equation. Furthermore, a coordinate control strategy between neutral-point voltage balance and voltage boosting is proposed. Doing so, the CMV magnitude can be restricted within one-sixth of dc-link voltage and neutral-point voltage imbalance can be effectively mitigated. The effectiveness of the proposed scheme is verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

In this paper, a voltage sensorless controller is developed for a two-switch single-phase rectifier that involves power factor correction and active pulsating power buffering without electrolytic capacitors. While a two-switch rectifier normally requires four sensed signals for control, only one current sensor is required in this proposal, thereby offering advantages such as low cost, high compactness, isolation between control and power circuits, and improved reliability. While the basic operating principle follows that of a conventional voltage sensorless controller for single-switch converters, several critical design considerations are the key to the success of the implementation which is explained in detail. The feasibilities of the controller are experimentally testified with a 100-W rectifier prototype regarding both steady state and dynamic performance. [ABSTRACT FROM AUTHOR]

A multilevel dodecagonal voltage space vector generation scheme for variable-speed drive applications with single-dc-link operation requires a large value of capacitance for cascaded H-bridge (CHB) filters, when operated at lower speeds. In existing schemes, the multilevel dodecagonal structure is obtained by cascading a flying capacitor inverter with a CHB. In this paper, a new scheme has been proposed to minimize the capacitance requirement for full speed operation by creating vector redundancies using modular and equal voltage CHBs. Also, an algorithm has been developed to optimize the selection of vector redundancies among the CHBs in order to minimize the voltage ripple of the floating capacitors. The proposed algorithm considers instantaneous capacitor voltages and phase currents for optimal selection of vector redundancies. A mathematical model for capacitor voltage deviation is presented, and the effectiveness of the proposed algorithm is verified in both the simulation and the experiment. [ABSTRACT FROM AUTHOR]

For photovoltaic applications, the flyback microinverter with pseudo-dc-link is popular as a simple topology but brings large transformer turns ratio and thus large leakage inductance, which would deteriorate the converter efficiency. To solve this issue, based on the nonisolated pseudo-dc-link structure, this paper proposed a hybrid boost–flyback/flyback (BF/F) microinverter. This new topology is operated at the BF mode for the most segment of a half grid cycle and the F mode for the rest. During the BF mode, high voltage gain with low voltage stress is easily available in minimized transformer turns ratio. Besides, the leakage energy is recycled and the turn-off voltage spike of the main switch is clamped, as a result of a passive snubber inherently contained in this mode. Given that the BF mode is lack of step-down function, the F mode is developed to regulate the output voltage even for values lower than the input voltage. The operation and characteristic of the hybrid BF/F microinverter in boundary conduction mode are analyzed in detail, and the mathematical expression of reference current is derived theoretically to guarantee high power quality. Finally, a 240 W prototype was implemented to validate the theoretical analysis and the benefits of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper proposes a novel isolated high step-down conversion circuit, called an integrated buck and modified push−pull (IBMPP) converter, which is able to lower the voltage level on the primary side of the ideal transformer, resulting in a lower turns-ratio and decreased leakage inductance. The IBMPP converter is able to prevent the duty cycle from operating in extremely low conditions. Furthermore, the proposed converter adopts active-clamp techniques to recycle leakage energy and to suppress voltage spikes, so that the conversion efficiency can be effectively improved. The advantages of the IBMPP converter are its simple topology, easy control mechanism (which requires only two signals with a 180-degree phase shift), high conversion ratio, low component counts for power switches, and less voltage stress on some of the switches on the high-voltage side. The operation principle, steady-state analysis, design considerations, and experimental results of the proposed IBMPP converter are presented in detail. The feasibility of the IBMPP is verified by hardware implementation. The full-load efficiency at 250 W is 81.44%, and the input and output voltages are 380 and 5 V, respectively. [ABSTRACT FROM AUTHOR]

In this paper, a new high voltage gain step-up dc–dc converter is proposed for interfacing renewable power generation. The configuration optimally integrates both the coupled-inductor and switched-capacitor techniques to achieve an ultra-high step-up gain of voltage conversion with low voltage stress and high efficiency. It consists of a voltage boost unit, a passive clamp circuit, and a symmetrical voltage multiplier network. The structure becomes modular and extendable without adding any extra winding for ultra-high step-up voltage gain. The proposed topology not only reduces the voltage stress on the main switch but also maintains it steady for the entire duty cycle range. Furthermore, the reverse recovery issue of the diodes is alleviated through the leakage inductance of the coupled inductor. The operation principle and steady-state analysis are presented in detail. Experimental evaluation validates the claimed advantages and demonstrates a well-distributed efficiency curve and the peak of 96.70%. [ABSTRACT FROM AUTHOR]

Power flow control in multiterminal HVdc (MTdc) grids is essential to restrict operation within permissible limits. A current flow controller (CFC) can achieve this. In this paper, the modeling, control, and simulation of resistive, RC-circuit-based, and capacitive CFCs is carried out. CFC prototypes have been developed and an MTdc grid test-rig has been employed for experimental validation. Results show that all devices achieve an effective power flow management. The impact of CFC deployment in future MTdc grids is assessed on droop-controlled converters. A voltage compensation-based method is proposed to minimize power deviations during unscheduled line current control. A protection scheme has been assessed under faults. [ABSTRACT FROM AUTHOR]

This paper deals with the analysis of the input dc-link voltage ripple in multilevel inverter based on H-bridge and level doubling network (LDN). The LDN is basically a half-bridge fed by a floating capacitor, with voltage self-balancing capability, recalling the concept of a flying capacitor configuration. The amplitude of the LDN voltage ripple is analytically determined considering both the low-order and the switching harmonic components. In particular, peak-to-peak distributions of voltage ripples over the fundamental period are analytically determined, making possible the design of dc-link capacitor relying only on the dc-voltage ripple requirements. The case study makes reference to negligible switching ripple in the output current. It well represents either grid connection or passive load having almost sinusoidal currents. Numerical simulations carried out by MATLAB/Simulink and a complete set of experimental verifications are given to confirm the theoretical developments. [ABSTRACT FROM AUTHOR]

According to different clamping methods, nine modes (C_MODE1-9) of the traditional discontinuous pulsewidth modulation (DPWM) for neutral-point-clamped three-level converter have been revealed. Since traditional DPWM cannot balance neutral point (NP) voltage under the full range of modulation index (MI) and power factor (PF), two extended modes (E _MODEs) are proposed in this paper, which can balance NP voltage. The proposed extended discontinuous pulsewidth modulation (EDPWM) is characterized by using C_MODEs and E_MODEs alternately.Therefore, EDPWM can balance NP voltage under the full range of MI and PF. Since the switching numbers under C_MODE and E_MODE in one switching cycle are two and three, respectively, the switching loss under EDPWM is lower than that under other pulsewidth modulation (PWM) strategies. The performance of EDPWM is analyzed and compared with traditional DPWM, space vector PWM (SVPWM) and virtual SVPWM (VSVPWM) in terms of switching loss, waveform quality, and the ability of NP voltage control. Finally, the feasibility and superiority of the proposed method are verified by experiments. [ABSTRACT FROM AUTHOR]

Thanks to the favorable advantage of low cost, integrated three-port dc–dc converters with reduced switches have attracted extensive attention. In order to provide more new topologies, this paper aims to propose a programmable topology derivation method, which effectively simplifies the cumbersome process of the conventional combination method. Instead of the manual connection and examination, the proposed alternative can quickly and rigorously derive multiple viable integrated three-port dc–dc topologies from a great number of possible connections with the aid of computer program. Besides, generalized analysis is also accomplished, with which performance characteristics of all derived converters are simultaneously obtained and then a comprehensive comparison can be easily conducted to select a preferred one for the practical application. Finally, an example-specific application with one input and two outputs is given, with topology selection, design, and experimental results demonstrated in detail. [ABSTRACT FROM AUTHOR]

Power converter is critical but prone to be failure in switched reluctance motor (SRM) drives. The open- and short-circuit fault characteristics of freewheeling diode in asymmetric bridge power converter are analyzed in details. Based on logic judgment, four online fault diagnostic methods with digital phase current analysis of power converter are proposed in this paper. The fault features are extracted by analyzing the relationship between chopping signal and the current information from some special positions. The four fault diagnostic methods are carried out according to the current obtained by detecting dc bus current and the lower freewheeling bus current, the chopped bus current, the upper excitation bus current and lower freewheeling bus current, the lower excitation bus current, and dc bus current, respectively. Comparisons between the four diagnostic methods are conducted. Simulations and experiments on a 12/8 SRM validate the effectiveness of the proposed methods. [ABSTRACT FROM AUTHOR]

This paper proposes two coupled-inductors-based Z-source networks, called the modified series and tapped switched-coupled-inductors quasi-Z-source networks (mSSCL-qZSN and mTSCL-qZSN, respectively). These networks offer high voltage gains with less-than-unity winding turn ratios $(n < {\text{1)}}$ , resulting in a reduced inductive element size. Other advantages include a less number of active components and their lower ratings and a higher efficiency. In addition, a lower magnetic core size is required for the proposed ZSNs due to the lower peak magnetizing current. The performance principles and detailed comparative analysis are provided and confirmed through experiments on a 200-W dc–dc converter. [ABSTRACT FROM AUTHOR]

In this paper, a new structure for symmetric and cascade multilevel converter is presented. This structure requires the least power electronic components, gate driver circuits, power diode, and dc voltage source. The number of output levels is high. Reduction of the number of power electronic switches against voltage levels is an important factor in multilevel converters due to safety in switches, circuit size, cost, installation area, and complexity in control. To maximize the number of output level in the proposed optimized structure in order to attain different goals, such as reduction of stress on switches, the result of comparing the proposed structure and other structures present. The proposed method is robust against the switching faults in multilevel converter for dc source and the equipment. The simulation and experimental results presented in this paper show the performance of the proposed method. [ABSTRACT FROM AUTHOR]

The large number of semiconductors typically implemented in multilevel converters generates large stray inductances in their commutation loops. As a consequence, high-voltage overshoots appear in the semiconductors during commutation which may limit the operation of the converter. The paper analyzes these overvoltages in the five-level active neutral-point-clamped (5L­ANPC) converter, one of the most popular five level converters and employed by ABB in its ACS­2000 drive. Experimental results show overvoltages almost three times higher than those corresponding to a two-level converter. In order to overcome this problem, the paper presents a new 5L­ANPC with the same characteristics (number of semiconductors, output waveform, switching frequency, efficiency, etc.), but with smaller overvoltages. This is achieved by adding some small capacitors to the busbar that behave like lossless snubbers but with a much simpler implementation. The experimental results illustrate the working principle of these capacitors and demonstrate the reduction of the overvoltages. As a result, the new converter can reach a higher output current or speed-up the commutations reducing, therefore, the losses and increasing the efficiency compared with the previous 5L­ANPC. [ABSTRACT FROM AUTHOR]

This paper presents a model predictive control technique applied to a dual-active bridge inverter where one of the bridges is floating. The proposed floating bridge topology eliminates the need for isolation transformer in a dual inverter system and therefore reduces the size, weight, and losses in the system. To achieve multilevel output voltage waveforms, the floating inverter dc-link capacitor is charged to the half of the main dc-link voltage. A finite-set model predictive control technique is used to control the load current of the converter as well as the floating capacitor voltage. Model predictive control does not require any switching sequence design or complex switching time calculations as used for space vector modulation; thus, the technique has some advantages in this application. A detailed analysis of the converter as well as the predictive control strategy is given in this paper. Simulation and experimental results to validate the approach are also presented. [ABSTRACT FROM PUBLISHER]

In this paper, a nonisolated bidirectional dc–dc converter is presented. The proposed converter consists of two boost converters to enhance the voltage gain. Four power switches with their body diodes are employed in the proposed converter. Also, two inductors and a capacitor are used as passive components. The input current is divided to the inductors which causes the efficiency to be high. The voltage gain of the proposed converter is higher than the conventional cascaded bidirectional buck/boost converter (CCBC) in step-up mode. Besides, the voltage gain in step-down mode is lower than CCBC. Besides, the efficiency of the proposed converter more than CCBC while the total stress on active switches are same. The simple structure of the proposed converter causes its control to be easy. The steady-state analysis of the proposed converter is discussed in this paper thoroughly. The stress on converters’ devices and the efficiency of the proposed converter and CCBC are compared in this paper. Finally, the proposed converter prototype circuit is implemented to justify the validity of the analysis. [ABSTRACT FROM PUBLISHER]

Two three-level inverters driving an open-end winding induction motor can generate equivalent voltage waveforms as a single five-level inverter-based drive. In addition, it can bring in benefits such as reduced dc-link voltage, less number of devices, and fault-tolerant capability, which is favored in high-power motor drive applications. The main challenge with this type of configuration is the appearance of large zero-sequence current circulating between the two inverters, which generates extra losses in the switching devices and the motor as well as affects the normal operation of the machine. Another challenge is to balance the dc-link neutral point voltage of the two three-level inverters. This paper has proposed a simplified decoupled space-vector pulsewidth-modulation (PWM) strategy to eliminate the averaged zero-sequence voltage in each switching cycle by the placement of redundant vectors of each individual inverter using a time shift. Neutral point voltage balance is further achieved by adjusting the time duration of the redundant vectors. In this paper, it is shown that it is possible to operate this kind of drive configuration with a single dc power supply and achieve averaged zero-sequence voltage elimination and neutral-point voltage balancing at the same time. Experimental results of a 5.5-kW dual three-level inverter drive using the proposed PWM strategy are presented, which validates the control method and drive configuration. [ABSTRACT FROM PUBLISHER]

The carrier-based pulsewidth modulation (CBPWM) and virtual space vector pulsewidth modulation (VSVPWM) for neutral point clamped three-level converter are reviewed briefly in this paper. A novel modulation strategy is proposed to maintain unconditional neutral point voltage balance under the full range of power factor and modulation index. The proposed PWM strategy is featured with three switching actions in one switching cycle, which is named 3SNPBPWM hereafter. In 3SNPBPWM, one phase is clamped to a certain level without switching action, and the other two phases have one and two switching actions in one switching cycle (SC), respectively. Moreover, a neutral point voltage recovery algorithm for 3SNPBPWM is also proposed. The performance of 3SNPBPWM is analyzed and compared with CBPWM and VSVPWM in terms of switching loss, waveform quality, and ability of neutral point voltage recovery. Finally, the feasibility and superiority of 3SNPBPWM are verified by experiment. [ABSTRACT FROM AUTHOR]

This paper proposes a dual-function dynamic voltage restorer (DFDVR) with fault current-limiting capability. The new topology can operate under different modes: the short-circuit fault current-limiting mode and the compensation mode for voltage fluctuation. Different functions of the DFDVR are achieved by controlling a brake chopper circuit and antiparallel thyristors. During fault conditions, the antiparallel thyristors are deactivated to protect the dc-side capacitor, and the duration of the on- and off-periods of the semiconductor switch in the brake chopper circuit is controlled to adjust fault current amplitudes. During voltage sags, the antiparallel thyristors are activated, and the brake chopper circuit is turned off by controlling the gate turn-off thyristor in the brake chopper circuit, thus making the DFDVR similar to a conventional DVR. The control scheme and optimal parameter selection of the DFDVR are provided. The design methodology of the DFDVR was verified through simulations performed using the PSCAD/EMTDC software. The experimental results prove the capability and effectiveness of the DFDVR topology. [ABSTRACT FROM AUTHOR]

In this paper, a new multi-input multi-output (MIMO) dc–dc converter with high step-up capability is proposed for wide power ranges. Also, in order to increase each output voltage, diode–capacitor voltage multiplier (VM) stages are utilized in the proposed converter. The number of input stages, output stages, and VM stages are arbitrary and dependent on design conditions. At first, the general structure of proposed MIMO converter is presented. Then, in order to explain the converter operation, we walk through the design of a 1-kW four-input two-output example, including loss and efficiency calculations. We validate the design with a prototype that matches efficiency calculations. [ABSTRACT FROM AUTHOR]

When fast voltage control is used in a power factor control, the ripple of the dc link causes current harmonics. This paper proposes a method to reduce the harmonic content of a fast voltage loop in a power factor correction, which can both produce low distortion during steady-state operation and fast recovery from a load transient. The performance is achieved by using a Takagi–Sugeno-type nonlinear controller for dc-link voltage control. The proposed nonlinear control is compared with linear proportional–integral (PI) control, which is tuned to meet the standardized regulations for the harmonic content in a 3-kW single phase power supply. The results show that the presented nonlinear voltage controller can maintain the dynamic performance of the linear control with reduced current harmonics. It is also shown that the used nonlinear control method requires only marginally more complex control algorithm compared to commonly used linear PI control. [ABSTRACT FROM AUTHOR]

This paper presents a new reconfiguration module for asymmetrical multilevel inverters in which the capacitors are used as the dc links to create the levels for staircase waveforms. This configuration of the multilevel converter makes a reduction in dc sources. On the other hand, it is possible to generate 13 levels with lower dc sources. The proposed module of the multilevel inverter generates 13 levels with two unequal dc sources (2VDC and 1VDC). It also involves two chargeable capacitors and 14 semiconductor switches. The capacitors are self-charging without any extra circuit. The lower number of components makes it desirable to be used in wide range of applications. The module is schematized as two back-to-back T-type inverters and some other switches around it. Also, it can be connected as a cascade modular which leads to a modular topology with more voltage levels at higher voltages. The proposed module makes the inherent creation of the negative voltage levels without any additional circuit (such as H-bridge circuit). Nearest level control switching modulation scheme is applied to achieve high-quality sinusoidal output voltage. Simulations are executed in MATLAB/Simulink and a prototype is implemented in the power electronics laboratory in which the simulation and experimental results show a good performance. [ABSTRACT FROM AUTHOR]

In this paper, an input-series flyback converter with the coupled-inductor-based passive snubber is proposed, where the input-series converter is based on transformer integration, and the passive snubber is composed of inductors, capacitors, and diodes. The inductors of the snubber in various series modules are made on a common magnetic core, and the coupled-inductor scheme is adopted. With the help of the coupled inductor, active input voltage sharing of the input-series converter can also be achieved after the switches are turned off, and voltage sharing of the switch in each series module can be ensured, which overcome the shortcomings of the existing input-series flyback converter. Active voltage sharing processes caused by the coupled inductor are analyzed in detail. Furthermore, the design guideline of the passive snubber is discussed. Finally, the experimental study has been done on a 1500 Vdc/60 W laboratory-made prototype composed of three flyback series modules, and the feasibility of the proposed method and the theoretical analysis is verified by the experimental results. [ABSTRACT FROM AUTHOR]

In this paper, an expandable single-input three-output high step-up dc–dc boost converter is proposed. The voltage conversion ratio of the output ports of the converter can be increased by inductor-diode-capacitor and diode-capacitor cells. The proposed converter can be applied in renewable energy conversion systems, such as in photovoltaic and fuel cells. Also, due to the three output ports of the converter, it can be utilized in portable devices which require high voltage conversions. The main advantage of the proposed converter is supplying loads with different voltages and current ranges due to the expandable structure of the converter. Besides, the proposed converter has the merit of achieving high voltage gains at high frequencies without preselecting wide duty cycles. Furthermore, the proposed converter is able to achieve higher voltage ranges without having any transformer or coupled inductors in its structure; consequently, the related drawbacks are avoided. The switching pattern of the converter is simple and both switches are on and off simultaneously. In this study, a single switching period of the proposed converter, the voltage conversion ratios of the output ports and the expanded form of the structure are analyzed theoretically. Finally, to verify the theoretical results, the experimental results for 40-V input/200-V, 100-V and 360-V outputs with total 600-W output power are extracted and compared with each other. [ABSTRACT FROM AUTHOR]

This paper presents a sinusoidal pulsewidth modulation (SPWM) based direct digital control with average-voltage model (AVM) and division–summation process for paralleled three-phase three-wire (3φ3W) grid-connected converters to reduce circulating currents. With the direct digital control, plant of each single-phase converter can be derived directly, and a controller is then designed to cover the variation effects of filter inductance and grid voltage. Based on SPWM and AVM over a switching cycle, each 3φ3W converter can be decomposed into three single-phase converters and each converter is controlled individually to track its sinusoidal reference current tightly, reducing circulating currents significantly. Equal current sharing is therefore also achieved. The control laws for achieving grid connection are derived in detail. In the design and implementation, the inductances corresponding to various inductor currents are measured offline and stored in the controller for scheduling loop gain cycle by cycle. Experimental and simulated results from a three-converter system confirm the analysis and discussion of the proposed control approaches. [ABSTRACT FROM AUTHOR]

A nonisolated bidirectional dc–dc converter with high voltage gain, low voltage stress, low component count, and soft-switching features is presented in this paper. In this topology, coupled inductors and voltage multiplier cells are merged to achieve high step-up/down voltage gain. Also, due to using active clamp circuits, the voltage stress of power switches is relatively low. Thus, the low voltage switches with low on-resistance can be employed to reduce the conduction losses. Furthermore, zero-voltage switching is accomplished in both high step-up and high step-down modes for all power switches, and due to zero-current switching operation of all antiparallel diodes, the reverse recovery losses are reduced. In order to verify the theoretical analysis and the converter performance, a 200 W prototype circuit of the proposed converter is implemented in the laboratory. [ABSTRACT FROM AUTHOR]

In recent years, modular multilevel converter (MMC) is considered for medium-voltage variable speed drives (VSD) due to its modularity and higher reliability. However, the major drawback of the MMC-based VSD is the higher capacitor ripple voltage at lower operating speeds. In literature, this ripple voltage is reduced by injecting a high-frequency circulating current into each arm. This additional circulating current increases the overall current rating of the devices, inductors, and capacitors. Alternatively, the capacitor ripple voltage can be reduced at the lower output frequency by reducing the dc-bus voltage. This paper proposes a new configuration using a multipulse diode-bridge rectifier to reduce the dc-bus voltage when the drive is operated at lower speeds. Therefore, the capacitor ripple voltage decreases without injecting any circulating current. In addition, a new technique is proposed to maintain the peak-to-peak value of the submodule capacitor ripple voltage constant at near-zero speed. The proposed converter with 24-pulse rectifier configuration is simulated in MATLAB/Simulink, and the experimental validation is carried out on a prototype with 12-pulse rectifier. [ABSTRACT FROM AUTHOR]

To reduce the common-mode voltage (CMV) and eliminate the CMV spikes for two-level voltage source inverters (2L-VSIs), an improved model predictive control (MPC) based CMV reduction method is proposed in this paper considering dead-time effects. First, an improved voltage vector (VV) preselection strategy is proposed to reduce the CMV spikes caused by the dead time. Second, a new hybrid VV preselection strategy based on a delay compensation strategy and a modified current sector division strategy is proposed to completely eliminate the CMV spikes. As the proposed hybrid VV preselection based MPC strategy makes full use of the six nonzero VVs of the 2L-VSI, the current total harmonic distortions and ripples are reduced. The simulation and experiments are carried out to verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]