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This paper presents a high-efficiency inverter with the aid of the soft-switching technology, which is accomplished by the resonance of the in-series inductance with the snubber capacitance. The equivalent circuit of the quarter-phase ultrasonic motor is initially deduced, based on which the topology along with the operations of the novel inverter is subsequently presented. The configuration of the new quarter-phase inverter shows its uniqueness in terms of the shared arms and the especially designed snubber capacitance in comparison with the existing inverters. The circuit analysis infers that the dead time of the inverter is the key factor to arrive at the zero-voltage-switching or the zero-current-switching operations. Experimental measurements have demonstrated that the efficiency of the whole drive increases by a factor of 1.25 after replacing the traditional inverter with the proposed one. It should also be noted that the proposed inverter in association with the design method of the dead time not only can work for the quarter-phase ultrasonic motor, but also can be applicable for other kinds of quarter-phase devices. The soft-switching operations are achieved in the quarter-phase inverter for the first time, whose amplitudes of the output voltage and switching frequency are not required to be constant any more. [ABSTRACT FROM AUTHOR]

Two parallel interleaved two-level (2L) three-phase voltage source inverters (VSIs) can be analyzed as a single three-level (3L) VSI. A generalized carrier-based method is proposed in this paper for implementing different 3L pulsewidth modulation (PWM) techniques using two parallel interleaved 2L VSIs. The proposed method modifies the given three-phase reference signals of 3L VSI for implementation of the PWM technique using two parallel interleaved 2L VSIs. The influence of nonidealities on the equivalent 3L PWM switching sequences is also discussed. To overcome the effect of nonidealities, a new modified discontinuous PWM technique (MDPWM1) is proposed. The analysis of different performance indices is carried out for different 3L PWM techniques, and the key advantages of different PWM techniques are identified. Simulation and experimental results are also presented. [ABSTRACT FROM AUTHOR]

This paper explores a power-conversion system for single-phase transformerless ac module application. A nonisolated high-gain dc–dc stage is coupled with a doubly grounded dynamic dc-link inverter to implement the microinverter topology. The front-end boost stage steps up the single-module voltage to a higher dc voltage, typically to 200 or 400 V as required for the following inverter stage. It is a hybrid of an interleaved boost and switched capacitor concept capable of achieving high gain while simultaneously maintaining reduced voltage and current stress, and thus lowering switching and conduction loss for most of the switches. By directly connecting the grid neutral to the photovoltaic (PV) negative, the doubly grounded voltage swing inverter has the advantage of zero capacitive-coupled common-mode ground currents, critical for transformerless PV inverters. The two dc links of the inverter stage share the double-line frequency power decoupling with a combination of higher value of mean voltage and relatively large 120-Hz ripple component–the dynamic dc-link approach. Through an optimization algorithm, the decoupling capacitance is minimized enabling an all-film capacitor implementation while satisfying the converter's operating constraints over a wide range of power factors. The simulation as well as experimental results from a GaN-based hardware prototype validate the converter's performance. [ABSTRACT FROM AUTHOR]

The development of a photovoltaic ac module composed of a high static gain nonisolated dc–dc converter with current source output characteristic followed by an unfolding low-frequency inverter is presented in this paper. The operation of the dc–dc converter with high static gain and with reduced switch voltage is obtained using the Cuk converter integrated with the switched-inductor technique. The nonisolated structure allows the elimination of the volume and losses of the power transformer and leakage inductance, and an output filter configuration is proposed to reduce the high-frequency ground leakage current. The grid-tied inverter operating in a discontinuous conduction mode (DCM) allows a sinusoidal output current with low harmonic distortion (THD = 3.72%) to be obtained without current control loop and without the use of a current sensor at the output. The maximum power point tracking operation is obtained without the use of the current sensor. The DCM operation increases the current stress, but the proposed converter presents two switches and two input inductors sharing the input current in these components. The theoretical analysis, design procedure, and experimental results are presented for a prototype with a dc input voltage Vi = 30 V, an ac output voltage Vo = 127 V, and output power Po = 180 W. [ABSTRACT FROM AUTHOR]

To reduce the common-mode voltage (CMV) and eliminate the CMV spikes for two-level voltage source inverters (2L-VSIs), an improved model predictive control (MPC) based CMV reduction method is proposed in this paper considering dead-time effects. First, an improved voltage vector (VV) preselection strategy is proposed to reduce the CMV spikes caused by the dead time. Second, a new hybrid VV preselection strategy based on a delay compensation strategy and a modified current sector division strategy is proposed to completely eliminate the CMV spikes. As the proposed hybrid VV preselection based MPC strategy makes full use of the six nonzero VVs of the 2L-VSI, the current total harmonic distortions and ripples are reduced. The simulation and experiments are carried out to verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

In this paper, a fixed switching frequency model predictive current controller is designed and implemented on a sensorless five-level packed U-cell (PUC5) inverter interfacing the utility. The predictive control methodology is based on a voltage vector generation technique for the cost function optimization by nullifying its derivative. The aim of the controller is to allow a fixed-frequency operation with no iterations while operating as a utility line current regulator. A pulsewidth modulator based on employing PUC5 redundant switching states fixes the PUC5 auxiliary dc bus capacitor voltage to its desired level with no necessity of a regulator; the overall technique reduces system complexity with less sensors and no loops in the predictive algorithm making it suitable for industrial applications. System discrete model is developed and experimental results verify the performance of the designed controller in making a fast response in regulating the grid current and balancing the capacitor voltage. [ABSTRACT FROM AUTHOR]

To solve the problem of poor robustness due to the high dependence of model predictive control (MPC) on the three-phase inverter model, the influence mechanism of the mismatch of circuit parameters R and L, the model discretization error, and sampling errors on MPC prediction error are analyzed in this paper. A feedback self-correction is proposed, which the next current errors are predicted and used to modify the model, based on the previous prediction errors. This proposed method involves simple structure and a small amount of calculation. Steady-state effects of the proposed method are quantized to prove a good inhibitory ability on multifactorial prediction errors. Finally, experimental results in a three-phase inverter are presented to support the theoretical analysis and demonstrate the feasibility of the proposed method. [ABSTRACT FROM AUTHOR]

Multilevel inverters are now-a-days being applied in electric vehicles (EV). Considering the dynamic operating conditions of an EV propelled by an induction motor, this paper proposes a flexible discontinuous modulation strategy for three-level neutral-point-clamped (NPC) inverter that can shift modulation pattern seamlessly from sinusoidal pulsewidth modulation (SPWM) to discontinuous PWM (DPWM). The modulation scheme is generalized at each degree of discontinuity to ensure minimum switching losses for variable load power factors. Additionally, a hybrid voltage balancing strategy, which comprises two sets of compensating offset signals with complementary features, has been introduced to mitigate voltage deviation problem at neutral point of the inverter. The unique feature of the proposed hybrid balancing approach is that it generates uniform compensating neutral current regardless of the level of discontinuity. This results in identical and predictable voltage balancing dynamics for the entire modulation transition covering SPWM and DPWM. It has been shown that the proposed hybrid balancing strategy does not lose its unbalance compensation strength even during transition from one modulation pattern to another. The effectiveness of the proposed scheme for wide variations in operating conditions is studied through extensive simulation, and validated in experimentation using a prototype NPC inverter with induction motor loads. [ABSTRACT FROM AUTHOR]

Wireless power transfer with a self-tuning LCC inverter using pulsewidth modulation (PWM) controlled switched capacitor is proposed in this paper in order to compensate for the variations of Tx inductance. Usually, receivers contain magnetic and conductive materials for shielding and mechanical support. The inductance of the Tx coil is sensitive to the variation of Tx–Rx alignment because the interaction between the Tx coil and the Rx magnetic–conductive materials is also varied. It is shown that the detuning of the Tx inductance value exacerbates the losses in the LCC inverter. In the proposed method, the PWM duty ratio of a single capacitor adjusts the effective output impedance of the LCC inverter. The PWM feedback loop is designed such that the power factor and the real-part impedance of the LCC inverter are maximized. The PWM switch is turned on at zero voltage and turned off with low dv/dt, minimizing switching losses. Such a soft-switching tunable capacitor can handle higher power compared to the traditional hard-switching capacitor, p-n junction capacitor, or an analog IC capacitor. Another advantage of the proposed technique is the continuity in achievable capacitance value using only one capacitor. The feedback can be fully implemented by analog components, obviating the necessity of digital samplings, ADC/DACs, and microcontrollers. The power of 54 W is transferred at 76.6% and 60.7% with and without the proposed method, respectively. [ABSTRACT FROM AUTHOR]

Soft-switching inverters can achieve high efficiencies and low switchdv/dtanddi/dt, but often impose additional stress on the switches due to their resonant behavior. Multicell converters, on the other hand, can process high voltages by arranging the switches to share the stress. This paper proposes a buck–boost multicell soft-switching inverter with inherent cell voltage balancing. Both the current and voltage stresses are shared by the cells. Soft-switching conditions are achieved for all switching transitions without any need for auxiliary circuitry or clamps. A multiple-winding transformer transfers energy between the terminals and provides galvanic isolation. An analytical study and experimental results on a 1200-W prototype verify the operation of the inverter. [ABSTRACT FROM AUTHOR]

In this paper, a fast and practical method is proposed for open-circuit (OC) fault diagnosis (FD) in a three-phase quasi-Z-source inverter (q-ZSI). Compared with the existing fast OC FD techniques in three-phase voltage source inverters, this method is more cost-effective since no ultrafast processor or high-speed measurement is required. Additionally, the method is independent of the load condition. The proposed method is only applicable to Z-source family inverters and is based on observing the effect of shoot-through intervals on the system variables during switching periods. The proposed algorithm includes two consecutive stages: OC detection and fault location identification. When both stages of the OC FD algorithm are done, a redundant leg is activated and utilized instead of the failed leg. The accuracy of the proposed method is confirmed by the experimental results from a low-voltage q-ZSI prototype. [ABSTRACT FROM AUTHOR]

Recently, a few fault-tolerant control strategies have been proposed for T-type three-level inverters to improve the reliability of the inverter system. However, the neutral-point (NP) voltage oscillations suppression is never considered in the previous fault-tolerant control strategies. In order to suppress the NP voltage oscillations when open-circuit fault occurs to NP switches, this paper proposes two novel fault-tolerant control strategies named as improved two-level switching tolerant control and hybrid switching tolerant control (HS-TC). Both methods are implemented by adding an optimal time-offset to the three-phase turn-ontimes. The corresponding time-offset value of each method is simply calculated considering the phase current and dwell time of [O] state. Moreover, an NP voltage balancing algorithm to eliminate the dc deviation and a dc bias to further reduce the NP voltage oscillations are used in the HS-TC. The performance and comparison of the tolerant controls with respect to the NP voltage oscillations, current total harmonic distortion, and dynamic response are illustrated and analyzed through the simulation and experimental results. [ABSTRACT FROM AUTHOR]

Conventional two-level as well as multilevel voltage-source-inverter topologies with a hexagonal voltage-space vector structure generate low-order harmonics in the machine terminal voltages when operated beyond the linear modulation range in variable speed drive application. Progressing from hexagonal to a higher sided polygonal voltage-space-vector structure (VSVS) suppresses significant low-order harmonics throughout the modulation range. In addition, the linear modulation range will also be enhanced very near to the base speed. In this paper, for the first time, the generation of a multilevel 24-sided VSVS using a single dc source for induction-motor drives is proposed. A cascaded topology with a dc-source-fed flying-capacitor inverter and two low-voltage capacitor-fed H-bridge cells forms the power circuit. The features and advantages of the proposed scheme are validated through experimental results and discussions. [ABSTRACT FROM AUTHOR]

This paper proposes advanced speed control for a five-leg voltage source inverter (FLVSI) that drives the dual three-phase induction motor system used in industrial manufacturing processes. The advanced speed control method consists of two controllers: 1) The first is a slip controller that satisfies the application requirement, i.e., to control the mechanical speed of two motors equally regardless of the load condition. 2) The second is an angle controller that satisfies the FLVSI requirement, i.e., to control the phase angle difference between the two motors for minimizing the common leg current because the common leg current can be twice higher than other leg's current depending on the operation condition of the dual motor. Stability analysis of the two controllers under advanced speed control is implemented, and the whole performance of the advanced speed control for the FLVSI-fed dual-motor drive system is shown to identify its feasibility through the experimental results. [ABSTRACT FROM AUTHOR]

Usually, the parallel-compensated inductive power transfer (IPT) topology fed by a current-source inverter is controlled through variable switching frequency and fixed 50% duty cycle method. This enables the system to operate at resonance frequency, which drifts due to load and other parameter variations. Owing to this control constraint, the load requirements are fulfilled by adding extra dc–dc chopper at the output. This paper presents a new control technique for a parallel–series/series IPT network, fed from a full-bridge current-source inverter to meet the load demand directly by an inverter. Therefore, the extra chopper stage at the output side of the converter is eliminated. The control goals are achieved through a two-loop control method, where the inner input current loop controls the source current and the outer output current loop meets the load requirements. The detailed steady-state operation, converter design, small-signal modeling, and control are reported, and experimental results obtained from a 1.6-kW lab prototype are included to verify the mathematical analysis. [ABSTRACT FROM AUTHOR]

In this paper, performances on two kinds of aggregated flyback microinverters are compared in aspect of harmonic resonances, which are controlled by current feedback control and peak current control. Based on the Norton models of flyback microinverters obtained by a small-signal modeling approach, potential harmonic resonances with the grid are analyzed. Following that, an impedance-based stability criterion is proposed, where the resonance frequency can be calculated and predicted based on the derived Norton models and the system admittance matrix of aggregated microinverters. After comprehensive analysis and comparisons, it is found that the peak-current-control-based flyback microinverters has better performance on damping the harmonic resonances than the current feedback controlled one. Simulations and experiments are carried out for verifying the effectiveness of the presented models and the correctness of the analysis results. [ABSTRACT FROM AUTHOR]

This paper proposes a transformerless line-interactive uninterruptible power supply (UPS) with low ground leakage current. A high-efficiency bidirectional inverter is suggested, which performs the line-interactive UPS functions with low ground leakage current. It has a full-bridge inverter and a bidirectional switch, which operate with the unipolar pulsewidth modulation. Because the bidirectional switch operates at the line-frequency, switching losses can be lower than the previous transformerless inverters. As the inverter operates, the parasitic capacitance between the inverter and the ac voltage ground is clamped to zero voltage for a positive line cycle and to the ac voltage for a negative line cycle, respectively. Thus, the parasitic capacitance can be prevented from being charged or discharged, which ensures the absence of the ground leakage current. The operation modes of the proposed system are described. The control schemes are presented to design the proposed inverter for the line-interactive UPS. Experimental results for a 2.0 kW prototype are discussed to verify the performance of the proposed system. [ABSTRACT FROM AUTHOR]

In this paper, a three-level quasi-switched boost T-type inverter (3L qSBT2I) is proposed. A new pulse-width modulated (PWM) control method is presented to reduce the inductor current ripple of the qSBT2 I. In the introduced PWM technique, the shoot-through duty cycle is maintained constant to keep the modulation index as high as possible. Then, the only control parameters of the qSBT2I are the duty cycles of the two additional switches. By controlling the duty cycles of the two additional switches, the voltage gain of the proposed qSBT2 I can be improved to a value larger than that of the conventional 3L impedance source inverters. The steady-state analysis, operating principles, and comparisons with the impedance source-based 3L inverters are presented. A 1-kW prototype is constructed to verify the operating principle of the 3L qSBT2I. An indirect dc-link voltage regulator and a capacitor voltage-balance controller are applied to the proposed qSBT2I. Simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

This paper proposes a zero-sequence circulating current (ZSCC) control scheme for the multiparalleled three-level T-type inverters (3LT2Is). Based on the analysis with the proposed generalized model of multiparalleled 3LT2Is, it is seen that the ZSCC is influenced by the circuit parameters, duty cycles, and the circulating currents of the l th and first 3LT2I. To mitigate the circulating currents, a deadbeat control strategy for n-paralleled (n≥3) inverters is proposed, which is realized by adjusting the duty cycle of the small vectors in each PWM sampling period. Compared with the conventional PI control method, the ZSCC spike is mitigated with the proposed scheme, thus improving the quality of the output currents. Also, the reliability of the 3LT2Is system is improved because such a scheme only needs the information about the ZSCC and zero-sequence duty ratio in the l th and the first inverter. The proposed method can also be applied to the neutral-point-clamped converters. Simulation and experimental results verify the effectiveness of the theoretical analysis and the proposed method. [ABSTRACT FROM PUBLISHER]

Microinverters operating into the single-phase grid from new energy source with low-voltage output face the challenges of efficiency bottleneck and twice-line-frequency variation. This paper proposed a multilevel inverter based on bridge modular switched-capacitor (BMSC) circuits with its superiority in conversion efficiency and power density. The topology is composed of dc–dc and dc–ac stages with independent control for each stage, aiming to improve system stability and simplify the control method. The BMSC dc–dc stage, which can be expanded to synthesize more levels, not only features multilevel voltage gain but also partially replaces the original bulk input capacitor and functions as an active energy buffer to enhance power-decoupling ability between dc and ac sides. In dc–ac stage, the control strategy of optimized unipolar frequency doubling sine-wave pulse width modulation is proposed to improve the quality of output waveform. Meanwhile, the multilevel voltage phase has been optimized to further reduce the power loss. Finally, a prototype has been built and tested. Associated with the simulation, the experimental results validate the practicability of these analyses. [ABSTRACT FROM PUBLISHER]

This paper characterizes the sampling effect in digital sinusoidal pulse width modulation (SPWM) of voltage source inverter (VSI). The time-domain analysis presented in this paper establishes the relation between the fundamental frequency, carrier frequency, and the sampling frequency at different modulation indices of the SPWM. The analysis investigates the effect of sampling frequency of the digital controller on the output of the VSI. It is shown that the low-frequency harmonic components appear in the frequency spectrum of the VSI output voltage due to sampling. As a result, the output current of digitally controlled VSI is stepped in nature. The double Fourier integral solution of the switched waveform for inner and outer integral limits has been used to derive the expression. The integral solution is obtained using Jacobi-Anger expansions. The generalized results developed in this paper are useful to investigate the sampling effect in high switching frequency DSPWM. The proposed sampling effect has been analyzed for SPWM of single-phase H-bridge inverter. The analytical results are verified using simulation and experimental results. The experimental results have been obtained with the use of field-programmable gate array (FPGA) as a digital controller. [ABSTRACT FROM PUBLISHER]

A new pulsewidth modulation (PWM) strategy which is an alternative approach of the discontinuous PWM (DPWM) for a three-level neutral-point-clamped (NPC) inverter is proposed in this paper. A three-level NPC inverter is completely mature and very well-established topology in high-power applications. However, the three-level NPC inverter has an inheritance problem of the neutral-point voltage unbalancing due to the split dc-link capacitors. This structure can cause large neutral-point voltage ripple. Furthermore, output currents of the three-level NPC inverter are distorted by the neutral-point voltage ripple. Therefore, the neutral-point voltage must be controlled. In this paper, a new DPWM method using two different offsets for the neutral-point ripple reduction is proposed and the effectiveness of the proposed DPWM method is verified by using the simulation and the experimental results. [ABSTRACT FROM PUBLISHER]

In this paper, a single-stage solution for solar photovoltaic (PV) pumping system using a dual-inverter fed open-end winding induction motor drive is presented. The three-level dual-inverter requires a low PV bus voltage compared with its conventional three-level counterpart. This could avoid large string of PV modules and helps in reducing the voltage rating of the capacitors and semiconductor devices used in the system. This may further help in reduction of cost of the system. The proposed single-stage system is operated using an integrated control algorithm, which includes the maximum power point tracking (MPPT), the $V/f$ control, and the sample-averaged zero-sequence elimination (SAZE) pulsewidth modulation (PWM) technique. While the MPPT algorithm ensures the extraction of maximum power from the PV source, the $V/f$ control improves the motor pump performance. Furthermore, the zero-sequence current is avoided by the SAZE PWM algorithm. Thus, the integrated control algorithm improves the overall performance of the system. Furthermore, this paper also presents the details of system design and analysis of its dynamic behavior during transient environmental conditions. The performance of the system is verified using MATLAB simulation and hardware prototype. [ABSTRACT FROM PUBLISHER]

The traditional space-vector pulsewidth modulation (SVPWM) maximum voltage transfer ratio (VTR, i.e., the ratio of the output voltage fundamental amplitude to the input voltage fundamental amplitude) is 0.866 in a linear modulation region. In this paper, the output voltage fundamental amplitude and total harmonic distortion (THD) affected by a basic vector and a hexagon vector in traditional indirect SVPWM overmodulation are analyzed. The traditional indirect SVPWM overmodulation usually focuses on the inverter stage to improve the VTR, and there are few methods considering both of the inverter and rectifier stages to improve the overmodulation performance of a matrix converter (MC), including output voltage error, and output and input current THDs. In this paper, a new overmodulation method based on indirect SVPWM is presented. Both the output performance and input performance of the MC with the proposed and traditional overmodulation methods are emulated and tested. Simulation results indicate that the output voltage error and the input current THD are smaller and lower, respectively, with the proposed method. Experimental results verify that theoretical analysis is right, and the proposed overmodulation method is feasible. [ABSTRACT FROM PUBLISHER]

A four-level five-phase open-end winding (OeW) drive topology is introduced in this paper. The drive comprises a five-phase induction machine with open-end stator windings, supplied using two two-level voltage-source inverters with isolated and unequal dc-link voltages, in the ratio 2 : 1. The topology offers the advantages of a modular structure with fewer semiconductor components and has a greater potential for fault tolerance, as compared with an equivalent single-sided four-level drive. Due to the large number of switching states, development of a suitable space vector pulsewidth-modulation (PWM) method can be challenging. Hence, this paper examines the implementation of two-level-shifted carrier-based PWM methods. The effect of dead time on the drive performance is discussed, and it is shown that simultaneous PWM switching of both inverters can lead to degraded output phase voltage waveforms. Detailed analysis of this phenomenon is presented, a solution is proposed, and the modified modulation techniques are incorporated in an experimental setup, at first in conjunction with $V/f$ control. Once the proof of concept has been provided, full field-oriented control is implemented in this OeW drive topology for the first time; detailed experimental testing is conducted, and results are reported. [ABSTRACT FROM AUTHOR]

Multiphase variable-speed drives and generation systems (systems with more than three phases) have become one of the mainstream research areas during the last decade. The main driving forces are the specific applications, predominantly related to the green agenda, such as electric and hybrid electric vehicles (EVs), locomotive traction, ship propulsion, “more-electric” aircraft, remote offshore wind farms for electric energy generation, and general high-power industrial applications. As a result, produced body of significant work is substantial, making it impossible to review all the major developments in a single paper. This paper therefore surveys the recent progress in two specific areas associated with multiphase systems, namely power electronic supply control and innovative ways of using the additional degrees of freedom in multiphase machines for various nontraditional purposes. [ABSTRACT FROM AUTHOR]

A merit of the interleaving reducing the switching harmonics allows for the reduction of the filter inductance. However, in the case of direct parallel voltage source inverters (VSIs), a severe circulating current occurs. To suppress the high frequency circulating current, coupled inductors (CIs) for the high impedance is inserted. However, the employed CIs induce a positive- or negative-sequence circulating current (i.e., a cross current) besides the zero-sequence circulating current already mentioned in the other papers. Due to different impedances developed by the current characteristics and the cross current in the CIs, VSIs becomes unstable when the resonant controllers are applied for the harmonic compensation such as 5, and 7th harmonics. In this paper, the cross currents and the impedances of CIs varying with the current characteristics are mathematically analyzed, and a novel current controller is proposed to solve this stability problem. The experimental results validate the proposed control scheme. [ABSTRACT FROM PUBLISHER]

A new single inductor dual buck full-bridge inverter is proposed in this paper. The inverter is improved on the basis of a dual buck inverter, and it retains the advantage of a no reverse recovery of body diode. The dc voltage utilization rate can be increased by adopting the voltage commutation bridge instead of the voltage-dividing capacitors in the inverter. In addition, comparing with other dual buck inverters, the inverter has just one filter inductor, which can make the volume and weight of the system decreased observably and improve the integration. The controlling method, combining the high- and low-frequency modulation, is adopted to weaken the complexity of control and improve the reliability and stability of the system. The operating principle, characteristic analysis, simulation and experiment are provided in this paper. A 1-kW prototype is established and tested, and the results of simulation and experiment verify the correctness of the theoretical analysis. [ABSTRACT FROM PUBLISHER]

As inverters are often used in critical applications, reliability is an important issue. In particular, the power electronic switches and gate drivers, the most essential components of the inverter, are vulnerable parts in real live operation. Therefore, this paper focuses on open-switch fault detection for multilevel inverters. When a single-switch open-circuit fault occurs in one of the power electronic switches, the algorithm can detect the fault and the switch that is causing it. The detection is worked out for both a linear resistive inductive load and an induction motor. The proposed algorithm is an extension of an already available finite-set model-based predictive control algorithm. Therefore, no extra hardware or measurements are required. This paper also discusses a suggested method for reconfiguration after fault detection. Computer simulation and experimental verifications validate the proposed methods. [ABSTRACT FROM PUBLISHER]

Connecting legs in parallel in a voltage source inverter is a way to increase the output current and, thus, its rated power. The connection can be made using either coupled or uncoupled inductors, and achieving an even contribution to the output current from all the legs is a crucial issue. Circulating currents produce additional losses and stress to the power devices of the converter. Therefore, they should be controlled and minimized. An efficient technique to attain such balance when coupled inductors are used is presented in this paper. The proposed technique can also be used when the inductors are uncoupled, since it is a particular case where the coupling coefficients are zero. This technique does not include proportional–integral controllers and does not require any parameter tuning either. The exact control action needed to reach current balance is straightforwardly calculated and applied. Experimental results are shown in this paper to verify the efficiency of the proposed balancing method. [ABSTRACT FROM PUBLISHER]

Exploiting the rich switching redundancies of the dual inverter, new hybrid pulsewidth-modulation (PWM) switching methods are proposed in this paper using the degree of freedom of operating the individual inverters independently, in addition to exercising the degree of freedom of controlling the switching action of the individual legs independently. Two voltage entities, namely, common-mode voltage (CMV) and differential-mode voltage are identified in the dual inverter, and all hybrid PWMs are envisaged aimed at reducing and also eliminating the CMV in it. The effects of such attempts on motor shaft voltage and also the motor bearing currents are presented in detail. Furthermore, bearing current profiles of an open-end winding induction motor are also presented with both conventional and hybrid PWMs proposed in this paper. Electric discharge machining discharge currents are completely eliminated with the use of all hybrid PWM methods proposed in this paper. In addition, implications of completely eliminating the CMV are also presented in this paper. All hybrid PWMs proposed in this paper are first simulated using MATLAB and are experimentally verified on a dual two-level inverter feeding a 1.1-kW 415-V 3- $\phi$ open-end winding induction motor drive. [ABSTRACT FROM PUBLISHER]

Multilevel inverters with dodecagonal (12-sided polygon) voltage space vector structure have advantages, such as complete elimination of fifth and seventh harmonics, reduction in electromagnetic interference, reduction in device voltage ratings, reduction of switching frequency, extension of linear modulation range, etc., making it a viable option for high-power medium-voltage drives. This paper proposes two power circuit topologies capable of generating multilevel dodecagonal voltage space vector structure with symmetric triangles (for the first time) with minimum number of dc-link power supplies and floating capacitor H-bridges. The first power topology is composed of two hybrid cascaded five-level inverters connected to either side of an open-end winding induction machine. Each inverter consists of a three-level neutral-point-clamped inverter, which is cascaded with an isolated H-bridge making it a five-level inverter. The second topology is for a normal induction motor. Both of these circuit topologies have inherent capacitor balancing for floating H-bridges for all modulation indexes, including transient operations. The proposed topologies do not require any precharging circuitry for startup. A simple pulsewidth modulation timing calculation method for space vector modulation is also presented in this paper. Due to the symmetric arrangement of congruent triangles within the voltage space vector structure, the timing computation requires only the sampled reference values and does not require any offline computation, lookup tables, or angle computation. Experimental results for steady-state operation and transient operation are also presented to validate the proposed concept. [ABSTRACT FROM PUBLISHER]

In this paper, the conventional I- and T-type three-level neutral-point-clamped (3L-NPC) inverter for low-voltage renewable energy systems is first investigated. Literature research shows that the T-type inverter improves I-type's insulated-gate bipolar transistor (IGBT) $+$ IGBT current paths. However, the IGBT $+$ diode paths are the same. The calculation in this paper further reveals that the IGBT $+$ diode current paths dominate the conduction losses and even the whole semiconductor losses. Based on the aforementioned recognitions, a novel T-type inverter is presented as an alternative to be applied in the low-voltage renewable energy systems. In the proposed 3L-NPC, four CoolMosfets replace the IGBT $+$ diode middle bidirectional switch. In the proposed topology, there is no diode involved in the current path supposing the unity power factor. In this way, the conduction loss is expected to be reduced compared with that from the conventional T-type 3L-NPC, particularly in the low and medium power ranges. [ABSTRACT FROM PUBLISHER]

This paper proposes an analytical procedure for computation of all pairs of valid switching angles used in pattern generation in five-level H-bridge cascaded inverters. The proposed procedure eliminates harmonic components from inverter output voltage and, for each harmonic, returns the exact boundaries of all valid modulation index intervals. Due to its simple mathematical formulation, it can be easily implemented in real time using a digital signal processor or a field-programmable gate array. In this paper, after a detailed description of the method, simulation and experimental results demonstrate the high quality of achievable results. [ABSTRACT FROM PUBLISHER]

In this paper, a real-time implementation of selective harmonic elimination pulsewidth modulation (SHEPWM) using generalized Hopfield neural network (GHNN) as applied to the single-phase inverter is designed and discussed. Finding the location of the switching instants in the case of SHEPWM involves the solution of a set of nonlinear algebraic transcendental equations. The problem is redrafted as an optimization problem, and it is solved by using GHNN. Though, in principle, the $n$ number of harmonics can be eliminated using the presented methodology, this paper tries for the case of the elimination of the 5th-, 7th-, 11th-, and 13th-order harmonics while retaining the desired fundamental. An energy function is formulated for this problem and the set of ordinary differential equations (ODEs) describing the behavior of GHNN is obtained. A program in KEIL C was developed to solve these systems of ODEs by the Runge–Kutta fourth-order method to give the switching instants for continuously varying modulation indexes $(M)$. A MATLAB simulation was carried out, and an experimental setup was also constructed in order to validate the simulated results. The fast Fourier transform analysis of the simulated output voltage waveform and the experimental output voltage waveform confirms the effectiveness of the proposed method. Hence, the proposed method proves that it is much applicable in the industrial applications by virtue of its suitability in real-time applications. [ABSTRACT FROM PUBLISHER]

A two-motor drive, supplied by a five-leg inverter, is considered in this paper. The independent control of machines with full dc-bus voltage utilization is typically achieved using an existing pulsewidth modulation (PWM) technique in conjunction with field-oriented control, based on PI current control. However, model predictive control (MPC), based on a finite number of control inputs [finite-control-set MPC (FCS-MPC)], does not utilize a pulsewidth modulator. This paper introduces three FCS-MPC schemes for synchronous current control in this drive system. The first scheme uses all of the available switching states. The second and third schemes are aimed at reducing the computational burden and utilize a reduced set of voltage vectors and a duty ratio partitioning principle, respectively. Steady-state and transient performances are analyzed and compared both against each other and with respect to the field-oriented control based on PI controllers and PWM. All analyses are experimental and use the same experimental rig and test conditions. Comparison of the predictive schemes leads to the conclusion that the first two schemes have the fastest transient response. The third scheme has a much smaller current ripple while achieving perfect control decoupling between the machines and is of low computational complexity. Nevertheless, at approximately the same switching loss, the PI-PWM control yields the lowest current ripple but with slower electrical transient response. [ABSTRACT FROM PUBLISHER]

This paper presents a comparison of two modulation methods for the seven-level switched-capacitor (SC) inverter using series/parallel conversion (SCISPC). The SCISPC is a multilevel inverter which has the less number of switching devices than the conventional multilevel inverters. The level-shifted pulsewidth modulation (PWM) (LS-PWM) was applied to the seven-level SCISPC in the previous research. In this paper, the level- and phase-shifted PWM (LPS-PWM) and the LS-PWM are applied to the seven-level SCISPC, and LPS-PWM is compared with LS-PWM for the seven-level SCISPC. The LPS-PWM has both the characteristics of the phase-shifted PWM (PS-PWM) and the LS-PWM. The voltage reduction during the discharging term of the SCs is reduced by means of the shorter discharging period compared to LS-PWM. The voltage ripple of the capacitors is also reduced, which leads to higher power conversion efficiency. The difference of the two modulation methods is confirmed by the theoretical approach, simulation with PSIM, and circuit experiment. [ABSTRACT FROM PUBLISHER]

A circuit configuration, a circuit topological family, a buck-mode active clamped circuit, and an instantaneous output voltage feedback control strategy of combined bidirectional buck–boost dc–dc chopper-mode inverter with high-frequency (HF) link (HFL) were proposed and fully investigated in this paper. The steady principle characteristic and the design criteria for the key circuit parameters were given in this paper. The circuit configuration is composed of two identical isolated bidirectional buck–boost dc–dc choppers with the same input and output filters. These two choppers in parallel at input end and in series at output end generate unipolarity sinusoidal pulsewidth modulation current waveforms with positive and negative half low-frequency cycles separately. The circuit topological family includes four circuit topologies, such as one-transistor mode. Taking the one-transistor mode circuit topology as an example, the 750VA48VDC/220V50HzAC prototype is designed and implemented. The theoretical analysis and principle test show the inverters have excellent performance. [ABSTRACT FROM PUBLISHER]

This paper presents an advanced space vector modulation (SVM) strategy for a three-to-five-phase indirect matrix converter (IMC) to reduce common-mode voltage (CMV) with enhanced output performance. By replacing zero and medium voltage vectors with large voltage vectors to synthesize desired output voltage, the five-phase inverter stage modulation can reduce the CMV peak value by 47%, compared with the conventional SVM. In order to compensate the degraded output performance due to the absence of the zero voltage vectors, the rectifier stage modulation is modified by utilizing the two-vector and three-vector modulation techniques. Consequently, by combining the modulations of the rectifier and inverter stages, the proposed modulation strategy can suppress the CMV, as well as improve the output performance of the three-to-five-phase IMC. Simulation and experimental results are provided to verify the effectiveness of the proposed modulation strategy. [ABSTRACT FROM PUBLISHER]

This paper proposes two new open-circuit fault detection methods suitable for the diagnosis of power electronics converters. The faulty semiconductor devices are identified using conducted and radiated electromagnetic signatures of the dc bus through nonintrusive measurements. The first method uses a low-cost electromagnetic interference filter to collect the common-mode emissions signature. The second one utilizes an external antenna to collect the emitted near-field signature. Both methods are tested on a three-level neutral point clamped inverter (NPC) inverter with the aim to identify the clamping diodes open-circuit faults. Indeed, each open-circuit fault affects the common-mode emission signature in the time-domain, while the fast Fourier transform of the emitted near-field showed substantial reduction of spectrum amplitude at a specific radio frequency range and the appearance of a new spectral rail. The effectiveness of these two methods has been tested through numerical simulations and validated by experimental results which confirmed its high performance in detecting single as well as multiple open-circuit faults for three-level NPC inverter. [ABSTRACT FROM PUBLISHER]

Impedance network inverters are the best alternatives for voltage-source and current-source inverters. The boosting capability and the shoot-through solution of such converters make them excellent solutions for various applications. Nevertheless, hard switching forces the converter to operate in low switching frequency, which results in a bulky impedance network. Moreover, the coupling between the shoot-through duty cycle and the inverter modulation index makes a tradeoff between the voltage gain and the modulation index (output voltage harmonics). This paper presents a novel dual switching frequency modulation to mitigate the switching losses of the converter, which results in a more compact impedance network. The proposed method combines a high-frequency pulse width modulation with a low-frequency sinusoidal pulse width modulation (SPWM). Therefore, the switching losses decrease considerably with respect to the conventional simple boost modulation. In addition, the impedance network design frequency remains high, and the network size decreases obviously. The proposed approach removes the interdependence between the shoot-through duty cycle and the inverter modulation index. A comparison between the proposed method and the conventional simple boost method is performed to show its advantages over the conventional method. Finally, experimental results are presented to validate the performance of the proposed method. [ABSTRACT FROM PUBLISHER]

In this paper, the remedial operation of switch faults will be investigated comprehensively for T-type-three-level-inverter-fed dual three-phase motor drives. The open-circuit switch faults in multiple phase legs are discussed at first. The faulty conditions are classified into five categories. Different remedial strategies, namely Type-I to Type-V schemes, are proposed for different faulty conditions. In particular, three kinds of Type-III fault-tolerant control schemes are proposed by using medium-voltage vectors to synthesize small-voltage vectors, in such a way that the mid-point voltage in a dc link can be stabilized well. Then, the short-circuit faults in both clamping switches and half-bridge switches are investigated. By analysis, their operation conditions are equivalent to conditions loss of both P and N voltage levels and open-phase faults, respectively. Thus, the corresponding remedial strategies can be applied accordingly. Particularly, a voltage compensation control method is proposed for conditions, where open-switch faults coexist with open-phase operation induced by short-circuit faults in half-bridge switches. The validity of all of theoretical analysis and the proposed remedial strategies has been verified by experiments. [ABSTRACT FROM PUBLISHER]

This paper proposes the combination of a novel modified quasi-Z-source (MqZS) inverter with a single-phase symmetrical hybrid three-level inverter in order to boost the inverter three-level output voltage. The proposed single-phase MqZS hybrid three-level inverter provides a higher boost ability and reduces the number of inductors in the source impedance, compared with both the single-phase three-level neural-point clamped quasi-Z-source inverter and the single-phase quasi-Z-source cascaded multilevel inverter. Additionally, it can be extended to obtain the nine-level output voltage by cascading two three-level pulse width modulation switching cells with a separate MqZS and a dc source, which herein is called a single-phase MqZS cascaded hybrid five-level inverter (MqZS-CHI). A modified modulation technique based on an alternative phase opposition disposition scheme is suggested to effectively control the shoot-through state for boosting the dc-link voltage and balancing the two series capacitor voltages of the MqZS. The performances of both the proposed MqZS-CHI and the modulation techniques are verified through simulation and experimental results. [ABSTRACT FROM PUBLISHER]

This paper presents a nine-level active-neutral-point-clamped (ANPC) based multilevel inverter (MLI) topology for grid-connected applications requiring only ten switches. The envisaged structure comprises two parts, namely five-level ANPC unit, and a two-level converter leg whose midpoint is used as another ac terminal. An ad hoc switching state redundancy based modulation strategy is used to ensure that the voltage across the flying capacitor is tightly balanced and is implemented using a look-up table further simplifies the control complexity. The performance and effectiveness of the proposed topology with its control scheme are validated through simulations and experimental tests. Comparison with other MLIs is included to highlight the merits of the proposed topology. From the results, it will be shown that the proposed inverter requires the least part count as compared to other topologies with the same performance and output quality. [ABSTRACT FROM PUBLISHER]

A new space vector modulation, i.e., ZSVM3, for three-phase quasi-Z-source rectifier (qZSR) is proposed. All switches in the three-phase bridge can be turned on and turned off with zero current or zero voltage using the proposed ZSVM3 with no auxiliary circuit. The current through the inductors of the quasi-Z-source network operates in a boundary conduction mode or discontinuous conduction mode to achieve all freewheeling diodes turned off with zero-current switching (ZCS). At the same time, the switch in the quasi-Z-source network can be turned on with ZCS. Besides, the voltage stress of all switches is equal to dc-link voltage. The operation principle of the qZSR is analyzed in detail, and the calculated value of the quasi-Z-source inductor is given. The proposed theory in this paper is verified by a 2-kW prototype. [ABSTRACT FROM PUBLISHER]

In trasformerless grid-connected photovoltaic (PV) systems, common-mode voltage (CMV) fluctuations cause leakage current flow through the stray capacitance of the PV panels. Shoot-through states in a quasi-Z-source inverter (q-ZSI) increase the amplitude of high-order harmonics of CMV. In this paper, by using the modulation technique based on odd pulse width modulation and minor change in the Z network of the three-phase q-ZSI, the leakage current is blocked. No extra semiconductor element is added. By the proposed technique, CMV is kept nearly constant during switching cycles. The experimental results for CMV analysis in a \text1\;\textkW prototype are presented to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

Cascaded H-bridge (CHB) multilevel inverters (MLIs) have been widely used for power electronics systems. While high-voltage blocking across power switches is not a constraint for low voltage applications, the research trend has been oriented to the design of more compact module topologies as an alternative for CHB. Despite the generation of more voltage levels with reduced switch count, the existing module topologies in recent literature take no account of the freewheeling current path during dead-time, thus, inducing multistep jumps in voltage levels and giving rise to undesirable voltage spikes. Addressing this concern, this paper proposes two symmetrical compact-module topologies for cascaded MLI, where freewheeling current path during dead-time is provided for smooth transition between voltage levels to prevent voltage spikes. The proposed 7-level and 13-level compact-modules demonstrated low number of conducting switches for all voltage levels. Comprehensive analysis and comparison with the latest module topologies are conducted. To validate the operation of the proposed compact-module topologies, simulation and experimental results are presented. [ABSTRACT FROM PUBLISHER]

Multilevel inverters (MLIs) have replaced conventional two-level inverters for medium-voltage high-power industrial applications. One of the best modulation techniques for MLIs is the space vector modulation (SVM). Although SVM has its own advantages, it has been overlooked for much simpler carrier-based modulation schemes in the industry. Nearest level modulation (NLM) is a simple alternative, which is functionally similar to SVM. In this paper, a new generalized SVM algorithm is presented, in which the SVM is achieved using the concept of NLM. A generalized switch matrix is introduced to derive gate pulses for the inverter, which further simplifies the algorithm. The algorithm is tested and verified for a three-phase, three-level, and five-level neutral-point-clamped inverters in both simulation and hardware. [ABSTRACT FROM PUBLISHER]

In this paper, two switched-capacitor quasi-switched boost inverters (qSBIs) are proposed. By adding one capacitor and one diode to the qSBIs, the proposed inverters achieve high voltage gain with low voltage stress on active switches, capacitors, and diodes. The proposed inverters can extend to n-cell for voltage gain improvement. The operating principle, steady-state analysis, and impedance parameter selections of the proposed inverter are presented. A full comparison between the proposed inverter and other impedance-source inverters is addressed. A 500-W prototype is built to verify the operating theory of the proposed inverter in both the standalone mode and the grid-connected mode. Simulation and experimental results validate the theoretical analysis. [ABSTRACT FROM PUBLISHER]

Z-source networks are recently being employed to enhance the boosting capability of matrix converters. This paper concentrates on cascaded Z-source ultrasparse matrix converter (ZSUSMC), where the Z-source network is placed between the three-switch input rectifier stage and the six-switch output inverter stage. Two space vector modulation schemes, with and without a zero state in the rectifier stage modulation, are presented and their advantages and disadvantages are discussed. In addition, restrictions imposed on the converter operation in buck mode, which arise from unidirectional nature of the ultrasparse matrix converter, are discussed and a solution is proposed for offsetting those limitations. Furthermore, an optimal switching pattern, which results in minimum possible number of changes in the switching states as well as even distribution of the shoot-through state over the entire control period, is proposed. Also, common-mode voltages of the converter in all possible switching configurations are calculated. Hardware-in-the-loop studies of a ZSUSMC-based permanent magnet synchronous motor drive are carried out to evaluate the performance of the drive under the proposed modulation techniques. The obtained results are compared with a recent study and the superiority of the proposed method in terms of converter input/output current quality is demonstrated. [ABSTRACT FROM PUBLISHER]