249 results on '"Tsui, Bing-Yue"'
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2. Triple Self-Aligned Split-Gate Architecture for High-Speed Applications of 4H-SiC VDMOSFETs
3. A 4H-SiC Trench MOS Capacitor Structure for Sidewall Oxide Characteristics Measurement
4. Defect Inspection Techniques in SiC
5. Time-dependent dielectric breakdown of gate oxide on 4H-SiC with different oxidation processes
6. Schottky barrier diodes isolated by local oxidation of SiC (LOCOSiC) using pre-amorphization implantation technology
7. Well-behaved 4H-SiC PMOSFET with LOCal oxidation of SiC (LOCOSiC) isolation structure and compromised gate oxide for Sub-10V SiC CMOS application
8. Metal Contact on P-Type 4H-SiC With Low Specific Contact Resistance and Micrometer-Scale Contact Area
9. Reduction of Contact Resistivity by Nano-Textured Contact
10. A Study on the Impact of Gamma Rays Irradiation on 4H-SiC CMOSFETs
11. Investigation of Positive Bias Temperature Instability of 4H-SiC MOS Capacitors and Deep Interface States Extraction at 300°C
12. Influence of Post-Ion-Implantation Annealing Temperature on the Characteristics of Gate Oxide on 4H Silicon Carbide
13. Characterization of 4H-SiC PMOSFET with P+ Poly-Si Gate
14. A multi-contact six-terminal cross-bridge Kelvin resistor (CBKR) structure for evaluation of interface uniformity of the Ti-Al alloy/p-type 4H-SiC contact
15. Investigation of Safe Operating Area on 4H-SiC 600V VDMOSFET with TLP and UIS Test Methods
16. Improving Radiation Hardness of 4H-SiC Power Devices by Local-Oxidation of Silicon Carbide (LOCOSiC) Isolation
17. Strong Fermi-level pinning induced by argon inductively coupled plasma treatment and post-metal deposition annealing on 4H-SiC
18. Improving Radiation Hardness of 4H-SiC Power Devices by Local-Oxidation of Silicon Carbide (LOCOSiC) Isolation
19. Design and Characterization of the Junction Isolation Structure for Monolithic Integration of Planar CMOS and Vertical Power MOSFET on 4H-SiC up to 300 °C
20. A study on NiGe-contacted Ge n+/p Ge shallow junction prepared by dopant segregation technique
21. Modeling and Characterization of the Narrow-Width Effect of 4H-SiC MOSFETs With Local Oxidation of SiC Isolation
22. Bias-Induced Instability of 4H-SiC CMOS
23. Dual Gate Oxide CMOS Process on 4H-SiC
24. Design, Process, and Characterization of Complementary Metal–Oxide–Semiconductor Circuits and Six-Transistor Static Random-Access Memory in 4H-SiC
25. An Evaluation for Quality Inspection of Epitaxial Layer and Heavily-doped 4H-SiC Substrate by Simple Schottky Barrier Diode and MOS Capacitor
26. Device isolation process for 4H-SiC CMOS ICs
27. Effect of surface preparation on the radiation hardness of high-dielectric constant gate dielectric
28. A Study on the Isolation Ability of LOCal Oxidation of SiC (LOCOSiC) for 4H-SiC CMOS Process
29. 1100 V, 22.9 mΩcm2 4H-SiC RESURF Lateral Double-Implanted MOSFET With Trench Isolation
30. High Voltage Gain 4H-SIC CMOS Technology Featuring LOCal Oxidation of SiC (LOCOSiC) Isolation and Balanced Gate Dielectric
31. Demonstration of CMOS Integration With High-Voltage Double-Implanted MOS in 4H-SiC
32. Digital Logic and Asynchronous Datapath With Heterogeneous TFET-MOSFET Structure for Ultralow-Energy Electronics
33. A novel wafer reclaim method for amorphous SiC and carbon doped oxide films
34. Well-behaved Ge n+/p shallow junction achieved by plasma immersion ion implantation
35. Process sensitivity and robustness analysis of via-first dual-damascene process
36. A Study on the Isolation Ability of LOC al O xidation of SiC (LOCOSiC) for 4H-SiC CMOS Process.
37. Electrical instability of low-dielectric constant diffusion barrier film (a-SiC:H) for copper interconnect
38. Mechanism of Degradation of Ge NMOSFET with Channel Ion Implantation and Its Recovery
39. Time-Dependent Dielectric Breakdown of Gate Oxide on 4H-SiC with Different Oxidation and Isolation Processes
40. Extraction of Ultra-Low Contact Resistivity by End-Resistance Method
41. Degradation Mechanism of Ge N+-P Shallow Junction With Thin GeSn Surface Layer
42. Photon-Detection-Probability Simulation Method for CMOS Single-Photon Avalanche Diodes
43. 1100 V, 22.9 mΩcm 2 4H-SiC RESURF Lateral Double-Implanted MOSFET With Trench Isolation.
44. Series resistance of self-aligned silicided source/drain structure
45. Effect of fluorine incorporation on the thermal stability of PtSi/Si structure
46. Failure Analysis on TiAl Metallization Process for Ohmic Contact on 4H-SiC pMOSFET
47. Thermal Stability of Shallow Ge N+-P Junction with Thin GeSn Top Layer
48. Effect of Ion-Implantation Temperature on Contact Resistance of Metal/n-Type 4H-SiC With Ar Plasma Treatment
49. Effects of Rapid Thermal Annealing on Ar Inductively Coupled Plasma-Treated n-Type 4H-SiC Schottky and Ohmic Contacts
50. Impact of interface nature on deep sub-micron Al-plug resistance
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