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The rat surgical anterior cruciate ligament transection (ACLT) model is commonly used to investigate intra‐articular osteoarthritis (OA) therapies, and histological assessment is often the primary outcome measure. However, histological changes do not always correlate well with clinical outcomes. Therefore, this study evaluated functional outcomes in the rat surgical ACLT model and compared intra‐articular injection volumes ranging from 20 to 50 μl. Unilateral ACLT was surgically induced and static weight‐bearing, mechanical allodynia, motor function, and gait were assessed in four groups of male, Sprague‐Dawley rats (n = 6 per group). Intra‐articular injections of 20 µl Dulbecco's phosphate‐buffered saline (DPBS), 50 µl DPBS, or 50 µl of synthetic biomimetic boundary lubricant were administered once weekly for 3 weeks postoperatively. Structural changes were evaluated histologically at 20 weeks. Rat cadaver knees were injected with 20, 30, 40, or 50 µl of gadolinium solutions and were imaged using magnetic resonance imaging (MRI). Static weight‐bearing, mechanical allodynia, and gait parameters in ACLT groups revealed differences from baseline and naïve controls for 4 weeks post‐ACLT; however, these differences did not persist beyond 6 weeks. Different intra‐articular DPBS injection volumes did not result in functional or histological changes; however, peri‐articular leakage was documented via MRI following 50, 40, and 30 µl but not 20 µl gadolinium injections. Statement of clinical significance: Differences in functional parameters were predominantly restricted to early, postoperative changes in the rat surgical ACLT model despite evidence of moderate histologic OA at 20 weeks. Injection volumes of 20–30 µl are more appropriate for investigating intra‐articular therapies in the rat knee. [ABSTRACT FROM AUTHOR]

Herein, gallium nitride (GaN) samples implanted with magnesium (Mg) and fluorine (F) ions are investigated by photoluminescence (PL) measurements. In low‐temperature PL measurements, the characteristic green luminescence (GL) band attributable to nitrogen vacancies (VN) is observed in Mg‐ion‐implanted GaN. As VN are likely to act as donors, suppressing their formation is essential to realizing p‐type conductivity. The energy required for a F impurity to replace VN in GaN and eventually form F on a N site decreases when the Fermi level approaches the valence band maximum, and therefore F is employed as a subsequent implantation element to compensate for VN. The GL band peak disappears upon implanting Mg and F ions at a high temperature and adjusting the F concentration to an appropriate value. This result suggests that VN generated by Mg ion implantation can be suppressed using an element with a lower formation energy than that of VN. [ABSTRACT FROM AUTHOR]

In this work, characterizations are conducted to investigate the threshold voltage (VTH) stability of the normally‐off GaN metal–insulator–semiconductor (MIS‐) field‐effect transistor (FET) with fully recessed gate structure and highly reliable low‐pressure chemical vapor deposition SiNx gate dielectric. We conducted bias‐temperature instability (BTI) tests under both positive and negative gate bias. We demonstrated the highly stable VTH of the high‐performance MIS‐FETs with small BTI, which benefits from the effective interfacial protection layer. More specifically, combining the BTI tests and drain current 1/f noise analysis, we present extensive investigation of the physical origins of BTI. According to the experimental evidence and analysis, we ascribe the VTH instability to the trapping/detrapping of the pre‐existing trap states located at the SiNx/GaN interface and/or in the gate dielectric. [ABSTRACT FROM AUTHOR]

A SiC trench metal-oxide-semiconductor field-effect transistor (MOSFET) with a self-biased p-shield (SBS-MOS) is proposed and comprehensively studied. The p-shield region is used to reduce the high oxide field at the OFF-state, which would otherwise be detrimental to the device long-term reliability. A self-biasing network is designed to raise the potential of the pshield in the SBS-MOS, so that the parasitic junction field effect transistor (JFET) is driven synchronously with the MOS-gate. Mixed-mode numerical simulations are carried out to study the performance of the proposed device. The SBS-MOS boasts a reduced specific ON-resistance (RON-SP) compared with the trench MOSFET with a grounded p-shield (GS-MOS), by the reduction of the JFET resistance and/or further down-scaling of the cell size. To synchronously drive the JFET region, only a slightly larger gate charge is required for the SBS-MOS. Therefore, a low OFF-state oxide field, a low RON-SP and a low QGD are simultaneously achieved in the proposed SBS-MOS. [ABSTRACT FROM AUTHOR]

In addition to surface- and buffer-trapping, interface/border trapping and the consequent VTH shift in insulated-gate GaN power transistors could also cause RON increase, due to the reduced gate overdrive. This work reports on a systematic study of the trapping mechanisms in normally-on/off insulated-gate GaN transistors subjected to dynamic (AC) and static (DC) gate stress. The fast dynamic characterizations featuring an ultrashort measurement delay of 10−7 s minimize the recovery during measurement and enable a quantitative evaluation of VTH shift-induced RON increase. By analyzing the time-resolved instability in normally-on MIS-HEMT and normally-off MIS-FET with fully recessed barrier, we elucidate several key mechanisms including: (i) recessing the polarized III-nitride barrier layer can suppress VTH shift during ON/OFF switching; (ii) AC stress, which has more practical implication for lifetime projection for power switching applications, produces smaller VTH shift and RON increase comparing to DC stress; (iii) Sufficient gate overdrive at ON state and lower channel resistance in normally-on MIS-HEMT allow a better tolerance to VTH shift. Primary trapping effects in an insulated-gate GaN power transistor. [ABSTRACT FROM AUTHOR]

Integration of a photon source into the AlGaN/GaN high election mobility transistor (HEMT) platform will realize the functionality of on-chip optical pumping of deep electron traps which suppress the dynamic performances of power HEMTs. Here, we report a Schottky-on-heterojunction light-emitting diode (SoH-LED) realized on the p-doping-free lateral AlGaN/GaN heterostructure. A physical mode based on hot electron induced surface states impact ionization was proposed to explain the hole generation and injection processes in this p-doping-free SoH-LED. Since the SoH-LED shares identical epitaxial structures with HEMT, integration of SoH-LED and HEMT requires no additional epi-layers during the wafer growth and minimum process modification during device fabrication. The SoH-LED structure was seamlessly integrated into the HEMT platform as an on-chip photon source. Experiment results showed that the SoH-LED photons can effectively assist the electron de-trapping processes from both of the surface and bulk deep traps, demonstrating the feasibility of using on-chip generated photons to improve the dynamic performances of AlGaN/GaN power HEMTs. [ABSTRACT FROM AUTHOR]

In this work, the Schottky-on-heterojunction light-emitting diodes (SoH-LED) are monolithically integrated with the AlGaN/GaN high-electron-mobility transistors (HEMT) on an AlGaN/GaN-on-Si platform commonly used for GaN lateral electronic devices. The on-chip electro-optic modulation is realized in a single device fabricated using HEMT-compatible process. Also, SoH-LED arrays are fabricated to demonstrate the on-chip addressable functionality with each SoH-LED pixel in the array individually controlled by the integrated HEMT. High-resolution micro-scale SoH-LED seven-segment displays are demonstrated to show the potential of using SoH-LEDs as a robust alternative for micro flat-panel displays. [ABSTRACT FROM AUTHOR]

GaN power switching transistors featuring MIS- and MOS-gate structures are highly preferred over the Schottky-gate counterpart, because of suppressed gate leakage, enlarged gate swing, and more scalable threshold voltage. Nevertheless, MIS-/MOS-gate GaN devices are confronted with stability and reliability challenges, which arise from interface traps at the critical dielectric/III-nitride interface, as well as bulk traps inside the gate dielectric including border traps near the critical interface. In this work, we present several key techniques toward reliable MIS-/MOS-gate GaN power devices, including advanced interface engineering technology, gate structure optimizations for high-performance/stability normally-off GaN power transistors, and long-lifetime gate dielectric technology. Schematic cross sections of GaN-based MIS-HEMT and MOS-channel-HEMT. [ABSTRACT FROM AUTHOR]

Effective interface engineering techniques in III-nitride heterojunction power devices, aiming at yielding high VTH stability in insulated-gate devices and suppressed current collapse in high-voltage switching operation, are of critical significance to enhance device performance and reliability. In this work, we present an interface enhancement technology featuring in situ low-damage NH3/Ar/N2 pre-gate plasma treatment prior to the ALD-Al2O3 deposition for high-performance III-nitride MIS-HEMTs. It is manifest that this technology can effectively remove the native oxide while forming a monocrystal-like nitridation interfacial-layer (NIL) on the III-nitride surface. The Al2O3(NIL)/GaN/AlGaN/GaN MIS-heterostructures with high-quality interface exhibit well-behaved electrical characteristics, including a small subthreshold swing of ∼64 mV/dec, a small hysteresis of ∼0.09 V, tiny f/T dispersions in the C- V characteristics, and low interface trap density of ∼1 × 1012-6 × 1012 cm−2eV−1. Cross-sectional TEM micrograph of the Al2O3/III-nitride gate stack with a monocrystal-like nitridation interfacial-layer (NIL). [ABSTRACT FROM AUTHOR]

III-N devices are suitable for high power RF/microwave amplifier, high temperature electronics, and power switches applications, and the peripheral mixed-signal electronics with sensing, protection, and control functions could provide optimized performance, increased functionality, and enhanced reliability. This paper addresses the technology to discuss the technology options of implementing III-N mixed-signal circuits, and then reviews the recent progress in the expansion of design library, based on monolithically integrated enhancement/depletion (E/D)-mode AlGaN/GaN HEMTs on GaN-on-silicon substrates. An integrated GaN proportional-to-absolute-temperature (PTAT) voltage source. [ABSTRACT FROM AUTHOR]

The degradation of transient OFF-state leakage current in AlGaN/GaN HEMTs induced by ON-state gate overdrive was observed and studied. The OFF-state leakage current increases significantly with a pre- ON-state gate overdrive. It takes more than 30 s for the leakage current decay to its equilibrium level in dark. The decay processes follow a stretched-exponential law. We propose that this degradation corresponds to the persistent photoconductivity of GaN buffer induced by the electroluminescence during the Schottky gate overdrive. Both the ON-state gate overdrive bias and duration dependences of the OFF-states leakage degradation were studied. This work indicates that gate-protection is necessary to preserve low OFF-state leakage current and improve device reliability. (© 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim) [ABSTRACT FROM AUTHOR]

The GaN-to-Si vertical conduction mechanisms on a low resistivity p-type (111) Si substrate under high-voltage operation are investigated using the temperature-dependent high-voltage C-V characterization and device simulation. It is found the deep depletion and weak inversion in Si will result in a high electric field at the GaN/Si interface and induce the impact ionization of Si. The generated electrons will be injected into GaN buffer layer, fill in buffer traps and act as free carriers in GaN, eventually leading to considerable vertical leakage in the AlGaN/GaN-on-Si structures. (© 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim) [ABSTRACT FROM AUTHOR]

AlN/GaN heterostructures with AlN thin film growing by low-thermal-budget (300 °C) plasma-enhanced atomic layer deposition (ALD) were realized on a semi-insulating GaN-on-sapphire template. By applying in situ ALD-grown Al2O3 as the gate dielectric, thin film transistors (TFTs) have been successfully fabricated. The proposed TFTs exhibit effective gate control with a low subthreshold swing of ∼ 85 mV/dec, an ION/ IOFF ratio of 105 and good channel conductive with a low-field mobility of ∼ 27 cm2/(V·s). This mobility is one order of magnitude higher than that achieved in AlN/GaN heterostructures growing by magnetron sputtering. The enhanced device performance is attributed to a high-quality ALD-AlN/GaN interface obtained by in situ remote-plasma pre-deposition cleaning and the single crystal nature of subsequent epitaxial AlN thin film by plasma-enhanced ALD. (© 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim) [ABSTRACT FROM AUTHOR]

The threshold voltage ( VT) instability of metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) is investigated. In the enhancement-mode AlGaN/GaN MIS-HEMT fabricated by fluorine plasma implantation technique featuring Al2O3 gate dielectric, a hysteresis of 0.6 V in transfer characteristics is observed by quasi-static I - V (current-voltage) measurement, in which the gate bias is swept at a low rate (0.7 V/s). Pulsed transfer characteristics measurement, however, unveils much larger hysteresis under the same gate voltage swing. The VT-instability is attributed to the traps located at the dielectric/III-nitride interface as well as in the bulk of gate dielectric. It is proposed that pulsed measurement can count for the effect of fast traps (shallow traps) while the quasi-static measurement can only reflect slow traps (deep traps), and is more accurate for VT-instability evaluation. In addition, the existence of bulk traps is implied by a slow time-dependent shift of VT under large gate bias. (© 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim) [ABSTRACT FROM AUTHOR]

Dielectrophoresis (DEP) induced by activating a patterned two-dimensional electron gas (2DEG) at the interface of compound semiconductor AlGaN/GaN heterojunction has been demonstrated for the first time in our previous work. Briefly, with a peak voltage of ±10 V and a frequency from 100 kHz to 1 MHz, characteristics of both positive and negative DEP have been observed successfully manipulating 2 µm polystyrene microspheres in a drop of deionized (DI) water (pH ∼ 7 and conductivity 1 × 10−4 S m−1) over castellated 2DEG electrodes separated by critical dimensions 50 and 150 µm. This study reports a peculiar observation encountered when performing the DEP experiments under ultraviolet (UV) radiation: The microspheres have been repelled from the 2DEG electrodes yet remained on the surface during pDEP and then levitated upon switching to nDEP. This behavior is not observed in DEP with conventional microelectrodes and explained here by the UV-induced electron-hole generation and the subsequent charge redistribution in the AlGaN/GaN heterostructure. [ABSTRACT FROM AUTHOR]

In this article, a second-order dual-band bandpass filter is designed. The filter consists of two dual-band resonators connected by a dual-band admittance inverter. The dual-band resonator unit is made of two shunt stubs that coordinately produce two resonances. A novel dual-band quarter-wavelength line acts as the admittance inverter, providing suitable admittance transformations. To verify the design concept, a filter working at 2 and 5 GHz is devised and fabricated on Rogers' RO3006 printed circuit boards. In addition, the dual-band filter is connected with a bandstop filter to suppress the unwanted spurious response. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 1184–1187, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23326 [ABSTRACT FROM AUTHOR]

Monolithic integrated 1.9-GHz low noise amplifier (LNA) using 1 μm-gate high-linearity and low noise composite-channel Al0.3Ga0.7N/Al0.05Ga0.95N/GaN HEMT (CC-HEMT) device is designed, fabricated and characterized. The LNA exhibits a noise figure of 1.3 dB, an associated gain of 17 dB, an input return loss of -5.5 dB and an output return loss of -15 dB at 1.9 GHz. The IIP3 and IIP5 of the LNA are 15 and 12 dBm at 1.9 GHz. The LNA with 1 × 100 μm2 device shows high-dynamic range with decent gain and noise figure. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 1360–1362, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22459 [ABSTRACT FROM AUTHOR]

Benzocyclobutene (BCB), a low-k, photosensitive, easily patterned material is used as the interfacing layer that isolates the passive components from the lossy, low-resistivity silicon. Its performance is further improved by reducing the conductive loss with an electroplated and highly-conductive metal, namely, copper. Standard 50-Ω microstrip lines and a microstrip-transmission-line-based microwave filter, exhibiting insertion losses of 0.8 dB and 1.1 dB at 10 GHz, respectively, are demonstrated. © 2004 Wiley Periodicals, Inc. Microwave Opt Technol Lett 40: 9–11, 2004; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.11271 [ABSTRACT FROM AUTHOR]

Normally-off AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors (MOS-HEMTs) on Si substrate were fabricated with the fluorine-based treatment technique. By employing a 20nmthick Al2O3 gate dielectric deposited by atomic layer deposition, the fabricated MOS-HEMT exhibits a large positive threshold voltage of + 3.5V, a maximum gate input voltage of 15V, a maximum saturate drain current of 5.3A and an off-state breakdown voltage of 402V. The high threshold voltage and the large input voltage swing is expected to improve the electromagnetic interference immunity and safety of AlGaN/GaN MOS-HEMT power switches. [ABSTRACT FROM AUTHOR]

Normally‐off AlGaN/GaN metal‐oxide‐semiconductor high electron mobility transistors (MOS‐HEMTs) on Si substrate were fabricated with the fluorine‐based treatment technique. By employing a 20nm‐thick Al2O3 gate dielectric deposited by atomic layer deposition, the fabricated MOS‐HEMT exhibits a large positive threshold voltage of + 3.5V, a maximum gate input voltage of 15V, a maximum saturate drain current of 5.3A and an off‐state breakdown voltage of 402V. The high threshold voltage and the large input voltage swing is expected to improve the electromagnetic interference immunity and safety of AlGaN/GaN MOS‐HEMT power switches. [ABSTRACT FROM AUTHOR]