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Over the last decade, gallium nitride (GaN) has emerged as an excellent material for the fabrication of power devices. Among the semiconductors for which power devices are already available in the market, GaN has the widest energy gap, the largest critical field, and the highest saturation velocity, thus representing an excellent material for the fabrication of high-speed/high-voltage components. The presence of spontaneous and piezoelectric polarization allows us to create a two-dimensional electron gas, with high mobility and large channel density, in the absence of any doping, thanks to the use of AlGaN/GaN heterostructures. This contributes to minimize resistive losses; at the same time, for GaN transistors, switching losses are very low, thanks to the small parasitic capacitances and switching charges. Device scaling and monolithic integration enable a high-frequency operation, with consequent advantages in terms of miniaturization. For high power/high-voltage operation, vertical device architectures are being proposed and investigated, and three-dimensional structures—fin-shaped, trench-structured, nanowire-based—are demonstrating great potential. Contrary to Si, GaN is a relatively young material: trapping and degradation processes must be understood and described in detail, with the aim of optimizing device stability and reliability. This Tutorial describes the physics, technology, and reliability of GaN-based power devices: in the first part of the article, starting from a discussion of the main properties of the material, the characteristics of lateral and vertical GaN transistors are discussed in detail to provide guidance in this complex and interesting field. The second part of the paper focuses on trapping and reliability aspects: the physical origin of traps in GaN and the main degradation mechanisms are discussed in detail. The wide set of referenced papers and the insight into the most relevant aspects gives the reader a comprehensive overview on the present and next-generation GaN electronics. [ABSTRACT FROM AUTHOR]

Herein, the reliability of commercial ultraviolet‐C (UV‐C) light‐emitting diodes (LEDs) subjected to constant current stress is reported. Electrical, optical, and spectral analyses are carried out on UV‐C LEDs with an emission peak of 275 nm and a nominal optical power of 12 mW at 100 mA. Degradation tests are carried out at the maximum rated current, the double and at three times the maximum. The LED lifetime is found to be inversely proportional to the third power of the stress current density, indicating that the degradation mechanism might be activated by high‐energy electrons arising from Auger–Meitner recombination. Electrical characterization indicates an increase in defect‐related leakage, whereas the spectral analysis identifies a variation in two emission peaks which can be ascribed to a defect density increase in the active region and the p‐gallium nitride (GaN) layer of the LEDs. A final remark comes from the strong dependence of lifetime on operating current: increasing current to lower the number of LEDs in a system is not an optimized strategy. In fact, this has a substantial impact on system lifetime, thus lowering the total number of permitted disinfections. [ABSTRACT FROM AUTHOR]

Herein, the results are reviewed concerning reliability of high‐electron mobility transistors (HEMTs) based on GaN, which currently represent the technology of choice for high‐efficiency microwave and millimeter‐wave power amplifiers. Several failure mechanisms of these devices are extensively studied, including converse piezoelectric effects, formation of conductive percolation paths at the edge of gate toward the drain, surface oxidation of GaN, time‐dependent breakdown of GaN buffer, and of field‐plate dielectric. For GaN HEMTs with scaled gate length, the simultaneous control of short‐channel effects, deep‐level dispersion, and hot‐electron‐induced degradation requires a careful optimization of epitaxial material quality and device design. [ABSTRACT FROM AUTHOR]

The defectiveness of InGaN-based quantum wells increases with low indium contents, due to the compressive strain induced by the lattice mismatch between the InGaN and GaN layers, and to the stronger incorporation of defects favored by the presence of indium. Such defects can limit the performance and the reliability of LEDs, since they can act as non-radiative recombination centers, and favor the degradation of neighboring semiconductor layers. To investigate the location of the layers mostly subjected to degradation, we designed a color-coded structure with two quantum wells having different indium contents. By leveraging on numerical simulations, we explained the experimental results in respect of the ratio between the emissions of the two main peaks as a function of current. In addition, to evaluate the mechanisms that limit the reliability of this type of LED, we performed a constant-current stress test at high temperature, during which we monitored the variation in the optical characteristics induced by degradation. By comparing experimental and simulated results, we found that degradation can be ascribed to an increment of traps in the active region. This process occurs in two different phases, with different rates for the two quantum wells. The first phase mainly occurs in the quantum well closer to the p-contact, due to an increment of defectiveness. Degradation follows an exponential trend, and saturates during the second phase, while the quantum well close to the n-side is still degrading, supporting the hypothesis of the presence of a diffusive front that is moving from the p-side towards the n-side. The stronger degradation could be related to a lowering of the injection efficiency, or an increment of SRH recombination driven by a recombination-enhanced defect generation process. [ABSTRACT FROM AUTHOR]

Herein, the main factors and mechanisms that limit the reliability of gallium nitride (GaN)‐based light‐emitting diodes (LEDs) are reviewed. An overview of the defects characterization techniques most relevant for wide‐bandgap diodes is provided first. Then, by introducing a catalogue of traps and deep levels in GaN and computer‐aided simulations, it is shown which types of defects are more detrimental for the radiative efficiency of the devices. Gradual degradation mechanisms are analyzed in terms of their specific driving force: a separate analysis of recombination‐enhanced processes, driven by nonradiative recombination and/or temperature‐assisted processes, such as defects or impurity diffusion, is presented. The most common lifetime estimation methods and standards adopted for solid‐state luminaires are also reported on. Finally, the paper concludes by examining which are the typical degradation and failure mechanisms exhibited by LEDs submitted to electrical overstress. [ABSTRACT FROM AUTHOR]

Trapping phenomena degrade the dynamic performance of wide-bandgap transistors. However, the identification of the related traps is challenging, especially in presence of non-ideal defects. In this paper, we propose a novel methodology (trap-state mapping) to extract trap parameters, based on the mathematical study of stretched exponential recovery kinetics. To demonstrate the effectiveness of the approach, we use it to identify the properties of traps in AlGaN/GaN transistors, submitted to hot-electron stress. After describing the mathematical framework, we demonstrate that the proposed methodology can univocally describe the properties of the distribution of trap states. In addition, to prove the validity and the usefulness of the model, the trap properties extracted mathematically are used as input for TCAD simulations. The results obtained by TCAD closely match the experimental transient curves, thus confirming the accuracy of the trap-state mapping procedure. This methodology can be adopted also on other technologies, thus constituting a universal approach for the analysis of multiexponential trapping kinetics. [ABSTRACT FROM AUTHOR]

We investigate the density of defects and the degradation rate in InGaN light-emitting diodes having identical dislocation density and epitaxial structure, but different indium content in the quantum well (QW; 12%, 16%, 20%). Our results, based on combined steady-state photocapacitance, light-capacitance voltage, and degradation measurements indicate that: (a) the density of defects in the superlattice underlayer is identical for the three wafers, indicating good and reproducible growth conditions; (b) the density of defects within the active region of the devices shows a monotonic dependence on the indium content in the QWs. These results, consistent with previous studies on the topic, prove unequivocally the important role of indium in favoring the incorporation of point defects, further clarifying the possible mechanisms of defect formation, and give a quantitative assessment of the related effect; (c) in step-stress experiments, the degradation rate was found to be much stronger for devices having high indium content in the QW. This result can be explained by considering a decrease in injection efficiency due to the generation or transport of defects, or an increment in defect-assisted Auger recombination terms due to the propagation of defects. [ABSTRACT FROM AUTHOR]

In this article, we separately investigate the role of electric field and device self-heating (SHE) in enhancing the charge emission process from Fe-related buffer traps (0.52 eV from Ec) in AlGaN/GaN high electron mobility transistors (HEMTs). The experimental analysis was performed by means of drain current transient (DCT) measurements for either: 1) different dissipated power (PD,steady) at constant drain-to-source bias (VDS,steady) or 2) constant PD,steady at different VDS,steady’s. We found that: 1) an increase in PD,steady yields an acceleration in the thermally activated emission process, consistently with the temperature rise induced by SHE and 2) on the other hand, the field-effect turned out to be negligible within the investigated voltage range, indicating the absence of the Poole–Frenkel effect (PFE). A qualitative analysis based on the electric field values obtained by numerical simulations is then presented to support the interpretation and conclusions. [ABSTRACT FROM AUTHOR]

RON degradation due to stress in GaN-based power devices is a critical issue that limits, among other effects, long-term stable operation. Here, by means of 2-D device simulations, we show that the RON increase and decrease during stress and recovery experiments in carbon-doped AlGaN/GaN power metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) can be explained with a model based on the emission, redistribution, and retrapping of holes within the carbon-doped buffer (“hole redistribution” in short). By comparing simulation results with front- and back-gating OFF-state stress experiments, we provide an explanation for the puzzling observation of both stress and recovery transients being thermally activated with the same activation energy of about 0.9 eV. This finds a straightforward justification in a model in which both RON degradation and recovery processes are limited by hole emission by dominant carbon-related acceptors that are energetically located at about 0.9 eV from the GaN valence band. [ABSTRACT FROM AUTHOR]

The aim of this paper is to improve the understanding of gallium nitride (GaN) high electron mobility transistors (HEMTs) submitted to hard switching operation, with focus on the hot-electron phenomena. This is becoming a hot-topic both for the scientific community and for the industry. The analysis is carried out through a cross-comparison of three different experimental techniques: conventional Pulsed-IV characterization, a novel pulsed-drain current transient (P-DCT) method, and a custom-developed hard switching test protocol. Hard switching analysis was performed through a novel system able to test the device in hard-switching conditions with an unprecedented turn-on slew-rate of 25 V ns−1 on-wafer level. This allows μs to investigate the impact of hard switching in terms of (i) locus trajectory, (ii) dissipated power, and (iii) dynamic increase. Furthermore, the accumulation of switching stress is assessed by repeating the experiment with increasing frequency, from 1 kHz to 100 kHz. The extensive cross-analysis offers a novel insight on the degradation mechanisms occurring in power GaN HEMTs. The results collected within this paper allow: (1) to evaluate the dynamic behavior under both soft- and hard-switching stress, thus differentiating off-state and semi-on-state stress; (2) to pinpoint hot-electrons as the main cause of the current collapse observed in semi-on; (3) by comparing the results obtained from P-DCT and Hard Switching Analysis we demonstrate that the hot-electron trapping is a very fast process which can happen in few ns. The related trapping and de-trapping kinetics are investigated in detail. The results described within this paper provide novel insight on the important role of hot-electrons in the dynamic increase during hard switching operations. [ABSTRACT FROM AUTHOR]

In this article, pulsed measurements of thermal resistance in GaN-based high-electron mobility transistors (HEMTs) on silicon, with different gate geometries and gate-to-drain extensions, are analyzed and modeled. Simple expressions for the thermal resistance of silicon-on-insulator (SOI) MOSFETs, which take into account the gate width and channel length, can be adapted to model the thermal resistance of these GaN-based HEMTs. Narrow width effects and the increase in the heat flow through the gate as the channel length increases were correctly reproduced. In addition, numerical simulations were performed to explain the reduction obtained in thermal resistance as the gate-to-drain extension increases. Our approach can also be applied easily to other well-established models using circuit simulators. [ABSTRACT FROM AUTHOR]

We demonstrate that the residual carbon concentration in the drift region can have a significant impact on the reverse leakage, breakdown voltage, and breakdown stability of GaN-on-GaN vertical diodes. Two generations (Gen1, Gen2) of polarization-doped p-n junctions with different C concentrations were compared, in terms of avalanche voltage, avalanche instability, and deep-level concentration. The original results collected within this paper show that: 1) both generations of devices can safely reach the avalanche regime; diodes with a lower residual CN have a higher reverse leakage and a lower avalanche voltage, due to an uneven distribution of the electric field; 2) the presence of residual carbon can lead to breakdown walkout, i.e. a recoverable increase in breakdown voltage under reverse-bias stress. Specifically, devices with higher C concentration show a fully-recoverable breakdown walkout, whereas the breakdown voltage is stable in devices with lower C concentration; and 3) steady-state photocapacitance measurements confirm the presence of CN in both generations, and are used to assess the relative difference in concentration between Gen1 and Gen2, even for levels below secondary ion mass spectroscopy (SIMS) sensitivity. The results described in this paper indicate the existence of a trade-off between breakdown voltage (increasing by improving compensation) and breakdown stability (improving by reducing CN concentration) and are of fundamental importance for the optimization of GaN power devices. [ABSTRACT FROM AUTHOR]

This paper shows that vertical GaN-on-GaN p–i–n diodes are able to withstand long-term operation in moderate avalanche conduction regime, thus proving the excellent stability of the gallium nitride material system. Under constant stress in stronger avalanche regime, the devices show a significant increase in the series resistance, a slight increase in forward voltage and a measurable increase in avalanche voltage. Degradation is ascribed to the generation of defects, a process which is likely occurring in the intrinsic region. The time-dependence of the performance loss is explained by considering the simultaneous presence of field-assisted trapping in the avalanche region and of charge de-trapping in the medium-field region of the devices. An interpretative model based on these assumptions is proposed to explain the full set of the experimental data. [ABSTRACT FROM AUTHOR]

Herein, the development of gallium nitride on silicon (GaN‐on‐Si) heterostructures targeting 1200 V power applications is reported. In particular, it is shown that the insertion of superlattices (SLs) into the buffer layers allows pushing the vertical breakdown voltage above 1200 V without generating additional trapping effects as compared with a more standard optimized step‐graded AlGaN‐based epistructure using a similar total buffer thickness. DC characterizations of fabricated transistors by means of back‐gating measurements reflect both the enhancement of the breakdown voltage and the low trapping effects up to 1200 V. These results show that a proper buffer optimization and the insertion of SL pave the way to GaN‐on‐Si lateral power transistors operating at 1200 V with low on‐resistance and low trapping effects. [ABSTRACT FROM AUTHOR]

We demonstrate the avalanche capability and the existence of breakdown walkout in GaN-on-GaN vertical devices with polarization doping. By means of combined electrical and optical characterization, we demonstrate the following original results: 1) vertical p-n junctions with polarization doping have avalanche capability; 2) stress in avalanche regime induces an increase in breakdown voltage, referred to as breakdown walkout; 3) this process is fully-recoverable, thus being related to a trapping mechanism; 4) temperature-dependent measurements of the breakdown walkout identify $\text{C}_{N}$ defects responsible for this process; and 5) capacitance deep level transient spectroscopy (C-DLTS) and deep level optical spectroscopy (DLOS) confirm the presence of residual carbon in the devices under test. A possible model to explain the avalanche walkout is then proposed. [ABSTRACT FROM AUTHOR]

We present an electro-optical method for the extrapolation of the nonradiative and Auger recombination coefficients in InGaN/GaN Light-emitting diodes (LEDs). The method has the advantage of permitting the extrapolation of the recombination parameters of packaged devices, contrary to conventional techniques based on the analysis of quasibulk structures. For the analyzed devices, the average values of the nonradiative and Auger recombination coefficients have been determined to be equal to 2.3×107 s-1 and 1.0×10-30 cm6 s-1, respectively. These results are consistent with previous reports based on the analysis of quasibulk structures and on theoretical simulations. The method described in this paper constitutes an efficient tool for the analysis of the recombination dynamics in GaN-based LEDs. The results obtained within this work support the hypothesis on the importance of Auger recombination in determining the so-called efficiency droop in LED structures. [ABSTRACT FROM AUTHOR]

This paper investigates the degradation of vertically aligned gallium nitride (GaN) nanowire (NW) arrays submitted to gate bias stress and UV light. Based on electrical tests and simulations, we demonstrate the existence of trapping processes that depend on the applied stress voltage ${V}_{\textsf {Gstress}}$ and on the applied light during stress (wavelength, $\lambda $). We demonstrate the following original results: 1) for positive and negative ${V}_{\textsf {Gstress}}$ conditions, no significant variation in dc characteristics is observed when the samples are stressed in dark and 2) when the devices are submitted to negative ${V}_{\textsf {Gstress}}$ and to UV light, a positive variation in threshold voltage (${V}_{\textsf {th}}$) is observed. The positive ${V}_{\textsf {th}}$ shift is ascribed to the transfer and trapping of electrons from the gate metal to the oxide, promoted by UV light. We also evaluated the temperature dependence of the threshold voltage shift under UV light. We demonstrated an increased trapping at higher temperatures, indicating a role of thermionic processes in electron trapping. On the other hand, detrapping from oxide states proceeds through defect-mediated conduction, i.e., is limited by the number of available states. [ABSTRACT FROM AUTHOR]

The gate reliability of p-GaN gate AlGaN/GaN high electron mobility transistors with a ring-gate structure is investigated by step-stress experiments under a gate bias, combined with electroluminescence imaging and pulsed measurements. For gate stress (${V} _{\text {Gstress}}$) from 0 to 13 V, the drain current is found to be stable and decreases at 13 V at OFF-state and increases at ON-state. For ${V} _{\text {Gstress}}$ from 13 to 31 V, the drain current increases at OFF-state and decreases at ON-state, whereas ${V} _{\text {TH}}$ is stable and increases slightly. The changes in drain current characteristic and ${V} _{\text {TH}}$ values of the device after applying various ${V} _{\text {Gstress}}$ are associated with the injection and trapping of holes from the p-GaN layer to the AlGaN layer, supported by the results of pulsed measurements and by the simulation of energy band diagrams. When ${V} _{\text {Gstress}}$ is further increased to a high voltage of 31 V, ${V} _{\text {TH}}$ becomes noisy and a strong luminescence signal occurs with a sudden reduction in the drain current, and finally, a catastrophic failure happens in the gate-channel region. [ABSTRACT FROM AUTHOR]

This paper investigates the trapping mechanisms in gate-injection transistors (GITs) without and with a pdrain electrode, referred to as GITs and Hybrid-Drain-embedded GITs (HD-GITs), respectively, used to inject holes and reduce charge trapping effects. We compare the two sets of devices under both the OFF-state and semi- ON state, to investigate the role of hot electrons in favoring the charge trapping. The analysis is based on combined pulsed characterization, transient measurements, and electroluminescence (EL) characterization. We demonstrate the following relevant results: 1) GITs and HD-GITs have comparable and negligible dynamic ${R}_{ \mathrm{\scriptscriptstyle ON}}$ when trapping is induced in the OFF-state; under semi- ON state conditions, GITs suffer from significant dynamic ${R}_{ \mathrm{\scriptscriptstyle ON}}$ , while HD-GITs show no additional trapping with respect to OFF-state; 2) EL characterization carried out until ${V}_{\mathsf {DS}}= 500$ V in semi- ON conditions shows comparable features, suggesting that the electric field and hot-carrier density are similar in GITs and HD-GITs. This result indicates that the hot-electron trapping rate is identical for the two sets of samples, so the difference observed in dynamic ${R}_{ \mathrm{\scriptscriptstyle ON}}$ must be ascribed to a different detrapping rate; 3) transient ${R}_{ \mathrm{\scriptscriptstyle ON}}$ measurements indicate that the traps filled in the OFF-state conditions are the same as those filled by hot electrons in semi- ON, with ${E}_{a}= 0.8$ eV (possibly ${C}_{N}$); and 4) EL analysis under constant bias indicates that in GITs there is a time-dependent increase in the luminescence signal at the drain terminal, when the devices are biased with ${V}_{\mathsf {DS}}= 300$ V. Such effect, indicative of hot-electron trapping, is not observed in HD-GITs. Based on the experimental evidence collected within this paper, we conclude that—in the semi- ON state—the main difference between GITs and HD-GITs consists in a faster detrapping rate of hot electrons, achieved through hole injection from the pdrain terminal. [ABSTRACT FROM AUTHOR]

The gate conduction mechanisms in p-gallium nitride (GaN)/AlGaN/GaN enhancement mode transistors are investigated using temperature-dependent dc gate current measurements. In each of the different gate voltage regions, a physical model is proposed and compared to experiment. At negative gate bias, Poole–Frenkel emission (PFE) occurs within the passivation dielectric from gate to source. At positive gate bias, the p-GaN/AlGaN/GaN “p-i-n” diode is in forward operation mode, and the gate current is limited by hole supply at the Schottky contact. At low gate voltages, the current is governed by thermionic emission with Schottky barrier lowering in dislocation lines. Increasing the gate voltage and temperature results in thermally assisted tunneling (TAT) across the same barrier. An improved gate process reduces the gate current in the positive gate bias region and eliminates the onset of TAT. However, at high positive gate bias, a sharp increase in current is observed originating from PFE at the metal/ p-GaN interface. Using the extracted conduction mechanisms for both devices, accurate lifetime models are constructed. The device fabricated with the novel gate process exhibits a maximum gate voltage of 7.2 V at ${t}_{\textsf {1}\%}=\textsf {10}$ years. [ABSTRACT FROM AUTHOR]

This letter reports on the observation of hot-electron and impact-ionization mechanisms in N-polar GaN-based MIS-HEMTs designed for high frequency (RF) operation. Thanks to the extremely low gate leakage of such devices, we were able to demonstrate—for the first time—a correlation between electroluminescence (EL) and gate current in the semi-on state. In the semi-on state, the devices show a non-monotonic, bell-shaped behavior of the EL-versus- ${\text {V}}_{\text {GS}}$ and of the ${I}_{\text {G}}$ -versus- ${V}_{\text {GS}}$ characteristics, and the intensity of the EL signal is proportional to the ${I}_{G}\times {I}_{D}$ product. The results are experimental evidence for impact ionization: the related mechanisms are described in detail in the letter. [ABSTRACT FROM AUTHOR]

This paper presents an extensive investigation of the impact of the resistivity of the silicon substrate on the vertical leakage and charge trapping in 200 V GaN-on-Si enhancement-mode high-electron mobility transistors. Three wafers having different substrate resistivities were submitted to combined DC characterization, step-stress experiments, and electroluminescence (EL) analysis. The results described within this paper demonstrate that: 1) the use of a highly resistive silicon substrate can increase the vertical breakdown voltage of the transistors, due to the fact that the voltage drop on the GaN buffer is mitigated by the partial depletion of the substrate (this latter causes a plateau region in the drain to substrate I–V characteristic) and 2) highly resistive substrate results in stronger trapping effects, due to the capacitance of the depleted substrate and the resulting backgating effects. The results described within this paper indicate that the choice of the resistivity of the substrate is the result of a tradeoff between high breakdown voltage (that could be in principle achieved through a highly resistive substrate) and the minimization of trapping processes (which can be hardly obtained with a resistive substrate). [ABSTRACT FROM AUTHOR]

GaN-based transistors are promising devices for power switching applications, but their unique properties require careful design of the circuit in order to achieve the best performance and reliability. The first part will focus on the characterisation of deep-level effects in enhancement- and depletion-mode HEMTs, which limit the performance of the transistor. Threshold voltage instabilities in MIS-HEMT structures, caused by charge trapping under the gate, and their dependence on SiN acting as the gate dielectric will be reviewed. ON-resistance increase, caused by charge trapping in the gate-drain access region, will then be discussed in normally off gate injection transistors, as well as the effect of the switching frequency on the trapping-de-trapping equilibrium condition. The second part of the paper will discuss possible failure modes related to operating conditions, starting with the oxidation of the surface and the inverse piezoelectric effect at high gate-drain voltage. To have a complete picture of high-field effects, the gate dielectric and passivation robustness will be investigated. Time-dependent degradation will then be analysed in both gate reverse and forward-bias conditions. Finally, failures related to off-state stress and to power dissipation and electric field during an ESD event in AlGaN/GaN-HEMTs will be discussed. [ABSTRACT FROM AUTHOR]

The aim of this work is to present a potential application of gallium nitride-based optoelectronic devices. By using a laser diode and a photodetector, we designed and demonstrated a free-space compact and lightweight wireless power transfer system, whose efficiency is limited by the efficiency of the receiver. We analyzed the effect of the electrical load, temperature, partial absorption and optical excitation distribution on the efficiency, by identifying heating and band-filling as the most impactful processes. By comparing the final demonstrator with a commercial RF-based Qi system, we conclude that the efficiency is still low at close range, but is promising in medium to long range applications. Efficiency may not be a limiting factor, since this concept can enable entirely new possibilities and designs, especially relevant for space applications. [ABSTRACT FROM AUTHOR]

This paper presents an extensive analysis of the operating principles, theoretical background, advantages and limitations of laser-based lighting systems. In the first part of the paper we discuss the main advantages and issues of laser-based lighting, and present a comparison with conventional LED-lighting technology. In the second part of the paper, we present original experimental data on the stability and reliability of phosphor layers for laser lighting, based on high light-intensity and high-temperature degradation tests. In the third part of the paper (for the first time) we present a detailed comparison between three different solutions for laser lighting, based on (i) transmissive phosphor layers; (ii) a reflective/angled phosphor layer; and (iii) a parabolic reflector, by discussing the advantages and drawbacks of each approach. The results presented within this paper can be used as a guideline for the development of advanced lighting systems based on laser diodes. [ABSTRACT FROM AUTHOR]