136 results on '"Boullart, W."'
Search Results
2. Kinetic Studies of Reactions of Alkylperoxy and Haloalkylperoxy Radicals with NO. A Structure-Activity Relationship for Reactions of OH with Alkenes and Polyalkenes
3. Dry etching fin process for SOI finFET manufacturing: Transition from 32 to 22 nm node on a 6T-SRAM cell
4. In-line control of Si loss after post ion implantation strip
5. Effect of top power on a low- k film during oxygen strip in a TCP etch chamber
6. Dry etching process for bulk finFET manufacturing
7. High aspect ratio via etch development for Cu nails in 3-D-stacked ICs
8. Plasma etching: From micro- to nanoelectronics
9. Structure-activity relationship for the addition of OH to (poly)alkenes: Site-specific and total rate constants
10. Diffusion of solvents in thin porous films
11. Spacer defined FinFET: Active area patterning of sub-20 nm fins with high density
12. Implementation of high- k and metal gate materials for the 45 nm node and beyond: gate patterning development
13. Characterisation and integration feasibility of JSR’s low- k dielectric LKD-5109
14. Chemical and structural analysis of etching residue layers in semiconductor devices with energy filtering transmission electron microscopy
15. Integration of SrBi2Ta2O9 thin films for high density ferroelectric random access memory.
16. Using a biased-ICP reactor for PR strip and Cu barrier removal
17. Integration of SrBi2Ta2O9 thin films for high density ferroelectric random access memory
18. Planar Langmuir probe in pulsing regime
19. Smoothening of 193 Immersion Resist by 172 nm VUV Exposure
20. Highly reliable TaOx ReRAM with centralized filament for 28-nm embedded application
21. Metal hard-Mask Based Double Patterning for 22nm and Beyond
22. A low-cost 90 nm RF-CMOS platform for record RF circuit performance
23. Line edge and width roughness smoothing by plasma treatment
24. 15nm HP patterning with EUV and SADP: key contributors for improvement of LWR, LER, and CDU
25. A dc-pulsed capacitively coupled planar Langmuir probe for plasma process diagnostics and monitoring
26. Dry etching fin process for SOI finFET manufacturing: Transition from 32 to 22nm node on a 6T-SRAM cell
27. Modeling Cl2/O2/Ar inductively coupled plasmas used for silicon etching: effects of SiO2chamber wall coating
28. Temperature and RF Current Sensor Wafers for Plasma Etching
29. Scaling of high-k dielectrics towards sub-Inm EOT
30. Study on metrology of ERU tuning in TCP reactor, using PVx2 sensor wafer
31. Effect of energetic ions on plasma damage of porous SiCOH low-k materials
32. Metrology for Implanted Si Substrate Loss Studies
33. The metal hard-mask approach for contact patterning
34. SELECTIVE REMOVAL OF HIGH-KGATE DIELECTRICS
35. Investigation of etching and deposition processes of Cl2/O2/Ar inductively coupled plasmas on silicon by means of plasma–surface simulations and experiments
36. Effect of quartz window temperature on plasma composition during STI etch
37. Simulation of an Ar/Cl2inductively coupled plasma: study of the effect of bias, power and pressure and comparison with experiments
38. Using Ellipsometry for Assessment of TiN Surface Roughness after Plasma Etch
39. Novel, Effective and Cost-Efficient Method of Introducing Fluorine into Metal/Hf-based Gate Stack in MuGFET and Planar SOI Devices with Significant BTI Improvement
40. Spacer defined FinFET: Active area patterning of sub-20nm fins with high density
41. Structure−Activity Relationship for the Addition of OH to (Poly)alkenes: Site-Specific and Total Rate Constants
42. Novel patterning shrink technique enabling sub-50 nm trench and contact integration
43. Highly reliable and extremely stable SiGe micro-mirrors
44. Chemical and electrical characterisation of the interaction of BCl3/Cl2 etching and CF4/H2O stripping plasmas with aluminum surfaces
45. Effect of Surfactant as Additive in Wet Clean Solutions on Properties of Low-k Materials
46. Influence of crystallographic orientation on dry etch properties of TiN
47. Influence of TaN Gate Electrode Microstructure on Its Dry Etch Properties
48. Wet Etch Characteristics of Hafnium Silicate Layers
49. Minimizing plasma damage and in situ sealing of ultralow-k dielectric films by using oxygen free fluorocarbon plasmas
50. Implementation of high-k and metal gate materials for the 45nm node and beyond: gate patterning development
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.