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El síndrome hemolítico urémico (SHU) se caracteriza por la presencia de anemia hemolítica microangiopática, trombocitopenia y afectación renal aguda. Es la principal causa de falla renal aguda en niños menores de 3 años. Un número variable de pacientes evoluciona con afectación renal a largo plazo con proteinuria, hipertensión arterial e insuficiencia renal crónica.

A 64 Kbit non-destructive readout (NDRO) ferroelectric random access memory (FeRAM) using a 0.6-μm technology is described. The NDRO FeRAM uses a novel linked cell architecture, which minimizes the circuit overhead accepted in Flash memories. This test device has shown 10-year retention and unlimited read operation. An 120-ns NDRO operation is performed at a read voltage of 2.2V. Circuit techniques used in the NDRO FeRAM include: (1) direct programming of ferroelectric capacitors, (2) automatic restoring of read data, and (3) data storing under zero bias conditions. The unique linked cell architecture allows for scaling a cell size down to 6F2, where F is the minimum feature size available.

The bismuth layered perovskite structured ferroelectrics (BLSF) are well known for their good ferroelectric characteristics. Recently, SrBi2Ta2O9 (SBT) and SrBi2Ta2-xNbxO9 (SBTN) have shown attractive properties for ferroelectric random access memories because of their high endurance characteristic. In addition to SBT and SBTN, their lies a possibility of many different BLSF materials waiting to be explored. One such material is lanthanum substituted bismuth titanate Bi4-xLaxTi3O12 (BLT) that has received some attention lately. The BLT thin films were prepared by conventional metal organic decomposition technique on the platinum electrode for evaluating ferroelectric characteristics of BLT and possibility of low temperature crystallization. It was found that BLT can be crystallized at 550C with random orientation and very good ferroelectric properties were observed: the remnant polarization (2Pr) was over 20μC/cm2 with low leakage current. Furthermore, the BLT capacitor did not show any significant fatigue up to 3.2×1010 cycles even at 85C.

An annealing 650°C process for SrBi2Ta2O9 (SBT) has been achieved in metal organic chemical vapor deposition (MOCVD). An optimized post anneal step at 650°C is also included. The samples showed a high remnant polarization (2Pr) of 14 μC/cm2 @5V, low leakage current of 10-8 A/cm2 or less @4V, and a fatigue-free nature. This is the first report of MOCVD deposited SBT that can achieve 650°C crystallization with the post annealing.

As CMOS dimensions shrink so does the limitation on total thermal budget for processing. For 0.18 μm design rules, the junction depth and the salicide process requirements limit the maximum processing temperature to below 700°C, preferably down to 650°C. For FeRAMs, this results in limitation on the thermal budget available for the crystallization of ferroelectric films. SBT and SBTN films have been generally annealed at 700°C or higher. Lowering the crystallization temperature down to 650°C requires the suppression of fluorite phase in order to obtain good ferroelectric performance. We have developed a CSD based low temperature process for SBT films yielding excellent ferroelectric properties. Several materials and process parameters have been optimized to suppress the fluorite phase. These include film stoichiometry and thickness, anneal ambient and ramp rates, UV energy and precursor solvents. In this paper we present a complete 650°C process for SBT thin films, highlighting process modifications and their effect on ferroelectric performance.

650°C process of SrBi2Ta2O9 (SBT) has been achieved through the use of new metal organic deposition (MOD) solution and the optimization of the deposition conditions. The sample showed a high remnant polarization (2Pr) of 14 μC/cm2 @3V, a low leakage current of 10-8 A/cm2 or less @3V, and a fatigue-free nature. We believe this processing will realize high-density FeRAM integration of SBT.

SrBi2Ta2O9 based Ferroelectric FETs with a CeO2 buffer layer deposited by Metal Organic Decomposition (MOD) were fabricated on p-Si (100) substrate and analyzed in detail. The hysterisis curve (drain current vs. gate voltage) of the FET shows the counter-clockwise direction, which demonstrates the change of channel conductivity due to the ferroelectric polarization. The memory window with the gate voltage of ±10V was 2V. The difference of current ratio of Ids(on) to Ids(off) was 5∼7 orders in magnitude which is easily sensed by sense amplifiers. The charges of "on" state stored decay logarithmically with time without severe initial loss of data. This indicates the FET-FeRAM can be implemented in NDRO applications.

Ferroelectric gate MOS capacitors using the "Y-1" family of ferroelectric materials were evaluated. The capacitors were formed by connecting the ferroelectric capacitor and the MIS capacitor in series. The experimental results show the dependence of the memory window on the ferroelectric/insulator capacitance ratios, which gives some useful information on the design of MFSFETs.

A brief review of radiation damage in ferroelectrics is given, with special attention to thin films.

Recent interest in the use of capacitors, utilizing sol-gel derived PZT for non-volatile memories and ULSI DRAM cells, has made it imperative to thoroughly characterize these devices. This paper shows state-of-the-art device data in the following regimes: (1) hysteresis versus temperature and frequency; (2) temperature dependent i-t; (3) polarization versus applied voltage; (4) I-V characteristics over temperature using triangular voltage sweep (TVS) stress; (5) static dielectric constant versus temperature and frequency; (6) leakage current; (7) time dependent breakdown under constant d.c. bias; (8) fatigue at varying temperatures; and (9) retention data. Wherever appropriate, simple models are also described to explain the measured data.

Self-patterned SrBi2Ta2O9 thin films were successfully fabricated from photo-sensitive solutions by means of UV irradiation through photo masks. After conventional baking and wet etching the films were annealed. The photo-sensitive SrBi2Ta2O9 solutions give high resolution negative-pattern of the mask image down to 1 μm line width by deep UV irradiation at 900 mJ/cm2. The capacitor characteristics of the 210 nm thick films fabricated on the Pt/Ti/SiO2/Si substrates by this process showed 2Pr values of 17 μC/cm2, 2Ec of 89 kV/cm, and leakage current densities of 5×10-9 A/cm2 at 5 V. The films showed no fatigue after 1×1011 switching cycles.

Dielectric breakdown has been studied in several materials intended for high-dielectric DRAMs (dynamic random access memories), emphasizing lead zirconate-titanate (PZT) and barium strontium titanate (BST) ceramics. In this paper recent results from PZT are presented. In order to distinguish among impulse thermal breakdown, dc thermal breakdown, and avalanche breakdown mechanisms, studies have been carried out as functions of temperature, electrode material and shape, frequency and duration of applied fields, and specimen size and shape. Notable in the results is the fact that maximum breakdown field varies directly with electrode work function but is uncorrelated with electrode thermal conductivity; this militates against a purely thermal breakdown interpretation and instead favors an avalanche mechanism in which the initial step is electronic followed by thermal run-away. Thickness dependence also favors avalanche mechanisms, but dependence upon applied field ramp rate favors an impulse thermal mechanism.

We have measured the voltage (field) dependence, the thickness dependence, and the temperature dependence of d.c. leakage currents in PbZr0.40Ti0.60O3. In agreement with our earlier results [Scott et al., J. Appl. Phys. 70, 382 (1991)], the voltage dependence is given by I(V) = AV + B(V - V0)2, implying space-charge limited currents. In addition, in the present work we find that I(d) = C/d3 at constant voltage, where d is the thickness and C is a constant dependent upon voltage and cross-sectional area. This inverse-cubic dependence of current confirms that the leakage is dominated by space charge effects.

The purpose of this work is to develop and characterize an optimized sol-gel PZT process to be used in ferroelectric memories. A review of the sol-gel process is given, including discussions on hydrolysis under acidic and basic conditions. Application of the sol-gel process to thin films is then discussed. Topics such as removal of solvents, stresses in the thin film and how this relates to cracking are mentioned. A review of different synthesis methods of sol-gel PZT is then conducted in order to help determine a device worthy sol-gel PZT process. Methods of controlling the pore size by hydrolysis and different heat treatments at various stages during the drying and annealing cycles are then used. The quality of thin film PZT on Pt is characterized by using dispersive X-ray and X-ray diffraction analyses. Electrical results yield Pr ranging from 7.9-21.9 μC/cm2Ec ranging from 29.1 -92.3 kV/cm and switching times as fast as 56 ns, using a capacitor area of 1 × 104 μm2. However, these results depend on the stoichiometry and method of measurement used. Fatigue curves show a single time constant switching charge decay which may be indicative of a single type of defect domain interaction.

Doping lead zirconate titanate (PZT) has often been examined in order to investigate changes in the electrical behavior of thin film ferroelectric capacitors.1 In this study, PZT has been doped with Hf, Nb, and Zn. After reviewing the results of the initial studies, Zn doping of PZT was further investigated. Physical and electrical studies of Zn doped PZT have been conducted. These studies include x-ray diffraction analysis, hysteresis, pulsed switching, fatigue and retention measurements. Endurance measurements indicate an anomalous fatigue behavior of some Zn doped PZT thin film capacitors.

In 1991 we demonstrated the use of a deposition machine that injected liquid sol-gel material into a vacuum chamber at room temperature for the production of high quality lead zirconate titanate (PZT) thin films. This year we have modified the machine to produce strontium titanate and barium strontium titanate films of sufficient quality for DRAM applications.

Recently ferroelectric thin-film capacitors have been modelled using the sub-surface space charge region. The model is similar to the well known abrupt p-n junction theory or semiconductors. This paper describes the sub-surface space charge using the landau free energy within a polarized medium. The capacitance of the ferroelectric storage cell is described from these first principles. The model predicts that the result of the abrupt p-n junction depletion capacitance (linear medium model) is the limit of the ferroelectric p-n junction model (non-linear medium) when the polarization approaches zero. The results of the model are applied successfully to 60/40 PZT capacitors where the intrinsic heterogeneity (high electron concentration in the near surface region) is always present due to high oxygen vacancy concentration. Both the linear and the nonlinear models are reasonable at high voltages but only the non-linear model is accurate at lower voltages. The results are also useful to characterize device parasitics and elucidate the effect of the microstructure on device behavior.

This work investigates the feasibility of a 1T-1C memory cell consisting of an n-channel transistor and ferroelectric SrBi2Ta2O9 as the capacitor dielectric. 1T-1C ferroelectric memory cells processed through interconnect metalization are discussed. Advantages and disadvantages of two different process sequences are examined. Data indicates that n-channel transistor damage is highly dependent on the process sequence, and that a SrBi2Ta2O9 1T-1C memory cell is fully functional through interconnect metalization.

We have successfully incorporated the ferroelectric and the high dielectric constant capacitors into integrated circuits. The GaAs MMICs with BST capacitors have been widely used for cellular phones. The BST technology is also applied to a silicon CCD delayline processor for VCRs and camcorders. With respect to the ferroelectric technology with Y1, an experimentally fabricated 256k bit FeRAM has exhibited the remarkable performance of the 100 ns and 3V operation with a 1T/1C cell configuration dedicated for the FeRAM. These integrated ferroelectrics have been achieved by controlling the ferroelectric properties in thin films and incorporating the films into GaAs and silicon devices with outstanding process technology. Furthermore, we refer to the memory cell design technology which enables the FeRAM to work below 1V. Various advantages of low-voltage and high-speed operation inherent in integrated ferroelectrics will be emphasized on the intelligent microelectronics applications toward the next multimedia generation.

We present results on four integrated ferroelectric projects: 1) An integrated barium strontium titanate thin-film on GaAs MMIC (monolithic microwave integrated circuit) with dielectric constant of 450 and loss tangent of 10-3 at 2.2 GHz operation, done as a Symetrix/Matsushita Electronics Corp. joint development; 2) A low-density (1 Kb) ferroelectric RAM (random access memory) done with PZT (lead zirconate titanate) and other ferroelectrics on CMOS (complementary metal oxide semiconductor) Si, carried out as a joint development with Olympus Optical Co.; 3) A liquid-source CVD (chemical vapor deposition) machine and its deposition of strontium titanate and barium strontium titanate films of exceptionally low d.c. leakage current (1 nA/cm2 at 120 nm thickness and 3V operation) for DRAM (dynamic RAM) applications; and 4) performance parameters of a properietary material for RAM application which is totally fatigue-free up to at least 5 × 1011 cycles.

A simple model of fatigue in ferroelectric thin-films is developed from first principles. The core of the model is the distribution of pinning and coercive energies due to the polycrystalline nature of the material. Also, because domain nucleation for thin-films seem to be surface dominant, and surface space-charges are usually present, the model assumes that the pinning energies are field activated due to surface screening effects. The model is based on the well known two-state cluster theory in statistical physics. Further results from the model include the log (t) dependence of fatigue as a direct consequence of a gaussian distribution of pinning energies. And, for the first time a theoretical description of the V-1 dependence of fatigue is also described. The model is tested using fatigue data of sol-gel derived integrated (Si) PZT capacitors.

PZT, PbZrxTI1-xO3, thin-films with various Zr/Ti ratios, 100/0 (lead zirconate) to 0/100 (lead titanate), were prepared by the sol-gel method. Basic electric properties, dielectric constant, tan σ, P-E hysteresis curve, switching properties were measured respectively as a function of composition. Dielectric constant indicated a specific peak value (∼1100) around the morphotropic phase boundary between tetragonal and rhombohedral phase. Satisfactory low-voltage saturated hysteresis curves were observed for the compositions of PZT(90/10) through PZT(20/80). The remanent polarization and the coercive field increased as the titanium content decreased. The result of X-ray measurement showed that the lattice constants of thin-Film PZT are different from bulk ceramics for compatible compositionsS. The boundary, on which the c/a ratio must be 1 (rhombohedral phase), was slightly shifted to PbTiO3 side. This distortion in crystal structure is considered to be due to the thin-film effect, which the lattice mismatch between the platinum substrate and the PZT layer, restricted the ions to position into proper cites.

Studies of electrical properties and an equivalent circuit model is developed for ferroelectric PZT(Ti = 60%) thin film capacitors made by sol-gel spin coating with Pt electrodes. The equivalent circuit consists of two major parts: serial space charge capacitors demonstrating surface effects and parallel elements modeling the inner polycrystalline ferroelectric regions. This model is based on device physics which can demonstrate both the measured capacitance voltage characteristics and hysteresis curves. From the model fit to the data, an estimate of the space charge concentration at the surface and inner grain boundary region of 57times;1020 cm-3 and 1×1018 cm-3 respectively is made. Further electrical characterizations such as pulse switching and polarization degradation (fatigue) have also been studied. Using the equivalent circuit, other characteristics such as the switching time can be studied showing its dependence on applied voltage and capacitor area. The applied voltage dependence of fatigue is shown via an empirical equation where the degradation rate is electric field activated.