Search

GaN-on-Si high electron mobility transistors (HEMTs) were fabricated using Si CMOS-compatible metallization scheme for RF power amplifiers (PAs)in 5G low-power mobile system-on-chips (SoCs). Ta/Al metals were adopted for the ohmic contact formation. The device with 80-nm rectangular gate exhibited a drain current ( $I_{d\mathrm {max}}$ ) of 1.95 A/mm, a peak transconductance ( $g_{m}$ ) of 471 mS/mm, a cutoff frequency ( $f_{T}$ ) of 178 GHz, and a maximum oscillation frequency ( $f_{\mathrm {max}}$ ) of 74 GHz. At a mobile SoC-compatible supply voltage of $V_{d} = 5$ V, the device shows a peak power-added efficiency (PAE) of 51.4%/47.6%, a maximum output power density ( $P_{\mathrm {outmax}}$ ) of 1.12 W/mm/1.06 W/mm, and a gain of 16 dB/16 dB at frequency of 3.5 GHz/5 GHz, respectively. These results indicate the great potential of the GaN-on-Si HEMTs for high-performance and low-cost RF PAs for 5G mobile SoC applications.

100 nm T-gate GaN-on-Si HEMTs fabricated using CMOS-compatible Au-free Ta/Al ohmic and Ti/Al gate contacts are reported in this work. The device exhibited a maximum drain current of 1.82 A/mm, a peak transconductance of 489 mS/mm, a cut-off frequency $f_{\mathrm{T}}$ of 102 GHz, and a maximum oscillation frequency $f_{\max}$ of 114 GHz. Good RF performance comparable to their counterparts with Au-contained processes is achieved, demonstrating its potential for cost-effective microwave and mm-wave applications.

[EN]We report on the modeling of self-heating in GaN-based devices. While a constant thermal resistance is able to account for the self-heating effects at low power, the decrease of the thermal conductance of semiconductors when the lattice temperature increases, makes necessary the use of temperature dependent thermal resistance models. Moreover, in order to correctly account for the steep increase of the thermal resistance of GaN devices at high temperature, where commonly used models fail, we propose a non-linear model which, included in an electro-thermal Monte Carlo simulator, is able to reproduce the strongly non-linear behavior of the thermal resistance observed in experiments at high DC power levels. The accuracy of the proposed non-linear thermal resistance model has been confirmed by means of the comparison with pulsed and DC measurements made in devices specifically fabricated on doped GaN, able to reach DC power levels above 150 W mm−1 at biases below 30 V., NRF2017-NRFANR003 GaNGUN project, the Spanish MINECO and FEDER through project TEC2017-83910-R and the Junta de Castilla y León and FEDER through project SA254P18.

Passively mode-locked semiconductor lasers are promising for a wide variety of chip-scale high-speed and high-capacity applications. However, the phase noise/timing jitter of such light sources are normally high, which restricts their applications. A simple and low-cost chip-scale solution to address this issue is highly desired. In this work, a two-section GaSb-based passively mode-locked laser (MLL) emitting in the 2 µm wavelength band with a fundamental repetition frequency of ∼ 13.35 G H z is presented. Dramatic phase noise reduction is achieved through its hybrid integration with a silicon photonic circuit which provides chip-scale optical feedback to the MLL. Under a fixed laser bias condition, more than 50 × improvement of radio frequency linewidth to sub-kilohertz level is realized by carefully adjusting the feedback strength (via a p-i-n junction-based variable optical attenuator) and optical length of the feedback loop (via integrated heater on the silicon waveguide). The phase noise reaches − 113 d B c / H z at 1 MHz offset with integrated timing jitters of 274 fs (100 kHz to 100 MHz) and 123 fs (4 to 80 MHz). At the same time, the pulse-to-pulse jitter reaches as low as 7.8 fs/cycle. These values are record low for 2 µm passively mode-locked semiconductor lasers. Our results prove the feasibility of MLL noise reduction with the chip-scale hybrid III-V/silicon integration method, bringing low-noise light sources to the silicon platform. Moreover, this work also suggests the potential miniaturization of various other functional setups with the same method.

AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MISHEMT) with a low-temperature epitaxy (LTE)-grown single crystalline AlN gate dielectric were demonstrated for the first time and the post-gate annealing effects at 400 &deg, C were studied. The as-deposited LTE-AlN MISHEMT showed a maximum drain current (IDmax) of 708 mA/mm at a gate bias of 4 V and a maximum extrinsic transconductance (gmmax) of 129 mS/mm. The 400 &deg, C annealed MISHEMT exhibited an increase of 15% in gmmax, an order of magnitude reduction in reverse gate leakage and about a 3% suppression of drain current (ID) collapse. The increase of gmmax by post-gate annealing is consistent with the increase of 2DEG mobility. The suppression of ID collapse and the reduction of gate leakage current is attributed to the reduction of interface state density (5.0 &times, 1011 cm&minus, 2eV&minus, 1) between the AlN/GaN interface after post-gate annealing at 400 &deg, C. This study demonstrates that LTE grown AlN is a promising alternate material as gate dielectric for GaN-based MISHEMT application.

AlN/GaN metal–insulator–semiconductor high electron mobility transistors (MISHEMTs) on silicon substrate using in situ SiN as gate dielectric were fabricated and their RF power performance at mobile system-on-chip (SoC) compatible voltages was measured. At a mobile SoC-compatible supply voltage of V d = 3.5 V/5 V, the 90 nm gate-length AlN/GaN MISHEMTs showed a maximum power-added efficiency of 62%/58%, a maximum output power density (P outmax) of 0.44 W mm−1/0.84 W mm−1 and a linear gain of 20 dB/19 dB at the frequency of 5 GHz. These results suggest that the in situ-SiN/AlN/GaN-on-Si MISHEMTs are promising for RF power amplifiers in 5G mobile SoC applications.

Low leakage current Schottky barrier diodes (SBDs) were fabricated on $\mathbf{30}\ \mu\mathbf{m}$ thick Mg-compensated GaN drift layer (DL) grown on a free-standing GaN substrate and tested up to 5.48 MeV $\alpha$ -particle energy. The Mg-compensated $\mathbf{30}\ \mu\mathbf{m}$ thick n--GaN DL was grown by MOCVD with low charge carrier density (CCD) of $\mathbf{4.1}\times \mathbf{10}^{\mathbf{15}}/\mathbf{cm}^{\mathbf{3}}$ . The observation of low CCD in the GaN DL by Mg-compensation helps to reduce the reverse leakage current (I R ) of SBDs to 2 pA and in the formation of $\mathbf{30}\mu\mathbf{m}$ depletion width (DW) even at 0 V. The fabricated GaN SBDs detected $\alpha$ -particle up to energy of 5.48 MeV with high charge collection efficiencies (CCE) of 100% emitted from 241 Am source.

The interface trap behavior in SiNx/AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) and Schottky HEMTs on CVD diamond was studied using parallel conductance techniques. In MISHEMTs, two different types of traps were identified, fast with the time constant $\tau_{\mathbf{T}}\equiv(\mathbf{0.1}-\mathbf{3.6})\mu\mathbf{s}$ and slow with $\tau_{\mathbf{T}}\equiv\mathbf{6}$ ms whereas, only fast traps were obtained in conventional HEMTs. These fast traps could be related to AlGaN/GaN hetero-interface which are identical in both the devices. The density of fast trap $(\pmb{D}_{\mathbf{TT}})$ is almost similar for MIS-HEMTs and HEMTs (∼of $\mathbf{0.7}-\mathbf{8\ x\ 10}^{\mathbf{11}}\mathbf{cm}^{-\mathbf{2}}\mathbf{eV}^{-\mathbf{1}})$ . The density of slow trap $(\pmb{D}_{\mathbf{Ts}})$ in MIS-HEMTs was estimated as $\sim\mathbf{6}-\mathbf{11\ x\ 10}^{\mathbf{12}}\mathbf{cm}^{-\mathbf{2}}\mathbf{eV}^{-\mathbf{1}}$ which could be related to the Schottky/dielectric interface.

A low voltage (&minus, 20 V) operating high-energy (5.48 MeV) &alpha, particle detector with a high charge collection efficiency (CCE) of approximately 65% was observed from the compensated (7.7 &times, 1014 /cm3) metalorganic vapor phase epitaxy (MOVPE) grown 15 &micro, m thick drift layer gallium nitride (GaN) Schottky diodes on free-standing n+-GaN substrate. The observed CCE was 30% higher than the bulk GaN (400 &micro, m)-based Schottky barrier diodes (SBD) at &minus, 20 V. This is the first report of &alpha, &ndash, particle detection at 5.48 MeV with a high CCE at &minus, 20 V operation. In addition, the detectors also exhibited a three-times smaller variation in CCE (0.12 %/V) with a change in bias conditions from &minus, 120 V to &minus, 20 V. The dramatic reduction in CCE variation with voltage and improved CCE was a result of the reduced charge carrier density (CCD) due to the compensation by Mg in the grown drift layer (DL), which resulted in the increased depletion width (DW) of the fabricated GaN SBDs. The SBDs also reached a CCE of approximately 96.7% at &minus, 300 V.

A mid-infrared (MIR) biochemical sensor based on a one-time Si etching suspended microracetrack resonator with lateral subwavelength-grating metamaterial cladding is theoretically and experimentally demonstrated on a commercial 340-nm-thick-top-silicon silicon-on-insulator platform. The suspended structure offers an increased interaction area between the mode field and the chemicals under investigation, as well as good sensitivity. The one-time Si etching process also eases the fabrication. The suspended waveguide is optimized to obtain a balance between propagation loss and sensitivity. The suspended microracetrack resonator is experimentally measured at 2 μm wavelength with an extinction ratio of 12.1 dB and a full-width at half-maximum of 0.13 nm, which corresponds to a quality factor (Q factor) of 15 300. With the equivalent refractive index method and a specially developed numerical model, the sensing performance based on the waveguide structure has been simulated and analyzed. The simulation results show that the expected sensitivity of fundamental TE mode can achieve 337.5 nm/RIU. This one-time Si etching suspended microracetrack resonator shows great potential for ultrasensitive MIR optical biochemical sensing applications. NRF (Natl Research Foundation, S’pore) Accepted version

In this letter, InAlN/GaN high electron mobility transistors (HEMTs) with 40–200 nm rectangular gates and 300–700 nm source-to-drain distances were fabricated on Si substrates. The device with 40-nm gate and 300-nm source-to-drain distance exhibited a high drain current of 2.66 A/mm, a transconductance ( ${g} _{m}$ ) of 438 mS/mm, and a high current gain cutoff frequency ( ${f} _{T}$ ) of 250 GHz. To the best of our knowledge, this is the highest ${f} _{T}$ value reported so far for GaN-based transistors on Si. An effective electron velocity of ${1.1} \times {10}^{{{7}}}$ cm/s was extracted, which is comparable with those reported for InAlN/GaN HEMTs on SiC. These excellent results indicate that GaN HEMTs on Si have a great potential for low-cost emerging mm-Wave applications.

AlGaN/GaN metal–insulator-semiconductor high-electron-mobility transistors (MISHEMTs) have been demonstrated with 22 nm thick vertically ordered (VO) h-BN by high-power impulse magnetron sputtering deposited at room temperature for the first time. About two orders of magnitude lower gate leakage current was observed in VO h-BN/AlGaN/GaN MIS-diodes compared to conventional Schottky diodes. The fabricated MISHEMT and HEMT with 2 µm gate-length exhibited a maximum drain current density (IDmax) of 685 and 467 mA/mm and a maximum extrinsic transconductance (gmmax) of 93 and 134 mS/mm, respectively. The VO h-BN/AlGaN/GaN MISHEMT with improved characteristics is due to an enhanced sheet carrier density (from 7.29 × 1012 cm−2 to 1.10 × 1013 cm−2) by surface passivation of VO h-BN as well as the good VO h-BN/GaN interface quality with a minimum interface state density of 2.6 × 1012 cm-2eV−1.

In this letter, we report an InAlN/GaN high electron mobility transistor (HEMT) with a planar nanostrip channel design to improve its transconductance $\text{g}_{\mathrm {\mathbf {\textsf {m}}}}$ and cut-off frequency $\text{f}_{\mathbf {\textsf {T}}}$ linearity. The planar nanostrips were formed by partial arsenic ion implantation isolation in the channel under the gate. Devices with a gate length ( $\text{L}_{{\textbf {g}}}$ ) of 80 nm and a source-to-drain distance ( $\text{L}_{\mathrm {\mathbf {\textsf {sd}}}}$ ) of 1 $\mu \text{m}$ were fabricated. A conventional device and a device with a fin-like nanowire channel were also fabricated together for comparison. It was observed that the nanostrip and nanowire channel structures can both suppress the access resistance increase at the high output current level, and thereby improve the device’s $\text{g}_{\mathrm {\mathbf {\textsf {m}}}}$ and $\text{f}_{\mathrm {\mathbf {\textsf {T}}}}$ linearity. Compared to the one using etching to form a fin-like nanostrip channel, the GaN HEMT with a planar nanostrip channel has demonstrated reduced parasitic capacitance and improved RF performance.

We have investigated the influence of the two-dimensional electron gas (2DEG) in AlGaN/GaN high electron mobility transistors (HEMTs) on their reliability under ON-state conditions. Devices stressed in the ON-state showed a faster decrease in the maximum drain current (I Dmax ) compared to identical devices stressed in the OFF-state with a comparable electric field and temperature. Scanning electron microscope (SEM) images of ON-state stressed devices showed pit formation at locations away from the gate-edge in the drain-gate access region. Cross-sectional transmission electron microscope (TEM) images also showed dark features at the AlGaN/SiN interface away from the gate edge. Electron energy loss spectroscopy (EELS) analysis of the dark features indicated the presence of gallium, aluminum and oxygen. These dark features correlate with pits observed in the SEM micrographs. It is proposed that in addition to causing joule heating, energetic electrons in the 2D electron gas contribute to device degradation by promoting electrochemical oxidation of the AlGaN.

GaN-on-Si has revealed its great potential for next-generation power electronics applications, however, there remains a challenge in increasing the breakdown voltage $(BV_{\text{off}})$ due to the limit of the GaN epilayer thickness on large size wafers. In this work we propose a GaN-on-Insulator (GNOI)-on-Si structure to address this issue. A 200 mm GNOI-on-Si wafer was prepared through removing the original Si substrate of a GaN-on-Si wafer and bonding onto a fresh SiO 2 /Si substrate. HEMTs were fabricated with measured $BV_{\text{off}}$ much larger than those on GaN-on-Si. Record high $BV \text{off}$ up to 2200 V and high figure-of-merit (FOM) $BV_{off^2}/R_{\text{on, sp}}$ up to 1.87 GW/cm2 have been achieved in the HEMTs on a 200 mm GNOI-on-Si wafer with a thin GaN epilayer of $3.2 {\mu m}$ .

One effective approach to reduce the cost of GaN devices is to use 200 mm-diameter and 725 μm-thick p-Si substrates. We demonstrated RF and power GaN-on-Si HEMTs on small pieces of samples from 200 mm wafers using Au-contained process. f T /$f_{\max}$ of 36/33 GHz were achieved in 0.25 μm gate RF devices and breakdown voltage (BV off )>1200V was achieved in power devices. 200 mm wafers were fabricated using CMOS-compatible process and devices with BV off >850 V were achieved.

AlGaN/GaN metal-insulator-semiconductor (MIS) diodes have been demonstrated using low temperature epitaxy (LTE) AlN grown at 200°C as a dielectric for the first time. The MIS-diodes exhibited 3 orders of magnitude lower gate leakage current compared to conventional Schottky diodes. The interface state density (D it ) was estimated using the conductance-frequency method (CF) at a minimum value of 2.6×1012 cm-2eV-1 at 0.24 eV below the conduction band. These D it values are comparable to those obtained from PEALD grown bi-layer Al 2 O 3 /AlN and LPCVD grown SiN on GaN MIS-diodes.

Effect of drift layer thicknesses (DLT) (2, 15 and $30 \mu m)$ in reverse current conduction mechanisms of vertical GaN-on-GaN Schottky Barrier Diodes grown MOCVD has been investigated for the first time. The conduction mechanism is changing from thermionic field emission (TFE) to thermionic emission (TE) when the DLT of GaN increases. The SBDs with DLT of $2 \mu m$ and $30 \mu m$ exhibit TFE through PooleFrenkel emission and TE, respectively. However, the SBDs with DLT of $15 \mu m$ exhibit both TFE and TE. Activation energy $(E_{a})$ of traps was also calculated to be 0.69 eV for $2 \mu m$, 0.38 for $15 \mu m$ and 0.4 eV for $30 \mu m$ respectively. $E_{a}$ of 0.69 eV and 0.4 eV could be associated with screw threading dislocations and the presence of Mg in the grown drift layer, respectively.

We demonstrate the potential of a novel hybrid nanostructure three-dimensional graphene (3D-C) coated with boron nitride (BN) as an electromagnetic interference (EMI) shield. BN, deposited by sputtering, encapsulates 3D-C to form a light-weight graphene based EM shield that has an electrically insulating exterior. The BN deposited on 3D-C was homogeneously distributed with even coverage on the struts of 3D-C. EMI shielding results have shown that the hybrid material has a total shielding effectiveness (SET) of 53dB and 58dB in the X band and Ku band respectively. EDB (Economic Devt. Board, S’pore) Accepted version

A monolithic two-section InGaSb/AlGaAsSb single quantum well mode-locked laser (MLL) emitting at 2 μm is demonstrated. The laser is able to lase in the continuous wave mode up to 80 °C, and passive mode locking operation with a fundamental repetition frequency of ∼18.4 GHz is observed up to 60 °C. The laser has a characteristic temperature T0 of ∼88 K near room temperature, which is only slightly affected by the absorber bias voltage (Va). One consequence of this finding is verified by the temperature-independent power ratios before lasing. The variations of the repetition frequency with gain current (Ig) and temperature (T) have also been systematically investigated. In the bias range in this work, the repetition frequency increases as a whole by more than 30 MHz when the temperature is raised from 20 to 40 °C. Frequency tuning of ∼130 and ∼60 MHz was observed at 20 and 40 °C, respectively. The results and their mechanism analysis provide guidelines for GaSb-based MLLs to better meet the application-required repetition frequencies even with the presence of an unwanted increase in temperature. NRF (Natl Research Foundation, S’pore) Published version

We have investigated the self-heating effect on DC and RF performances of identically fabricated AlGaN/GaN HEMTs on CVD-Diamond (GaN/Dia) and Si (GaN/Si) substrates. Self-heating induced device performances were extracted at different values drain bias voltage ( $V_{D}$ ) and dissipated DC power density ( $P_{D}$ ) in continuous wave (CW) operating condition. The effect of self-heating was observed much lesser in GaN/Dia HEMTs than GaN/Si HEMTs in terms of $I_{\mathrm{D}}$ , $I_{\mathrm{G}}$ , $g_{\mathrm{m}}$ , $f_{\mathrm{T}}$ and $f_{\mathrm{max}}$ reduction. Increased channel temperature caused by joule heating at high $P_{\mathrm{D}}$ reduces the 2-DEG carrier mobility in the channel of the device. This behaviour was also confirmed by TCAD simulation which showed ~3.9-times lower rising rate of maximum channel temperature and lowers thermal resistance ( $R_{\mathrm{th}}$ ) in GaN/Dia HEMTs than GaN/Si HEMTs. Small signal measurements and equivalent circuit parameter extraction were done to analyze the variation in performance of the devices. Our investigation reveals that the GaN/Dia HEMT is a promising candidate for high power density CW operation without significant reduction in electrical performance in a large drain bias range.

The piezoelectric modulus of wurtzite aluminum nitride (AlN) is a critical material parameter for electrical components, ultimately contributing to the energy efficiency and achievable bandwidth of modern communication devices. Here, we demonstrate that the introduction of metallic point-defects (Ti, Zr, Hf) improves the piezoelectric modulus of as-received, unstrained, epitaxially grown AlN. The metals are incorporated by ion implantation with an acceleration energy of 30 keV to a fluence of 1015 at cm-2, which causes an elongation along the wurtzite c-axis. The stored internal strain energy increases the piezoelectric polarization of the thin AlN layer. This can equivalently be described by an enhancement of the piezoelectric modulus d33. The incorporation of 0.1 at. % Ti enhances the piezoelectric modulus by ∼30%; significantly exceeding gains obtained by alloying with the same amount of Sc. Published version The research was financed by the New Zealand Ministry for Business, Innovation, and Employment (No. C05X1712). This work used the JEOL JEM-ARM200F and FEI NanoLab G3 CX both funded by the Australian Research Council (ARC)—Linkage, Infrastructure, Equipment and Facilities (LIEF) Grant (Nos. LE120100104 and LE160100063, respectively) and located at the University of Wollongong Electron Microscopy Centre (UoW EMC), Australia.

AlGaN/GaN metal-insulator-semiconductor (MIS) diodes were fabricated using low temperature epitaxy (LTE) grown AlN at 200 °C, a technique combining both physical vapor deposition and chemical vapor deposition. The interface trap characteristics of the MIS-diodes were investigated using the frequency dependent parallel conductance method. Two distinct interface trapping regions were observed, where the fast interface traps had an estimated density (Dit) as low as 6.7 × 1011 cm−2 eV−1 while the slow interface traps Dit were as low as 6.8 × 1011 cm−2 eV−1. About 3.8 × improvement in Dit was achieved compared to our previous work by optimization of the LTE deposition conditions. The fast traps are located within the energy interval of 0.24–0.30 eV below the conduction band while the slow traps are located 0.44–0.56 eV below the conduction band. The observed fast traps were associated with the AlGaN/GaN interface, while the observed slow traps may have formed at AlN/GaN interface during the deposition of AlN by LTE.

A comprehensive scalable trap-charge model for the dc and pulsed $I$ – $V$ modeling of GaN high electron-mobility transistor is presented. While interface traps are considered for dc $I$ – $V$ modeling, surface states and traps in the AlGaN barrier and GaN buffer are considered for the pulsed $I$ – $V$ model. A surface-potential-based model is presented for interface traps, which is then adapted to the current model for the dc modeling. For the pulsed $I$ – $V$ modeling, a semiempirical approach is proposed for gate lag as well as both gate-lag and drain-lag conditions. The model is able to capture the effects of gate ( $V_{\mathrm{ gq}})$ and drain ( $V_{\mathrm{ dq}})$ quiescent biases as well as the stress time ( $T_{\mathrm{\scriptscriptstyle OFF}})$ , and is validated with both numerical simulation and measurement data. Finally, for the accurate transient simulations in switching applications, the emission of electrons is also modeled in Verilog-A using an asymptotic solution of a differential equation, which can be a better alternative to that of the $RC$ subcircuit approach.

Current-voltage-temperature characteristics (0oC to 150oC) of SBDs on highly compensated 15µm and 30µm n-type GaN drift layer were measured for voltages up to -300V and up to -800V, respectively. When the temperature is between 75oC and 100oC, both SBDs exhibited a similar change in conduction mechanism from thermionic field emission (TFE) to thermionic emission (TE) due to the activation of N-vacancies (VN) (Ea=-1.67eV). However, at high voltages when the temperature is >100oC, the conduction mechanism changes from TE to TFE due to the de-trapping of electrons from the activated carbon-traps (Ea=+0.69eV) in the grown DLs.

Vertically ordered hexagonal boron nitride (h-BN) films were successfully sputtered on AlGaN/GaN heterostructure (HS) using High Power Impulse Magnetron Sputtering at room temperature. The h-BNs vertical ordering along the (0002) plane was confirmed using high-resolution transmission electron microscopy. After the h-BN deposition, degradation of two-dimensional electron gas (2DEG) properties was observed in AlGaN/GaN HS. Full recovery of 2DEG mobility, along with an improvement in sheet resistance and an increase in sheet carrier concentration was obtained after rapid thermal annealing at 500°C for 300s in a N2 atmosphere, which is due to the reduction of sputtering related structural damage.

GaN-on-Si high electron mobility transistors (HEMTs) with 80 nm gate length fabricated using Si CMOS-compatible Ta/Al ohmic and Ti/Al gate contacts are reported in this work. The device with a source-drain distance (Lsd) of 750 nm exhibited a high cut-off frequency (fT) of 210 GHz. An off-state breakdown voltage (BV) of 46 V and a high Johnson's figure-of-merit (= fT × BV) of 8.8 THzV have been achieved in a device with Lsd of 1.5 μm. These results show the great potential of GaN-on-Si HEMTs to realize high performance-to-cost ratio mm-wave devices through mass production using current Si foundries.

A deeply-scaled GaN-on-Si high electron mobility transistor (HEMT) with a record-high cut-off frequency (fT) of 310 GHz has been demonstrated. The device has an InAlN/GaN heterojunction structure, a source-drain spacing of 400 nm, and a gate length of 40 nm. The device exhibited a high drain current of 2.34 A/mm, a peak transconductance of 523 mS/mm, and a gate-to-drain breakdown voltage (BVgd) of 15 V. A Johnson's figure-of-merit (FOM = fT × BV) of 4.65 THz-V has been achieved, which is comparable to those reported in GaN-on-SiC. These results indicate GaN-on-Si transistors are promising in low-cost emerging mm-wave applications.

Thermally tunable Fano and electromagnetically induced transparency (EIT) resonances are theoretically and experimentally demonstrated based on a Mach-Zehnder interferometer assisted Bragg grating-microring coupled resonant system on silicon-on-insulator (SOI) platform. In this paper, the destructive and constructive coupling between the two resonators, the microring resonator and the Fabry-Perot resonator formed by two Bragg gratings, give rise to the Fano and EIT resonances, respectively. The resonance lineshape can be controlled and converted by tuning the optical path length of the MZI arm. The device performance has been theoretically analyzed by using a specially developed numerical model. The coupled resonant system was designed, fabricated, and characterized on a commercial (SOI) platform. The tuning and conversion of the resonance lineshape by thermo-optical effect have been experimentally observed and verified, with good agreement between the experimental data and the simulations. NRF (Natl Research Foundation, S’pore) ASTAR (Agency for Sci., Tech. and Research, S’pore) Published version

GaN-on-Silicon growth by MOCVD is wildly discussed in the context of stress and strain management. The low bow AlGaN/GaN structure grew on 200mm Si(111) wafer was demonstrated in this study. After using the sapphire pits on the normal flat susceptor, the wafer bow and residual stress decrease to 21.27um and 0.28GPa tensile stress. The GaN quality and the Rs in HEMT also got huge improvement. The sub-micron devices also show the comparable results in DC and small signal characteristics.

Mode locking is achieved in a 2 μm monolithic GaSb-based laser. The repetition frequency of the laser, as a function of temperature and injection current, is investigated. The reasons for the frequency tuning are discussed. Published version

Mode locking is achieved in a 2 μm GaSb-based laser up to 60 °C. The laser has a T0 of ~82 K at room temperature, and the absorber bias voltage has little effect on T0. Published version

A one-time etching suspended microracetrack resonator with lateral sub-wavelength-grating (SWG) metamaterial cladding is theoretically and experimentally demonstrated on commercial 340 nm-thick-top-silicon silicon-on-insulator (SOI) platform for mid-infrared (MIR) bio-chemical sensing applications. The suspended structure can offer a larger exposed area of waveguides with the testing chemicals as well as a decent sensitivity. And the one-time etching process also eases the fabrication. The suspended waveguide is optimized with a balance between propagation loss and the sensitivity. The suspended microracetrack resonator is experimentally measured at 2 μm wavelength and well fitted with an extinction ratio (ER) of 12.3 dB and a full-width-at-half-maximum (FWHM) of 0.12 nm, which corresponds to a quality factor (Q factor) of 16600. With the equivalent refractive index method and a specially developed numerical model, the expected sensitivities of fundamental TE and TM mode were calculated as 58 nm/RIU and 303 nm/RIU respectively. This one-time etching suspended microracetrack resonator shows great potential in MIR optical bio-chemical sensing applications. Published version