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Modern integrated circuits (ICs) employ a myriad of materials organized at nanoscale dimensions, and certain critical tolerances must be met for them to function. To understand departures from intended functionality, it is essential to examine ICs as manufactured so as to adjust design rules, ideally in a non-destructive way so that imaged structures can be correlated with electrical performance. Electron microscopes can do this on thin regions, or on exposed surfaces, but the required processing alters or even destroys functionality. Microscopy with multi-keV x-rays provides an alternative approach with greater penetration, but the spatial resolution of x-ray imaging lenses has not allowed one to see the required detail in the latest generation of ICs. X-ray ptychography provides a way to obtain images of ICs without lens-imposed resolution limits, with past work delivering 20–40 nm resolution on thinned ICs. We describe a simple model for estimating the required exposure, and use it to estimate the future potential for this technique. Here we show for the first time that this approach can be used to image circuit detail through an unprocessed 300 μm thick silicon wafer, with sub-20 nm detail clearly resolved after mechanical polishing to 240 μm thickness was used to eliminate image contrast caused by Si wafer surface scratches. By using continuous x-ray scanning, massively parallel computation, and a new generation of synchrotron light sources, this should enable entire non-etched ICs to be imaged to 10 nm resolution or better while maintaining their ability to function in electrical tests.

This paper demonstrates a breakthrough method of visible laser probing (VLP), including an optimized 577 nm laser microscope, visible-sensitive detector, and an ultimate-resolution gallium phosphide-based solid immersion lens on the 10 nm node, showing a 110 nm resolution. This is 2x better than what is achieved with the standard suite of probing systems using typical infrared (IR) wavelengths today. Since VLP provides a spot diameter reduction of 0.5x over IR methods, it is reasonable, based simply on geometry, to project that VLP using the 577 nm laser will meet the industry needs for laser probing for both the 10 nm and 7 nm process nodes. Based on its high level of optimization, including high resolution and specialized solid immersion lens, it is highly likely that this VLP technology will be one of the last optically-based fault isolation methods successfully used.

We report several cases of two photon absorption (TPA) laser assisted device alteration (LADA) using continuous wave (CW) 1,340 nm laser in Si Complimentary Metal-Oxide Semiconductor (CMOS) Integrated Circuits (IC). Two photon absorption using CW 1,340 nm laser in Si was confirmed by photon beam induced photocurrent measurements. TPA LADA showed greater than two times better resolution in critical timing circuit defect localization and debug application, when compared with traditional single photon absorption (SPA) LADA with CW 1,064 nm laser. A simplified analysis on the resolution improvements presented here showed in good agreement with our experimental observations. Further enhancements of this technology are outlined, which we believe will enable this technology for critical timing circuit debug capabilities well into the future generations of Si CMOS Debug applications.

Methods and techniques for micromachining and probing C4 packaged microprocessors from the silicon backside are described. The micromachining technique is based on using a combination of Laser Chemical Etching and Focused Ion Beam milling to open precision probe holes and perform circuit editing from the backside. A method to optically probe flip chip packaged CMOS microprocessors is also described. The optical probing technique utilizes an infrared laser to probe diffusions directly through the silicon backside without the need to mill probe holes.

This paper describes various measurements on self-heat performed on Intel's 22nm process technology, and outlines its reliability implications. Comparisons to thermal modeling results and analytical data show excellent matching.

In this paper, we report on the first observation and study of two-photon absorption (TPA) based laser assisted device alteration (LADA) using a continuous-wave (CW) 1340nm laser. The study was conducted using LADA systems equipped with high numerical aperture (NA) liquid and solid immersion lens objectives on Intel’s 45 nm and 32 nm multiprocessor units (MPU) and test chips. The power densities achievable using these lenses are similar to those reported in the literature for TPA in silicon of CW 1455nm light [1]. We show that the induced photocurrent has a quadratic dependence on the input laser power, a key indicator of two-photon phenomenon. Our results imply that even when using 1340nm wavelength CW lasers, there is a potential for laser invasiveness with the high power densities achievable using high NA objectives. Laser induced damage of the DUT is also a possibility at these high power densities, particularly with the solid immersion lens (SIL). However, we show that the DUT damage threshold can be increased by reducing the DUT’s temperature. Finally, we present results demonstrating a >40% improvement in localization of critical timing faults using TPA based LADA, when compared to traditional 1064nm wavelength (single-photon absorption) LADA.

This paper presents the first single element time resolved emission (TRE) data collected from microprocessors fabricated with 0.13 µm process silicon using tester loop lengths, and in many cases acquisition times, comparable to laser voltage probing. The data presented here demonstrate that TRE tools with highly sensitive single element detectors can be used for practical microprocessor circuit diagnostics with reasonable acquisition times.

Single probe beam phase-sensitive detection has been applied to backside optical probing using an interferometer with a novel vibration cancellation scheme. Improved waveform quality and consistency, compared to amplitude-sensitive detection, has been successfully demonstrated on a number of CMOS microprocessors based on the 0.18 um logic process technology. The interferometric probing scheme will be described in detail and results will be presented.

A novel optical probing technique to measure voltage waveforms from flip-chip packaged complementary metal-oxide-semiconductor (CMOS) integrated circuits (IC) is described. This infrared (IR) laser based technique allows signal waveform acquisition and high frequency timing measurement directly from active PN junctions through the silicon backside substrate on IC’s mounted in flip-chip, stand-alone, or multi-chip module packages as well as wire-bond packages on which the chip backside is accessible. The technique significantly improves silicon debug & failure analysis (FA) through-put time (TPT) as compared to backside electron-beam (E-beam) probing because of the elimination of backside trenching and probe hole generation operations.

Optical probing using the Schlumberger IDS-2000 and other infrared-based analysis techniques have proved to be critical in the debug and analysis of flip-chip-packaged microprocessors. During probing, processors are operating with test patterns that generate a large amount of power. This article demonstrates a method for dissipating the generated heat based on a diamond window-based transparent heat spreader. This method controls the microprocessor temperature to a high degree of stability, and reduces thermal gradients across the die. Waveform results are excellent, and the transparent heat spreader provides a path for optical probing to be applied to the entire range of integrated circuit applications. The discussion covers cooling system requirements, and standard configuration specifications, and shows how the transparent heat spreader technique is effective for probing high power microprocessors.

With the advent of C4 packaging technology, Intel has developed, in conjunction with a technology partner, an integrated, laser-based optical backside probing system. This article begins with a description of the basic system operation. This is followed by a discussion on the electro-optic effect in CMOS, which is used for the signal acquisition. The question of invasiveness of the photo-injected carriers is then discussed. Information on the entire probing environment is also provided. The article also discusses results and presents a comparison with other waveform acquisition techniques. It ends with a brief discussion on the developments needed to scale the technique to future processes.

Liquid immersion lens technology has been applied to internal-node, through-silicon probing of 130 nm integrated circuits. A 100×, 1.3 numerical aperture (NA) objective with 100 μm working distance was specifically designed for this application. An optical resolution of 500 nm is achieved using 1064 nm wavelength light, ≈30% improvement over the standard, air immersion, 0.85 NA lens currently used. Significant improvements in wave form quality were also achieved. A >2× signal to noise ratio improvement is demonstrated on 130 nm technology devices. Probing of 90 nm technology devices indicate that laser voltage probing with liquid immersion lens technology and phase-sensitive detection is extensible to this process node.