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The leakage current originated from the fluctuations of the common-mode voltage (CMV) is an issue in a transformerless grid-connected photovoltaic system. In this paper, a modified space vector modulation based on the Fourier transform analysis is proposed to reduce the leakage current in a three-phase quasi-Z-source inverter (qZSI). The CMV harmonic content in a qZSI contains low- and high-frequency harmonics that cause safety and electromagnetic interference problems, respectively. By implementing the proposed modulation in a three-phase qZSI, the low-frequency harmonics of the CMV are mainly reduced. The distribution of the high-frequency harmonics is also modified in a way they can be simply filtered. Passive filtering in a qZSI using other modulation techniques is less effective than using this method. Applying the proposed modulation in the presence of a high-frequency inductive-capacitive filter results in the strong suppression of both high- and low-frequency harmonics (more than 90% in the investigated case). A reduced-voltage prototype is designed to evaluate the modulation method. The experimental results from this prototype verify the accuracy of the proposed technique. [ABSTRACT FROM AUTHOR]

Several applications need a high power, high output voltage ac/dc converter. The structure includes a dc/dc resonant stage, which is fed from a three-phase line. Due to standards, rectified dc input voltage varies largely from 400 to 750 V affecting the adversely overall design and current levels. In fact, losses in the inverter become unbearable if both switching frequency and transferred power are desired beyond a certain level. In those cases, it is necessary to connect several switches in parallel. As an alternative, the new switches can configure a new modular structure instead, adding more flexibility in the control to compensate input voltage variations. As a result, the required circulating current is reduced to a half, with benefits in total power losses. Moreover, the nature of the topology allows a reconfiguration of the resonant net (LCC) for low power, reducing even further the minimum circulating current under those conditions (fluoroscopy, for instance). In this paper, the new multilevel resonant topology is mathematically modeled and proposed for radiography and fluoroscopy. An example illustrates the design procedure for a given application at 100 kW, 50–150 kV. [ABSTRACT FROM AUTHOR]

Although SiC-mosfet has significant advantages on switching performance over traditional Si-IGBT, the switching loss of SiC-mosfet devices at hard switching rises quickly with the increment in the switching frequency. This has narrowed down further possibilities of improving efficiency and power density of the grid inverter. Zero-voltage-switching (ZVS) space-vector-modulation (SVM) technique is introduced to further push the power density of SiC-mosfet inverter. This paper focuses on the impact of applying the ZVS-SVM to three-phase two-level SiC-mosfet inverter. With the same efficiency requirement the ZVS-SVM SiC inverter can operate at a much higher switching frequency, which gives the opportunity to further reduce the size of passive components. The loss distributions, conversion efficiencies, and volumes of passive components of both a 20-kW SiC-mosfet hard-switching inverter and a 20-kW SiC-mosfet ZVS-SVM inverter have been compared under switching-frequency range from 50 to 300 kHz. Meanwhile, a new metric called “efficiency stiffness” is proposed to compare different inverters with respect to the efficiency performance against switching-frequency characteristics. In addition, high voltage overshoot of SiC-mosfet and high thermal stress of resonant inductor are the two critical issues in the SiC-mosfet ZVS-SVM inverter with high switching frequency. A power module including seven SiC-mosfet bare dies with low stray inductance is designed for ZVS-SVM inverter instead of the existing seven discrete TO-247 package SiC-mosfets to reduce the voltage overshoots on the switches. Besides, to reduce the power loss of the resonant inductor caused by large amplitude of current at hundreds of kHz excitation frequency, design of the inductor with distributed air gap and optimal winding thickness are studied. A 20-kW SiC-mosfet ZVS-SVM grid inverter prototype is built to verify the proposed design. [ABSTRACT FROM AUTHOR]

Impedance-source inverters using coupled inductors have been investigated as alternatives for providing high step-up voltages. However, leakage inductances of the coupled inductors have commonly led to lower overall effectiveness, in addition to generating high dc-link voltage spikes. The latter raises voltage stresses of switches, which in turn, may reduce the power levels of the inverters. A high step-up Y-source inverter has therefore been proposed in this paper to provide a high boost with a smooth dc-link voltage ensured by proper recycling of the leakage energy. These features have been verified by comparing simulation and experimental results of an existing Y-source and the proposed inverters. Factors compared are their respective boost ratios, voltage stresses, current stresses, and dc-link voltage spikes. [ABSTRACT FROM AUTHOR]

Based on diode-assisted buck–boost inverter, this paper proposes a new commutation torque ripple suppression strategy for brushless dc motor (BLDCM). Four types of switching vectors are constructed, according to the working pattern of the diode-assisted inverter and the operation mode of the BLDCM. Moreover, the effects of switching vector combination on commutation torque ripple suppression and motor speed regulation are analyzed in the commutation and normal conduction periods, respectively. Based on this analysis, the duration of switching vectors within each modulation cycle is derived and the sequence of vectors is arranged at the same time in these two periods. The proposed method can effectively suppress the commutation torque ripple over the full speed range by unified switching vectors during the commutation period, without needing to switch control strategies according to the speed range. In addition, the increase of the voltage stress of switching devices in the inverter bridge can be avoided by designing the duration and sequence of switching vectors during the commutation and normal conduction periods. The effectiveness of the presented method is validated by the experimental results. [ABSTRACT FROM AUTHOR]

The new IEEE 1547-2018 standard includes dynamic Volt/VAr control for photovoltaic (PV) smart inverters. While recent research has addressed the problem of optimal inverter dispatch, the interaction between inverters and the classical Volt/VAr control (VVC) regulation system needs further study. This paper proposes an approach that builds on the classical VVC solution with PVs, by computing for each inverter a rule that modulates the smart inverter reactive power in function of its real power. Two approaches are presented for computing the inverter's reactive power equation slope: the first approach is based on the robust minimization of the absolute voltage magnitude deviation via a linear program, whereas the second approach yields closed-form solutions inspired from distributionally robust chance constraints. Numerical results are presented on weakly meshed distribution networks having up to 3146 nodes; they demonstrate that the voltage violations due to intermittent real power variations are significantly reduced by the decision rules as compared to maintaining the last computed VVC set-points, even when the inverters operate at constant power factor or with default Volt/VAr settings proposed in the literature; additionally, the reactive power decision rules maintain a network loss level that is close to the average from a centralized solution. [ABSTRACT FROM AUTHOR]

This paper proposes a switching strategy for the Z-source inverter (ZSI), which has unequal short-through intervals to reduce the current ripple in the inductor of its impedance source. A size reduction of the inductor of the ZSI is one of the important issues in improving the power density of the ZSI, and the inductor current ripple reduction is required to achieve it. The proposed method can reduce the inductor current ripple by 27.8% compared with the conventional method that has equal short-through intervals without increasing the number of inverter switching. The proposed operation and ripple reduction were confirmed in experiments with a 3-kW-class laboratory prototype. Its result agreed to the calculated results, and it was confirmed that there is no increase in circuit losses caused by the application of the proposed method. [ABSTRACT FROM AUTHOR]

In this paper, a new zero-sequence current suppression control strategy for the five-phase open-winding fault-tolerant fractional-slot concentrated-winding interior-permanent-magnet (FTFSCW-IPM) motor drive system with a common dc bus is proposed. By unequal distribution of the zero voltage vector, the proposed method can well suppress the zero-sequence current caused by the dead-time effect that the conventional eliminating method cannot be achieved. First, the dead-time effect to the zero-sequence current is discussed. Then the zero-axis controller is designed to obtain the reference common-mode voltage. Last, according to the principle of the unequal zero voltage vector distribution, the switching sequence of the two inverters can be calculated, and the maximum modulation index is also first deduced in detail. The proposed method is proved by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper explores a power-conversion system for single-phase transformerless ac module application. A nonisolated high-gain dc–dc stage is coupled with a doubly grounded dynamic dc-link inverter to implement the microinverter topology. The front-end boost stage steps up the single-module voltage to a higher dc voltage, typically to 200 or 400 V as required for the following inverter stage. It is a hybrid of an interleaved boost and switched capacitor concept capable of achieving high gain while simultaneously maintaining reduced voltage and current stress, and thus lowering switching and conduction loss for most of the switches. By directly connecting the grid neutral to the photovoltaic (PV) negative, the doubly grounded voltage swing inverter has the advantage of zero capacitive-coupled common-mode ground currents, critical for transformerless PV inverters. The two dc links of the inverter stage share the double-line frequency power decoupling with a combination of higher value of mean voltage and relatively large 120-Hz ripple component–the dynamic dc-link approach. Through an optimization algorithm, the decoupling capacitance is minimized enabling an all-film capacitor implementation while satisfying the converter's operating constraints over a wide range of power factors. The simulation as well as experimental results from a GaN-based hardware prototype validate the converter's performance. [ABSTRACT FROM AUTHOR]

The development of a photovoltaic ac module composed of a high static gain nonisolated dc–dc converter with current source output characteristic followed by an unfolding low-frequency inverter is presented in this paper. The operation of the dc–dc converter with high static gain and with reduced switch voltage is obtained using the Cuk converter integrated with the switched-inductor technique. The nonisolated structure allows the elimination of the volume and losses of the power transformer and leakage inductance, and an output filter configuration is proposed to reduce the high-frequency ground leakage current. The grid-tied inverter operating in a discontinuous conduction mode (DCM) allows a sinusoidal output current with low harmonic distortion (THD = 3.72%) to be obtained without current control loop and without the use of a current sensor at the output. The maximum power point tracking operation is obtained without the use of the current sensor. The DCM operation increases the current stress, but the proposed converter presents two switches and two input inductors sharing the input current in these components. The theoretical analysis, design procedure, and experimental results are presented for a prototype with a dc input voltage Vi = 30 V, an ac output voltage Vo = 127 V, and output power Po = 180 W. [ABSTRACT FROM AUTHOR]

To reduce the common-mode voltage (CMV) and eliminate the CMV spikes for two-level voltage source inverters (2L-VSIs), an improved model predictive control (MPC) based CMV reduction method is proposed in this paper considering dead-time effects. First, an improved voltage vector (VV) preselection strategy is proposed to reduce the CMV spikes caused by the dead time. Second, a new hybrid VV preselection strategy based on a delay compensation strategy and a modified current sector division strategy is proposed to completely eliminate the CMV spikes. As the proposed hybrid VV preselection based MPC strategy makes full use of the six nonzero VVs of the 2L-VSI, the current total harmonic distortions and ripples are reduced. The simulation and experiments are carried out to verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

In this paper, a fixed switching frequency model predictive current controller is designed and implemented on a sensorless five-level packed U-cell (PUC5) inverter interfacing the utility. The predictive control methodology is based on a voltage vector generation technique for the cost function optimization by nullifying its derivative. The aim of the controller is to allow a fixed-frequency operation with no iterations while operating as a utility line current regulator. A pulsewidth modulator based on employing PUC5 redundant switching states fixes the PUC5 auxiliary dc bus capacitor voltage to its desired level with no necessity of a regulator; the overall technique reduces system complexity with less sensors and no loops in the predictive algorithm making it suitable for industrial applications. System discrete model is developed and experimental results verify the performance of the designed controller in making a fast response in regulating the grid current and balancing the capacitor voltage. [ABSTRACT FROM AUTHOR]

To solve the problem of poor robustness due to the high dependence of model predictive control (MPC) on the three-phase inverter model, the influence mechanism of the mismatch of circuit parameters R and L, the model discretization error, and sampling errors on MPC prediction error are analyzed in this paper. A feedback self-correction is proposed, which the next current errors are predicted and used to modify the model, based on the previous prediction errors. This proposed method involves simple structure and a small amount of calculation. Steady-state effects of the proposed method are quantized to prove a good inhibitory ability on multifactorial prediction errors. Finally, experimental results in a three-phase inverter are presented to support the theoretical analysis and demonstrate the feasibility of the proposed method. [ABSTRACT FROM AUTHOR]

Multilevel inverters are now-a-days being applied in electric vehicles (EV). Considering the dynamic operating conditions of an EV propelled by an induction motor, this paper proposes a flexible discontinuous modulation strategy for three-level neutral-point-clamped (NPC) inverter that can shift modulation pattern seamlessly from sinusoidal pulsewidth modulation (SPWM) to discontinuous PWM (DPWM). The modulation scheme is generalized at each degree of discontinuity to ensure minimum switching losses for variable load power factors. Additionally, a hybrid voltage balancing strategy, which comprises two sets of compensating offset signals with complementary features, has been introduced to mitigate voltage deviation problem at neutral point of the inverter. The unique feature of the proposed hybrid balancing approach is that it generates uniform compensating neutral current regardless of the level of discontinuity. This results in identical and predictable voltage balancing dynamics for the entire modulation transition covering SPWM and DPWM. It has been shown that the proposed hybrid balancing strategy does not lose its unbalance compensation strength even during transition from one modulation pattern to another. The effectiveness of the proposed scheme for wide variations in operating conditions is studied through extensive simulation, and validated in experimentation using a prototype NPC inverter with induction motor loads. [ABSTRACT FROM AUTHOR]

Wireless power transfer with a self-tuning LCC inverter using pulsewidth modulation (PWM) controlled switched capacitor is proposed in this paper in order to compensate for the variations of Tx inductance. Usually, receivers contain magnetic and conductive materials for shielding and mechanical support. The inductance of the Tx coil is sensitive to the variation of Tx–Rx alignment because the interaction between the Tx coil and the Rx magnetic–conductive materials is also varied. It is shown that the detuning of the Tx inductance value exacerbates the losses in the LCC inverter. In the proposed method, the PWM duty ratio of a single capacitor adjusts the effective output impedance of the LCC inverter. The PWM feedback loop is designed such that the power factor and the real-part impedance of the LCC inverter are maximized. The PWM switch is turned on at zero voltage and turned off with low dv/dt, minimizing switching losses. Such a soft-switching tunable capacitor can handle higher power compared to the traditional hard-switching capacitor, p-n junction capacitor, or an analog IC capacitor. Another advantage of the proposed technique is the continuity in achievable capacitance value using only one capacitor. The feedback can be fully implemented by analog components, obviating the necessity of digital samplings, ADC/DACs, and microcontrollers. The power of 54 W is transferred at 76.6% and 60.7% with and without the proposed method, respectively. [ABSTRACT FROM AUTHOR]

Due to the lack of electrical isolation, the leakage current is one of the most important issues for transformerless photovoltaic (PV) systems. In this paper, a new modulation strategy is proposed to reduce the leakage current for a Z-source four-leg transformerless PV inverter. First, the common-mode loop model is presented. And then the common mode voltage behavior and the effect of factors on the leakage current are discussed. A new modulation strategy is proposed to achieve the step-up function and constant common mode voltage. Therefore, the leakage current can be suppressed effectively. Finally, the proposed strategy is digitally implemented and tested on the TMS320F28335 DSP and XC3S400 FPGA controlled hardware platform. The experimental results verify the effectiveness of the proposed solution. [ABSTRACT FROM AUTHOR]

This paper presents a new dc/ac inverter for low-power applications (i.e., high-voltage, low-current applications), which offers soft switching of the power semiconductors and low output current ripple. In the proposed power circuitry, a novel ripple steering approach is used that can provide soft switching for the power semiconductors and significantly attenuate the high-frequency current ripple of the inverter. The proposed ripple steering technique utilizes the switching frequency and the duty cycle in order to perform the aforementioned tasks. Basically, the ripple steering technique steers the energy of the ripple to the output capacitances of the power semiconductors in order to provide the soft-switching condition. Theoretical analysis, simulation results, and experimental results verify the feasibility of the proposed technique and demonstrate the superior performance of the proposed inverter. [ABSTRACT FROM AUTHOR]

This paper proposes a family of multiport switched-capacitor multilevel inverter (SCMLI) topologies for high-frequency ac power distribution. It employs asymmetric dc voltage sources with a common ground that makes it ideal to be employed in renewable energy farms and modern electric vehicles. The proposed family of step-up SCMLI attains higher number of output voltage steps with optimum component count in comparison to several existing topologies. The problem of capacitor voltage balancing is solved as the capacitors are inherently charged to a finite voltage every half cycle. In-depth study on two staircase modulation strategies, namely, selective harmonic elimination and minimum total harmonic distortion (THD) scheme is presented with study on the variation of switching angles and THD with modulation indices under both schemes. Working principle and analysis are presented for the proposed family of topologies. Simulation outcomes are validated with experimental results under both the aforementioned modulation schemes with equal and unequal output voltage waveform steps. [ABSTRACT FROM AUTHOR]

This paper presents new space vector pulsewidth modulation (PWM) strategies for a single-phase three-level buck-boost neutral point clamped inverter coupled with impedance-source (IS) network. These strategies can be implemented for systems with any IS network with neutral point. The case study system is based on the quasi-Z-source inverter with continuous input current. To demonstrate an improved performance, the strategies are compared with a traditional PWM strategy. The advantages lie in reduced switching number, without output voltage quality distortion. The simulation and experimental results confirm the theoretical predictions. [ABSTRACT FROM AUTHOR]

Electromagnetic emissions (EMEs) of electric and electronic units should comply with national and international standards. Software approaches to reduce the conducted EME are preferable, since they do not require additional on-board hardware. Many techniques have been developed with different levels of efficiency. This paper aims to analyze a new software approach to mitigate the conducted emissions of three-phase power inverters, focusing on those used to drive brushless DC motors. This has been done reducing the conducted electromagnetic interferences common mode (CM) component through software compensation of parasitic delays. The technique is verified both analytically and experimentally, and its performances have been compared to the spread spectrum modulation (SSM) ones. The proposed approach shows better performances with respect to SSM below 24 MHz. The results confirm the effectiveness of the delay compensation technique in terms of CM conducted emissions reduction. Moreover, the proposed approach has no drawbacks on safety and it does not present reductions in the inverter efficiency. [ABSTRACT FROM AUTHOR]

Cascaded H-bridge (CHB) inverter is the most widely used topology for a medium-voltage drive system due to the high degree of modularity, easier implementation of medium output voltage, and the ability to continuous operation under the cell fault condition. Because each power cell of CHB should have isolated dc source, multiwinding input transformer and three-phase active front end (AFE) are generally used for regenerative applications. The whole system can be simplified by replacing the three-phase AFE with single-phase AFE. However, if the control strategy of normal operation is adopted under the cell fault condition, input power imbalance among three phases inevitably occurs. In that situation, not only faulty cells, but also some unscathed cells should be excluded with giving up the maximum capability of the system, not to deteriorate grid current. This paper proposes a control scheme against the cell fault condition of the single-phase AFE CHB. By applying the proposed control scheme to the system, dc-link voltage of each cell and grid current are well regulated without imbalance even under the cell fault conditions. Finally, it can minimize the number of undamaged cells which should be turned off and maximize the capability of the system under the cell fault condition. Simulation and experimental results are provided to verify the effectiveness of the proposed scheme. [ABSTRACT FROM AUTHOR]

Soft-switching inverters can achieve high efficiencies and low switchdv/dtanddi/dt, but often impose additional stress on the switches due to their resonant behavior. Multicell converters, on the other hand, can process high voltages by arranging the switches to share the stress. This paper proposes a buck–boost multicell soft-switching inverter with inherent cell voltage balancing. Both the current and voltage stresses are shared by the cells. Soft-switching conditions are achieved for all switching transitions without any need for auxiliary circuitry or clamps. A multiple-winding transformer transfers energy between the terminals and provides galvanic isolation. An analytical study and experimental results on a 1200-W prototype verify the operation of the inverter. [ABSTRACT FROM AUTHOR]

In this paper, a fast and practical method is proposed for open-circuit (OC) fault diagnosis (FD) in a three-phase quasi-Z-source inverter (q-ZSI). Compared with the existing fast OC FD techniques in three-phase voltage source inverters, this method is more cost-effective since no ultrafast processor or high-speed measurement is required. Additionally, the method is independent of the load condition. The proposed method is only applicable to Z-source family inverters and is based on observing the effect of shoot-through intervals on the system variables during switching periods. The proposed algorithm includes two consecutive stages: OC detection and fault location identification. When both stages of the OC FD algorithm are done, a redundant leg is activated and utilized instead of the failed leg. The accuracy of the proposed method is confirmed by the experimental results from a low-voltage q-ZSI prototype. [ABSTRACT FROM AUTHOR]

Recently, a few fault-tolerant control strategies have been proposed for T-type three-level inverters to improve the reliability of the inverter system. However, the neutral-point (NP) voltage oscillations suppression is never considered in the previous fault-tolerant control strategies. In order to suppress the NP voltage oscillations when open-circuit fault occurs to NP switches, this paper proposes two novel fault-tolerant control strategies named as improved two-level switching tolerant control and hybrid switching tolerant control (HS-TC). Both methods are implemented by adding an optimal time-offset to the three-phase turn-ontimes. The corresponding time-offset value of each method is simply calculated considering the phase current and dwell time of [O] state. Moreover, an NP voltage balancing algorithm to eliminate the dc deviation and a dc bias to further reduce the NP voltage oscillations are used in the HS-TC. The performance and comparison of the tolerant controls with respect to the NP voltage oscillations, current total harmonic distortion, and dynamic response are illustrated and analyzed through the simulation and experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a novel critical-conduction-mode-based modulation is proposed for three-phase bidirectional ac–dc converters. With this modulation, the switching frequency variation range shrinks, zero-voltage-switch soft switching is achieved, and the switching-related loss is reduced, which is especially beneficial for systems operating above hundreds of kHz high switching frequency with wide-band-gap power semiconductor devices to achieve both high power density and high efficiency. A 25 kW silicon carbide based high-frequency three-phase bidirectional ac–dc converter prototype is designed to achieve a power density of 127  ${\text{W/in}}^{3}$ , which is at least five times higher than commercial products. All the control functions are digitally implemented with one low-cost microcontroller, and the aforementioned benefits are experimentally verified on this prototype under both inverter mode and rectifier mode operations. With the proposed soft-switching modulation, the tested peak efficiency is close to 99.0% for this prototype even at above 300 kHz high switching frequency operation. [ABSTRACT FROM AUTHOR]

In this paper, a practical online open-switch fault detection method is presented. The proposed open-switch fault detection method is used to detect the open-circuited fault switch in the parallel inverters system. This method can relieve the severe effects of the over-current stress, to avoid the secondary fault to the electrical components in the parallel inverters system. This method is based on the detection of the resulting zero-sequence current, under the fault conditions. The proposed algorithm is activated by detecting the zero-sequence current between the parallel units, under the open-switch fault conditions. The sign of the resulting zero-sequence current is related to the upper or the lower open-switch fault case. The faulty phase identification relies on the analysis and the investigation of only the current measurements information of the faulty inverter. This method can get rid of the effects of the load, to obtain a reliable identification. The effectiveness of the proposed open-switch fault detection algorithm is theoretically analyzed and validated by the simulations and the experiments. [ABSTRACT FROM AUTHOR]

This paper presents a torque ripple minimization method for a permanent magnet synchronous motor (PMSM) drive system that utilizes a modified quasi-Z-source (qZS) inverter. The proposed modified qZS network is designed by adding an extra switching device to the conventional qZS topology and provides a wider range of capabilities for inverter input voltage control, e.g., both step-up and step-down operations. It also allows for modification of the traditional switching sequence selection scheme when using the space vector modulation (SVM) for switching. The provided flexibilities are leveraged to develop a control system that minimizes the torque ripples during PMSM operation while satisfying conventional control objectives such as shaft speed control. The control system is comprised of an input voltage optimization subsystem with the goal of torque ripple minimization, which provides the reference for a cascaded modulated model predictive control subsystem for the modified qZS network control, and a motor side predictive control subsystem. The control system employs a new switching sequence selection scheme for SVM modulation to further reduce PMSM torque ripples. Experimental results are provided to validate the theoretical outcomes. [ABSTRACT FROM AUTHOR]

LEDs have finally emerged as the dominant lighting technology. As such, the lighting industry values power converters that have high efficiency, unity power factor, minimal flicker, dimming, low cost, and a small form factor. This paper presents an integrated circuit (IC) LED driver that is designed to achieve these goals. It introduces multilevel converters with sigma–delta modulation to the power IC space. The driver features a pair of sigma–delta-controlled multilevel converters. The first is a multilevel rectifier responsible for power factor correction and dimming. The second is a bidirectional multilevel inverter used to cancel ac power ripple from the dc bus. The system also contains an output stage that powers the LEDs with dc and provides for galvanic isolation. The IC LED driver has been simulated and prototyped on a silicon fabrication process. Its functional performance indicates that integrated multilevel converters are a viable topology for lighting or other similar applications. [ABSTRACT FROM AUTHOR]

This paper proposes a high-frequency dc–dc converter with a synchronous rectifier (SR), which is suitable for the low-voltage output application. The proposed topology consisting of a Class Φ2 inverter and a synchronous Class E current-driven rectifier features low switch voltage stress, fast transient response, and high efficiency. First, the analysis and design method of the converter are presented. Concerning the coupling of amplitude and phase of the fundamental voltage and current in the rectifier stage, the duty cycle of the switch is considered in the proposed design method. For the design of the inverter stage, the impedance of the resonant tank across the main mosfet is utilized in the design process. Second, a self-oscillating resonant driver with dc bias voltage is proposed for the SR switch and features low component count and low driving power loss. A prototype with 12 V input and 5 V/10 W output was built to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, an IGBT half-bridge with a parallel presspack diode for increased efficiency is investigated. The switching performance and its losses are discussed with respect to its operation in a modular multilevel converter. [ABSTRACT FROM AUTHOR]

This paper presents a novel step-up dc to ac converter with only one power supply. These types of converters are suitable for renewable and sustainable energy applications with low input dc sources. The proposed topology has the ability of self-voltage balancing and does not apply end side H-bridge to produce a bipolar staircase waveform. Consequently, switching losses and voltage stress of semiconductor components are reduced to a great extent. A small dc voltage source can be used to achieve a high voltage high quality ac waveform through switching the precharged capacitors in series and in parallel. Circuit configuration and its operation principle, capacitors’ charging process, thermal model, capacitances, and losses calculations are discussed in details. Moreover, the comparison of the proposed circuit with the other single source multilevel converters shows that the proposed topology reduces the number of circuit elements. Finally, a laboratory nine-level prototype is built to verify the theoretical analyses and feasibility of the proposed topology. The experimental results show that the converter efficiency at 1 KW output power is 92.75%. [ABSTRACT FROM AUTHOR]

An enhanced DC–DC converter is proposed in this paper, based on the combination of the Cuk and SEPIC converters, which is well-suited for solar photovoltaic (PV) applications. The converter uses only one switch (which is ground-referenced, so simple gate drive circuitry may be used), yet provides dual outputs in the form of a bipolar DC bus. The bipolar output from the DC–DC converter is able to send power to the grid via any inverter with a unipolar or bipolar DC input, and leakage currents can be eliminated if the latter type is used without using lossy DC capacitors in the load current loop. The proposed converter uses integrated magnetics cores to couple the input and output inductors, which significantly reduces the input current ripple and hence greatly improves the power extracted from the solar PV system. The design methodology along with simulation, experimental waveforms, and efficiency measurements of a 4-kW DC–DC converter are presented to prove the concept of the proposed converter. Furthermore, a 1-kW inverter is also developed to demonstrate the converter's grid-connection potential. [ABSTRACT FROM AUTHOR]

There is increasing interest in the use of transformer-less systems for grid-connected photovoltaic applications. Compared to transformer-coupled solutions, transformer-less systems offer a typical efficiency increase of 1–2%, reduced system size and weight, and a reduction in cost. However, the removal of the transformer has technical implications. In addition to the loss of galvanic isolation, dc current injection into the grid is a potential risk. While desirable, complete mitigation of dc current injection via convention current control methods is known to be particularly challenging. For this reason, this paper proposes an active dc suppression method, in which the dc current injection is accurately determined by extracting the line-frequency component from inverter dc-link current measurements, and then, mitigated with an active closed-loop controller. Experimental results from a laboratory grid-connected inverter system are presented to demonstrate the high performance of the proposed technique. [ABSTRACT FROM AUTHOR]

An isolated single sourced multi-output dc/dc converter with a high-frequency link was proposed before to feed different cells of the Asymmetrical Cascaded H-bridge (ACHB) inverter. One of the fundamental advantages of the ACHB is that the main H-bridge is commutated with fundamental frequency, passing the majority of the inverter power. However, the isolated dc/dc converter needs to be connected to the main voltage source with high-voltage/high-frequency switches, which limits the power capability and the efficiency of the converter. In this paper, a switching pattern based on nearest level modulation method is proposed to command all the power to be transferred through the main H-bridge. Therefore, the power circulates between the auxiliary H-bridges with no need for high-voltage switches. As a result, a single-input single-output auxiliary converter is needed with only 5% of the power rating. This solution reduces cost and size while it improves the efficiency of the converter. Furthermore, the architecture makes the inverter more suitable for high power and high-voltage applications. The inverter switching strategy is based on programmable firing angles. The main dc-link of the grid connected inverter is controlled to achieve maximum power point tracking, while the dc/dc isolated converter is controlled to regulate the auxiliary dc-links. The proposed topology is verified by simulation and experimental results using a 1.5 kW hardware prototype. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

In this paper, capacitor current sensorless control by using an observer is applied in a seamless transfer single-phase inverter. The proposed control system is a multiloop control system. The control loop is composed of a capacitor voltage outer control loop and capacitor current inner control loop for stand-alone mode. For on-grid mode, the grid current outer loop controller is combined with the stand-alone control structure to form a simple controller structure for mode switching. The capacitor current feedback signal is calculated using the observer in the discrete-time domain and thus sensors are not required. Use of the proposed observer for the inverter with capacitor current control has many advantages, such as sensorless capacitor current calculation, one-sample-ahead data prediction for sampling delay compensation, and an average capacitor current without ripple components. Verification of the theoretical analysis is presented through simulation and experiment. A 5-kW single-phase inverter prototype combined with a Li-ion battery is set up with a digital controller using a TI TMS320F28377D microcontroller unit to confirm the feasibility of the system. [ABSTRACT FROM AUTHOR]

This paper presents a novel single-stage, isolated, and single-phase dc–ac converter topology, suitable for low-medium power-scale solar photovoltaic and fuel-cell applications. The circuit employs two full-bridge cells with floating dc bus capacitors placed on either side of a high-frequency transformer and works on the dual-active-bridge principle. It has advantages of a single-stage power processing structure, low device count (uses eight switches), and the possibility of achieving zero-voltage-switching operation over the full ac line cycle. Moreover, by dynamic variation of phase-shift between the high-frequency primary and secondary voltages, twice-line-frequency energy buffering can be affected via the high-voltage side dc bus capacitor, which reduces decoupling capacitance requirement, enabling a film capacitor-based implementation. Basic operating principle, control strategy, and detailed design optimization guidelines of the circuit are described followed by simulation results to validate the approach. Practical evaluation of converter performance is done on a 250 W, 20–35 V input, and 110 V rms output prototype. [ABSTRACT FROM AUTHOR]

Conventional two-level as well as multilevel voltage-source-inverter topologies with a hexagonal voltage-space vector structure generate low-order harmonics in the machine terminal voltages when operated beyond the linear modulation range in variable speed drive application. Progressing from hexagonal to a higher sided polygonal voltage-space-vector structure (VSVS) suppresses significant low-order harmonics throughout the modulation range. In addition, the linear modulation range will also be enhanced very near to the base speed. In this paper, for the first time, the generation of a multilevel 24-sided VSVS using a single dc source for induction-motor drives is proposed. A cascaded topology with a dc-source-fed flying-capacitor inverter and two low-voltage capacitor-fed H-bridge cells forms the power circuit. The features and advantages of the proposed scheme are validated through experimental results and discussions. [ABSTRACT FROM AUTHOR]

In this paper, a hybrid space vector pulsewidth modulation synthesis is proposed to lower the frequency and amplitude of the common-mode voltage (CMV). The conventional space vector pulsewidth modulation (SVPWM) techniques for inverters generate a high-frequency CMV. The CMV causes significant bearing current flowing through the path to the ground and leads to premature bearing failure, especially in high switching frequency drive systems. Furthermore, previously proposed CMV reduction studies focus on the reduction of CMV amplitude, leaving a high-frequency CMV. The proposed control algorithm divides each sector in the space vector hexagon into three segments based on the modulation index and the angle of the reference voltage vector. In each segment, the space vectors that produce minimal CMV are selected to synthesize the reference voltage vector. A fair comparison with the conventional CMV reduction methods is made by comparing the CMV characteristics, harmonic distortion factor, dc current ripple, and the switching losses for each method. Both simulation and experimental results have validated the effectiveness of the proposed approach. [ABSTRACT FROM AUTHOR]

This paper proposed a novel family of pulsewidth modulation (PWM) strategies for single-phase quasi-switched boost inverter (qSBI). By combining shoot-through (ST) mode in the inverter's switches and the turning-on state of an additional switch, the qSBI produced a high voltage gain without adding any passive components. Compared to the conventional PWM strategy for the same input and output voltage gain, the introduced PWM strategies for qSBI could reduce voltage stress across semiconductors and capacitor with the following additional merits: having smaller high-frequency inductor current and capacitor voltage ripples, using high modulation index with low ST duty cycle, and having higher efficiency. Circuit analysis, operating theories, and simulation results of the single-phase qSBI with the introduced PWM5 strategy are shown. A 500-W laboratory prototype was constructed and the effectiveness of the introduced PWM strategy was validated. The qSBI with the proposed PWM strategies is suitable for applications where the required voltage gain lies between 2 and 3. [ABSTRACT FROM AUTHOR]

This paper presents a comprehensive review of multiport converters for integrating solar energy with energy storage systems. With recent development of a battery as a viable energy storage device, the solar energy is transforming into a more reliable and steady source of power. Research and development of multiport converters is instrumental in enabling this transformation in an efficient manner. The high efficiency of conversion in comparatively smaller footprint makes a multiport converter very attractive in this application. Most of the recently reported multiport converter topologies are discussed here. A breakdown of isolated and nonisolated topologies is presented along with the comparison of converter architectures and features such as operating conditions, device count, efficiency, etc. Each group of multiport converters is subdivided into different smaller groups based on their architecture. Detailed specifications are presented for important topologies. Finally, a performance comparison is carried out featuring the advantages and disadvantages of the various topologies leading to suggestions for the direction of future research. [ABSTRACT FROM AUTHOR]

Cascaded multilevel inverter (CMI) is one of the most popular multilevel inverter topologies. This topology is synthesized with some series-connected identical H-bridge cells. CMI requires several isolated dc sources which brings about some difficulties when dealing with this type of inverter. This paper addresses the problem by proposing a switched-capacitor (SC)-based CMI. The proposed topology, which is referred to as switched-capacitor single-source CMI (SCSS-CMI), makes use of some capacitors instead of the dc sources. Hence, it requires only one dc source to charge the employed capacitors. Usually, the capacitor charging process in a SC cell is companied by some current spikes which extremely harm the charging switch and the capacitor. The capacitors in SCSS-CMI are charged through a simple auxiliary circuit which eradicates the mentioned current spikes and provides zero-current switching condition for the charging switch. A computer-aid simulated model along with a laboratory-built prototype is adopted to assess the performances of SCSS-CMI, under different conditions. [ABSTRACT FROM AUTHOR]

Common-mode voltage (CMV) problem brings severe negative effects in three-phase voltage source inverters (VSIs), particularly for high-frequency silicon (Si) carbide (SiC) VSIs. However, most traditional CMV reduction strategies, which are studied based on Si VSIs, are hard to be implemented and sacrifice the other performance of the VSIs. To overcome such drawbacks, this paper proposes a novel generalized tri-state pulsewidth modulation (GTSPWM) for high-frequency SiC VSIs over power factor of 0–1 and whole linear modulation index range. The working principle of conventional space vector based reduced CMV PWM (RCMV-PWM) methods are reviewed, and their switching signals and CMV patterns are illustrated. The proposed GTSPWM method is described in a generalized scalar PWM approach for simple application and compared with other RCMV-PWM methods. Mathematical analysis, simulations, and experimental results have been used to verify that GTSPWM based high-frequency SiC VSIs can achieve minimum switching losses, improved output waveform quality, smaller dc-link current ripples, and RCMV characteristics. Moreover, with the usage of GTSPWM method, the switching frequency of SiC VSIs can be further increased, and the performance of high-frequency SiC VSIs could be improved appreciably. [ABSTRACT FROM AUTHOR]

Charging electric vehicles (EVs) from photovoltaic panels (PV) provides a sustainable future for transportation. This paper presents the development of a 10 kW EV charger that can be powered from both a PV array and the three-phase ac grid. The goal is to realize a high power density and high-efficiency three-port power converter that integrates the EV, PV, and grid and meets the Chademo and combined charging standard/Combo EV charging standards. The EV port is designed to be isolated and bidirectional, so that both charging and vehicle-to-grid can be implemented. As PV and EV are both dc by nature, the converter uses a central dc link to exchange power between the EV and PV, thereby increasing efficiency. The use of silicon carbide devices and powdered alloy core inductors enables high switching frequency and power density. The closed-loop control allows four different power flows: ${\text{PV}\rightarrow \text{EV}, \text{EV}\rightarrow }$ grid, grid ${\rightarrow \text{EV}}$ , and ${\text{PV}\rightarrow }$ grid. Hence, the converter operates as a PV inverter, a bidirectional EV charger, and a combination of both. A 10 kW prototype has been successfully tested, and its experimental waveforms and measured efficiency are presented. It has three times the power density and higher partial and peak load efficiency when compared to existing solutions. [ABSTRACT FROM AUTHOR]

Most photovoltaic (PV) systems are composed of series and parallel inverters. The electromagnetic interference (EMI) mainly comes from the off–on of inverter switches with pulsewidth modulation (PWM). The output EMI peaks of PV systems would increase markedly due to the interference superposition effect caused by parallel inverters, whose carrier initial phases are in phase or close to each other. In this paper, an auto-screening carrier phase-shift scheme is proposed to weaken the superposition effect of EMI peaks and to get the result of reverse offset at its best. In a PV system, through voltage detections and spectrum estimations of each inverter with a series of phase-shift carriers, a best carrier phase of each inverter is obtained automatically to minimize EMI peaks of the PV system. In order to avoid the conflict that the screening processes of two or more inverters are underway at the same time, a specific frequency signal is output temporarily as an occupancy mark in one of the inverters. The feasibility and effectiveness of the proposed scheme are verified by experimental results in a PV system composed of four parallel single-phase inverters. [ABSTRACT FROM AUTHOR]

Smart inverters provide additional control capability to help optimize the operation of distribution systems. This paper proposes a framework for exact optimal active and reactive power dispatch of distributed photovoltaic (PV) generation, switched capacitors, and voltage regulators in large multi-phase unbalanced distribution systems. The objectives of the optimal dispatch are minimization of the energy loss, PV active power curtailment, and operations of capacitors and voltage regulators, in addition to elimination of voltage violations and reverse power flow. The optimization problem is formulated in rectangular coordinates as a nonlinear, nonconvex problem. Effective computational strategies are proposed to allow the application of predictor-corrector primal-dual interior point method to solve optimization problems in real-time with a large number of constraints and variables, including discrete variables corresponding to switched capacitors and voltage regulators. The accuracy of the numerical solution and the ability to implement the proposed framework are validated using the unbalanced multi-phase IEEE 34-bus and EPRI 2,998-bus distribution systems with 15-minute load and PV data. The results show a significant loss reduction and elimination of both voltage violations and reverse power flow. [ABSTRACT FROM AUTHOR]

A discontinuous pulsewidth modulation (DPWM) strategy for three-level neutral-point-clamped (NPC) traction inverter drive for electric vehicles (EVs) with minimum switching loss for the full power factor (PF) range is developed and presented in this paper. Considering the dynamic loading conditions in an EV propelled by an induction motor (IM), the discontinuous modulation strategy is generalized to obtain minimum switching loss for a wide variations in load PF and modulation depth. The dynamic operating conditions in EV may render frequent unbalances in dc-link capacitor voltages in NPC inverter. It is demonstrated that the addition of an appropriate offset signal with the reference discontinuous signals generates compensating neutral current in the right direction, which can be used to mitigate existing unbalance in two dc-link capacitor voltages. Minimum switching loss at variable PF is attained by positioning the nonswitching clamped regions of the reference auxiliary signals according to the load PF. The effectiveness of the proposed scheme for a wide range of torque/speed variations is studied through simulation by developing a MATLAB/SIMULINK model of an IM traction inverter drive with field-oriented control strategy for closed loop control. Finally, the modulation scheme is validated through experimentation in a small-scale prototype NPC inverter with motor loads. [ABSTRACT FROM AUTHOR]

In this paper, a multipulse ac–dc converter fed multilevel inverter (MLI)-based indirect vector controlled induction motor drive (IVCIMD) is proposed for medium-power application. A 54-pulse ac–dc converter is utilized at the supply side to suppress the input current total harmonic distortion, as per the IEEE-519 standard. Mainly three separate isolated transformers are utilized and each transformer is configured as an 18-pulse ac–dc converter. Due to the phase shift in primary windings, these three transformers are reconfigured as a 54-pulse ac–dc converter. A 15-level binary-based cascaded MLI is utilized at the motor side to enhance the required performance of IVCIMD. A 15-level inverter is switched at fundamental frequency, which ensures the very low switching losses in the proposed IVCIMD. A modified nearest level modulation strategy is proposed to achieve fundamental switching frequency. The performance of the proposed IVCIMD is simulated at various operating conditions by utilizing Simulink/MATLAB platform. Simulated results are validated with experimental results on a developed prototype in the laboratory to show its usefulness for medium-power applications. [ABSTRACT FROM AUTHOR]

This paper proposes advanced speed control for a five-leg voltage source inverter (FLVSI) that drives the dual three-phase induction motor system used in industrial manufacturing processes. The advanced speed control method consists of two controllers: 1) The first is a slip controller that satisfies the application requirement, i.e., to control the mechanical speed of two motors equally regardless of the load condition. 2) The second is an angle controller that satisfies the FLVSI requirement, i.e., to control the phase angle difference between the two motors for minimizing the common leg current because the common leg current can be twice higher than other leg's current depending on the operation condition of the dual motor. Stability analysis of the two controllers under advanced speed control is implemented, and the whole performance of the advanced speed control for the FLVSI-fed dual-motor drive system is shown to identify its feasibility through the experimental results. [ABSTRACT FROM AUTHOR]

Usually, the parallel-compensated inductive power transfer (IPT) topology fed by a current-source inverter is controlled through variable switching frequency and fixed 50% duty cycle method. This enables the system to operate at resonance frequency, which drifts due to load and other parameter variations. Owing to this control constraint, the load requirements are fulfilled by adding extra dc–dc chopper at the output. This paper presents a new control technique for a parallel–series/series IPT network, fed from a full-bridge current-source inverter to meet the load demand directly by an inverter. Therefore, the extra chopper stage at the output side of the converter is eliminated. The control goals are achieved through a two-loop control method, where the inner input current loop controls the source current and the outer output current loop meets the load requirements. The detailed steady-state operation, converter design, small-signal modeling, and control are reported, and experimental results obtained from a 1.6-kW lab prototype are included to verify the mathematical analysis. [ABSTRACT FROM AUTHOR]