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Direct-drive wave energy converter (WEC) and buoy control algorithms have shown great potential for renewable wave energy extraction in ideal conditions. However the actual power take-off (PTO) impacts are barely considered in the WEC design. This paper highlights the demands of designing the WEC wave-to-wire control from a global point of view by studying the actual PTO impacts. A permanent magnet linear electrical machine (LEM) PTO unit is simulated and controlled to fulfill the WEC buoy control requirements. Several state of the art control algorithms, which include singular-arc (SA) control, shape-based (SB) control, model predictive control (MPC), and proportional-derivative (PD) control, are applied to maximize the wave energy production (mechanical energy). Multiple types of electrical PTOs, including ideal PTO, unlimited PTO and limited PTO, are all implemented to evaluate WEC wave-to-wire performances. Further, the PTO copper loss model and the PTO actual efficiency maps are introduced and studied to improve the electrical PTO operation efficiency. To further assess the control schemes in various wave conditions, one-year PacWave ground-truth data is applied as well. Numerical simulations are conducted using MATLAB/Simulink and the Simscape toolbox. The electrical PTO unit is composed of a LEM, an ideal inverter, and an ideal energy storage system. The results show that the actual PTO will impact the constrained controls (MPC and SB) less comapring to unconstrained controls (SA and PD). Although SB can produce the maximum energy with the limited PTOs, it is not robust for all wave conditions. At the end of the paper, the possible solutions for improving the WEC wave-to-wire performances are also provided. [ABSTRACT FROM AUTHOR]

Cycle time, which is of order of ten weeks for most products in semiconductor wafer fabrication facilities (wafer fabs), must be explicitly considered in production planning models. Cycle times depend nonlinearly on the resource workload in a wafer fab. Different data-driven (DD) production planning formulations are studied in this paper. Such formulations are based on a set of system states representing the congestion behavior of a wafer fab with work in process (WIP) and resulting output levels. Different WIP-output relations in the DD formulations are investigated. In addition, different methods are proposed to gather representative sets of system states. The DD formulations are compared with the Allocated Clearing Function (ACF) formulation with respect to profit and cost values using simulation models of a scaled-down and a large-sized multi-product wafer fab, respectively. The simulation results show that some DD variants are able to outperform the ACF formulation under several experimental conditions. [ABSTRACT FROM AUTHOR]

A logic diagnosis procedure provides information about the defects that are present in a faulty unit as a set of candidate faults. To obtain smaller, and more accurate, sets of candidate faults, a diagnostic test generation procedure produces a test set that distinguishes fault pairs. This paper observes that large sets of candidate faults are obtained when multiple defects are present in a faulty unit, even if a diagnostic test set is used for logic diagnosis. This points to the possibility that fault pairs do not provide a complete set of targets for diagnostic test generation. This paper analyzes the conditions that cause a large set of candidate faults to be formed under a particular logic diagnosis procedure and suggests new targets for diagnostic test generation. The experimental results for benchmark circuits demonstrate that a diagnostic test set can be improved by adding diagnostic tests for the new targets. [ABSTRACT FROM AUTHOR]

This paper deals with stabilization of an ideal transformer model (ITM) circuit, used as an interfacing algorithm for hardware-in-the-loop simulations. The ITM allows for the distribution of simulation model computations over multiple processors or can be used in power hardware-in-the-loop simulations. When specific impedance conditions of the partitioned circuit are not met, this interfacing algorithm becomes unstable. This paper first presents a new theoretical approach for representing the ITM interfacing algorithm that is based on delay differential equations. With a stability analysis of the obtained time-delay system, a stabilization method is proposed, which increases the stability boundaries of the ITM algorithm. Simulation examples, including the scenario of a two-level inverter system, are provided. [ABSTRACT FROM AUTHOR]

Test generation procedures target a variety of fault models in order to produce test sets that are effective for defect detection. This paper considers the likely scenario where two-cycle skewed-load tests are generated to detect single transition faults, and the test set is complemented with tests for single stuck-at faults that are not detected by the transition fault test set. For this scenario, this paper makes several unique observations that can be utilized to produce a single compact test set that consists only of two-cycle skewed-load tests for both fault models. The first observation is that a single-cycle test for a stuck-at fault can be transformed into a skewed-load test that is guaranteed to detect the stuck-at fault without performing logic or fault simulation. The second observation is that skewed-load tests, which are transformed from single-cycle tests for stuck-at faults, sometimes detect more transition and stuck-at faults than tests that were generated for transition faults. The third observation is that a static test compaction procedure, which is based on the modification and removal of tests, is effective in this context because it allows tests for stuck-at faults to detect more transition faults and vice versa. This paper describes a test compaction procedure based on these observations and presents experimental results for benchmark circuits to demonstrate the effectiveness of the procedure. [ABSTRACT FROM AUTHOR]

In negative capacitance field-effect transistors (NCFETs), drain current may decrease with increasing ${V}_{\mathrm {ds}}$ in the saturation region, leading to negative differential resistance (NDR). While NDR is useful for oscillator design, it is undesirable for most analog circuits. On the other hand, the tendency toward NDR may be used to reduce the normally positive output conductance ( ${g}_{ \mathrm {ds}}$ ) of a short-channel transistor to a nearly zero positive value to achieve higher voltage gain. In this paper, we analyze the NDR effect for NCFET in the static limit and demonstrate that it can be engineered to reduce ${g}_{\mathrm {ds}}$ degradation in short-channel devices. Small and positive $g_{\mathrm{ ds}}$ is achieved without compromising the subthreshold gain, which is crucial for analog applications. The 7-nm ITRS 2.0 FinFET with 0.7 V ${V}_{\mathrm {dd}}$ is used as the baseline device in this paper. [ABSTRACT FROM AUTHOR]

In this paper, surrogate modeling techniques are applied for passive component modeling. These techniques are exploited to develop and compare two alternative strategies for automated radio-frequency circuit design. The first one is a traditional approach where passive components are designed during the optimization stage. The second one, inspired on bottom-up circuit design methodologies, builds passive component Pareto-optimal fronts (POFs) prior to any circuit optimization. Afterward, these POFs are used as an optimized library from where the passive components are selected. This paper exploits the advantages of evolutionary computation algorithms in order to efficiently explore the circuit design space, and the accuracy and efficiency of surrogate models to model passive components. [ABSTRACT FROM AUTHOR]

Power distribution systems are experiencing a large-scale integration of Converter-Interfaced Distributed Energy Resources (CIDERs). This complicates the analysis and mitigation of harmonics, whose creation and propagation are facilitated by the interactions of converters and their controllers through the grid. In this paper, a method for the calculation of the so-called Harmonic Power-Flow (HPF) in three-phase grids with CIDERs is proposed. The distinguishing feature of this HPF method is the generic and modular representation of the system components. Notably, as opposed to most of the existing approaches, the coupling between harmonics is explicitly considered. The HPF problem is formulated by combining the hybrid nodal equations of the grid with the closed-loop transfer functions of the CIDERs, and solved using the Newton-Raphson method. The grid components are characterized by compound electrical parameters, which allow to represent both transposed or non-transposed lines. The CIDERs are represented by modular linear time-periodic systems, which allows to treat both grid-forming and grid-following control laws. The method’s accuracy and computational efficiency are confirmed via time-domain simulations of the CIGRÉ low-voltage benchmark microgrid. This paper is divided in two parts, which focus on the development (Part I) and the validation (Part II) of the proposed method. [ABSTRACT FROM AUTHOR]

This paper discusses the back-flashover (BFO) phenomena in a high-voltage (HV) vertical double-circuit transmission line by means of numerical simulations. The single- and multiphase BFOs are analyzed considering 24 cases of AC-voltage angles and nonlinear characteristic of flashovers, taking advantage of the circuit analysis method in time domain. The models used in circuit analysis are the TEM-delay model, which can take into account the non-TEM characteristics of tower and line, and the conventional models. Prior to the BFO analysis, the characteristics of circuit models are compared and discussed with the numerical electromagnetic analysis results. In BFO analysis, it is clarified that the occurrence probability of the multiphase BFO is heavily depending on the bias AC-voltages. The relation of measured BFO phases and AC-voltages are well explained by the TEM-delay model with the valid lightning current magnitude. The conventional circuit models could have underestimated the occurrence of BFOs in HV transmission lines. The analysis and discussions shown in this paper can be utilized for advanced evaluation of lightning performance of transmission lines that considers the seriousness of lightning accidents. [ABSTRACT FROM AUTHOR]

In this paper, the transient experimental validation of the convolution-based fast thermal model (FTM) for 3-D integrated circuits is presented. The methodology is proven to be applicable to analyze the temperature evolution of real devices. A low-power package configuration with two different power dissipation scenarios, hotspot (HS) in the corner and HS in the center of the active region, has been considered for the validation. In this way, the importance of the package thermal impact on the definition of the final temperature profiles is highlighted. The error between the measurement and the FTM results remains always below 2.3 °C/W. Moreover, the model has been validated with respect to case studies concerning duty cycles of different durations. This proves the applicability of the model in defining the allowed duration of the chip activity before a maximum threshold temperature is reached. Finally, in this paper, the possibility to use a variable time-step approach in the transient FTM is presented together with the option of computing the temperature in individual points only. This is possible maintaining the same accuracy as if the fully resolved temperature maps would be calculated. [ABSTRACT FROM AUTHOR]

Partial shading condition drastically reduces the maximum power output of photovoltaic array. Partial shading occurs due to several factors, such as flying birds, trees, and passing clouds. Many ways can be mitigated partial shading problems in photovoltaic (PV) array. One among the way is reconfiguration techniques, namely reconfigure the location of PV modules in PV array based on irradiance levels in order to distribute shading effects and increasing maximum power. This paper proposed an optimal SuDoKu reconfiguration pattern for $9\times 9$ total-cross-tied (TCT) PV array to improve maximum power under partial shading conditions. In this approach, the physical location of PV modules in TCT array are rearranged based on optimal SuDoKu style without altering the electrical connections, so that the shading effects can distribute over the array. Further, the performance of proposed pattern investigated with existing SuDoKu pattern under different shading conditions by comparing the global maximum power point, mismatch losses, fill-factor, and efficiency using MATLAB-Simulink. Based on the results of this paper, it concluded that the proposed optimal SuDoKu reconfiguration arrangement is reducing the wiring arrangement and increasing the shading distribution over the array as compared to SuDoKu arrangement. [ABSTRACT FROM AUTHOR]

This paper introduces a fully automated greedy algorithm for the construction of parameterized behavioral models of electromagnetic structures, targeting at the same time uniform model stability and passivity. The proposed algorithm is able to determine a small set of parameter configurations for which an external solver provides on-the-fly the sampled scattering parameters of the structure over a predetermined frequency band. These samples are subjected to a multivariate rational/polynomial fitting process, which iteratively leads to a parameterized descriptor realization of the model. The main novel contribution in this paper is the adoption of a model-based approach for the adaptive augmentation of an initially small set of frequency responses, each corresponding to a randomly selected parameter configuration. In particular, the locations of the in-band passivity violations of intermediate macromodels constructed at each iteration are used as a proxy for the model-data error in those regions where input data are not available. This physics-based consistency check, which is enabled by recent developments in multivariate passivity characterization based on Skew-Hamiltonian–Hamiltonian (SHH) spectra, is combined with standard space exploration metrics to obtain a small-size and automatically determined distribution of points in the parameter space, leading to the construction of an accurate macromodel with a very limited number of external field solver runs. The embedded passivity check and enforcement process guarantees that either the final model is passive throughout the parameter space or the residual violations, if present, are negligible for practical purposes. Several examples validate the proposed approach for up to three concurrent parameters. [ABSTRACT FROM AUTHOR]

Analyzing the timing properties of asynchronous systems is essential for characterizing their performance and power. Previous work on timing showed that such systems under and-causality and fixed delay exhibit periodicity properties. We give a different graph-based rigorous proof of the exact timing behavior of more general classes of such systems, and conclude their exact periodicity property, where each of the signal transition will occur with the same period after finite occurrences. We established our results under weaker assumption about system connectivity/topology, and this paper provides the theoretical foundation, for the exact periodicity property to be applied and exploited in circuits containing a combination of synchronous and asynchronous components. We provide simulation-based results for several typical asynchronous circuit topologies to quantify this time period in practical circuits. We also provide an extension of our analysis and methods to the case of bounded delay systems. A key result that is a consequence of our analysis is that asynchronous circuits can be integrated with synchronous logic via a metastability-free interface, thereby eliminating the high-overhead synchronizers when an asynchronous circuit is fully surrounded by synchronous logic. [ABSTRACT FROM PUBLISHER]

With the prevalence of embedded GPUs on mobile devices, power-efficient rendering has become a widespread concern for graphics applications. Reducing the power consumption of rendering applications is critical for extending battery life. In this paper, we present a new real-time power-budget rendering system to meet this need by selecting the optimal rendering settings that maximize visual quality for each frame under a given power budget. Our method utilizes two independent neural networks trained entirely by synthesized datasets to predict power consumption and image quality under various workloads. This approach spares time-consuming precomputation or runtime periodic refitting and additional error computation. We evaluate the performance of the proposed framework on different platforms, two desktop PCs and two smartphones. Results show that compared to the previous state of the art, our system has less overhead and better flexibility. Existing rendering engines can integrate our system with negligible costs. [ABSTRACT FROM AUTHOR]

With the widespread application of lithium-ion battery packs, it calls for efficient balancing methods to improve the performance of these battery systems. The relevant research has focused on the design of equalization circuits and control strategies while neglecting quantitative analysis and comparison of battery active equalization structures from the systematic level. In this paper, we propose an improved system-theoretic modeling approach for active equalization structures that takes into account the battery's constraints, including equalization current rate and SOC operation range. Accordingly, the mathematical models of various active equalization structures are derived that can describe their equalization dynamic behavior. Then, the analytical algorithms are developed to estimate the balancing time of active equalization structures online. Finally, extensive numerical simulations are conducted to evaluate and compare the average performance of these equalization systems in term of equalization time. It then comes up with a comprehensive comparison among them. Consequently, the Multicell-to-Multicell (MC2MC) balancing structure benefits the fast balancing speed and the lowest sensitive to initial batteries’ SOCs. The global structure has the lowest implementation cost and the series structure benefits the simplest control. Moreover, the module-based structures have faster balancing speed when each module contains about 4–6 batteries. [ABSTRACT FROM AUTHOR]

Electromagnetic Transient (EMT) simulation tools are typically developed using conventional procedural programming languages. On the other hand, modern high-level and equation-based programming languages, such as Modelica, are currently available. Modelica allows formulating models that are easy to develop, maintain and understand by expressing what needs to be computed without stating how it should be computed. This paper presents a Modelica-based simulator for electromagnetic transients. It is demonstrated that this approach offers significant advantages for developing sophisticated models. Computational performance and accuracy are compared to a conventional EMT-type simulation tool. [ABSTRACT FROM AUTHOR]

The aim of the paper is to define a limit performance of highly efficient battery electric quadricycles for urban mobility. The vehicle is employed for an energy efficiency competition in which urban concepts compete. A multi-physics (thermo-electro-mechanical) Tank To Wheels (TTW) model has been developed and validated. Given the information on the track route (track map and elevation) and on the throttle input command, the model computes the vehicle power demand and cruising speed. The model is validated by means of both indoor and outdoor experimental tests. The validated model is employed for the optimization of the transmission gear ratio and of the driving strategy to minimize the overall energy consumption on a given track. Design variables are related to the transmission gear ratio and to the throttle command profile. The algorithm aims to minimize the energy consumption, including constraints on the maximum current provided by the battery and on the maximum time available to complete the lap. Comparison with some common driving strategies confirmed the effectiveness of the proposed solution, with a foreseen 9% reduction of the vehicle overall energy demand. The single seater ultra-efficient electric vehicle, compared to other urban quadricycles, has a battery capacity ten times lower and a 50% longer driving range. [ABSTRACT FROM AUTHOR]

An important cue for multi-pedestrian tracking in video is the consistent appearance of an individual for quite a while. In this paper, we address multi-pedestrian tracking by learning a robust appearance model from the paradigm of tracking by detection. To separate detections of different pedestrians while assembling detections of the same pedestrian, we take advantage of the cue of consistent appearance and exploit three types of evidence from the recent, past and near-future. Existing online approaches only exploit the detection-to-detection and sequence-to-detection metrics, which focus on the recent and past appearance patterns respectively, while the future pedestrian appearance is simply ignored. This drawback is remedied in this paper by further considering the sequence-to-sequence metric, which resorts to near-future appearance presentation. Adaptive combination weights are learned to fuse these three different metrics. Moreover, we propose a novel Focal Triplet Loss to make the model focus more on hard examples than the easy ones. We demonstrate that this can significantly enhance the discriminating power of the model compared with treating every sample equally. Effectiveness and efficiency of the proposed method is verified by conducting comprehensive ablation studies and comparing with many competitive (offline/online/near-online) counterparts on the MOT16 and MOT17 Challenges. [ABSTRACT FROM AUTHOR]

This paper proposes an adaptive model of modular multilevel converter (MMC) for electromagnetic transient (EMT) simulations. The model is applicable to MMCs with arbitrary numbers of half-bridge and full-bridge submodules. The proposed design includes average value model, arm equivalent model, and detailed equivalent model. It allows smoothly transitioning from one model to another during time-domain simulations depending on the desired accuracy and execution time constraints. Modifications required in conventional MMC models to achieve smooth transitions are presented in the paper. Time-domain initialization methods are developed for each constituting model, including initialization of the appropriate control system blocks. Validity and effectiveness of the proposed adaptive model is demonstrated using EMT simulations of 401-level MMC-HVDC system. [ABSTRACT FROM AUTHOR]

In this paper, we propose a circuit yield prediction method to improve the efficiency of circuit yield prediction. Both traditional Monte Carlo simulation and the current popular machine learning for yield prediction require a large number of circuit simulation results, which increases production costs. This method finds the data boundary points through high-dimensional kernel density estimation, and performs simulation calculations on these boundary values instead of the overall simulation. Experiments show that, compared with machine learning and Monte Carlo methods, the proposed algorithm can efficiently predict the yield of circuits. [ABSTRACT FROM AUTHOR]

Intelligent reflecting surface (IRS) has been regarded as a promising and revolutionary technology for future wireless communication systems owing to its capability of tailoring signal propagation environment in an energy/spectrum/ hardware-efficient manner. However, most existing studies on IRS optimizations are based on a simple and ideal reflection model that is impractical in hardware implementation, which thus leads to severe performance loss in realistic wideband/multi-band systems. To deal with this problem, in this paper we first propose a more practical and more tractable IRS reflection model that describes the difference of reflection responses for signals at different frequencies. Then, we investigate the joint transmit beamforming and IRS reflection beamforming design for an IRS-assisted multi-cell multi-band system. Both power minimization and sum-rate maximization problems are solved by exploiting popular second-order cone programming (SOCP), Riemannian manifold, minimization-majorization (MM), weighted minimum mean square error (WMMSE), and block coordinate descent (BCD) methods. Simulation results illustrate the significant performance improvement of our proposed joint transmit beamforming and reflection design algorithms based on the practical reflection model in terms of power saving and rate enhancement. [ABSTRACT FROM AUTHOR]

Determining the Marx generator configuration, including the values of series and parallel resistors as well as the number of series and parallel stages to obtain standard lightning impulse (LI) waveforms, is usually done in a trial and error process in the high voltage test fields of power transformer manufacturers. This practical process may take excessive time and is boring for test engineers. In this paper, a simple simulation method is proposed to model the LI test circuit of the transformer by computer, which is helpful in identifying the Marx generator set up. This method is based on modeling the LI test circuit as well as the transformer's high frequency impedance in discrete frequency domain. The measured frequency response of the transformer is used to model its high frequency characteristics. Digital signal processing methods are used to simulate the circuit and obtain waveforms. The accuracy of the proposed method is validated using experimental tests performed on three transformers with different ratings. [ABSTRACT FROM AUTHOR]

To investigate and quantify the radiation emission of an electronic package model, the partial element equivalent circuit method combined with the field equivalence principle is developed in this paper and used for the near-field radiation prediction. Furthermore, this paper presents a novel electromagnetic bandgap (EBG) design to suppress the electromagnetic radiation. The simulation results obtained by the proposed method have been validated against the measurement; moreover, the simulation and measurement results demonstrate the noise suppression ability of the new designed EBG structure, which can be used to reduce the electromagnetic radiation of the package. [ABSTRACT FROM AUTHOR]

Two challenges are combined when compressed tests are computed for path delay faults: 1) path delay faults that are important to detect are associated with long paths, and many of these faults are undetectable and 2) it may not be possible to compress a given test for a path delay fault. This paper addresses these challenges in the context of test data compression methods that are based on a linear-feedback shift-register (LFSR). The basic approach that this paper uses modifies initially random seeds for the LFSR into seeds that produce tests for detecting target faults. This approach can find seeds even if the available tests cannot be compressed into seeds. In addition, the procedure described in this paper also selects detectable path delay faults to address the presence of undetectable path delay faults in the set of target faults. For this purpose it uses a metric that measures the similarity between target and detected path delay faults, and attempts to compute seeds that increase the values of this metric. Experimental results are presented to demonstrate the ability of the procedure to detect path delay faults in benchmark circuits. [ABSTRACT FROM AUTHOR]

A diagnostic test generation procedure targets fault pairs in a set of target faults with the goal of distinguishing all the fault pairs. When a fault pair cannot be distinguished, it prevents the diagnostic test set from providing information about the faults, and consequently, about defects whose diagnosis would have benefited from a diagnostic test for the indistinguishable fault pair. This is referred to in this paper as a diagnostic hole. This paper observes that it is possible to address diagnostic holes by targeting different but related fault pairs, possibly from a different fault model. As an example, this paper considers the case where diagnostic test generation is carried out for single stuck-at faults, and related bridging faults are used for addressing diagnostic holes. Considering fault detection, an undetectable single stuck-at fault implies that certain related bridging faults are undetectable. This paper observes that, even if a pair of single stuck-at faults is indistinguishable, a related pair of bridging faults may be distinguishable. Based on this observation, diagnostic tests for pairs of bridging faults are added to a diagnostic test set when the related single stuck-at faults are indistinguishable. Experimental results of defect diagnosis for defects that do not involve bridging faults demonstrate the importance of eliminating diagnostic holes. [ABSTRACT FROM AUTHOR]

This paper illustrates the usefulness of the physics-based compact device models in investigating the impact of device behavioral nuances on the operation and performance of the circuits and systems. The industry standard MIT virtual source gallium nitride high electron-mobility transistor (GaN HEMT) (MVSG) model is used as the modeling framework to understand the operation of the GaN HEMTs and study the key device–circuit interactions in the GaN-based high-frequency and power conversion circuits. Details of the core model equations along with their physical underpinnings are presented along with the benchmark tests to verify the model’s convergence robustness and simulation accuracy. The usefulness of such a compact model in circuit design is highlighted through examples of the GaN-based high-voltage converter and RF-power amplifiers. It is shown that the slew-rates in hard-switched buck converters are determined by the dynamic charge distribution among the field plates in GaN HEMTs, indicating the importance of the device-level effect on circuit performance. Likewise, it is shown using the MVSG model that the performance metrics, such as drain efficiency and linearity, of the GaN RF-power amplifiers are heavily dependent on the device-level effects, such as access-region depletion, thermal effects, and charge-trapping effects. These GaN-based circuits designed using the MVSG model can be used as the example cases to demonstrate the importance of the accurate physical compact models in designing high performance circuits and systems in emerging technologies. [ABSTRACT FROM AUTHOR]

In this paper, an enhanced compact model of multiwalled carbon nanotube (MWCNT) interconnects while considering defects and contact resistance is proposed. Based on the atomistic-level simulations, we have found that defect densities impact MWCNT resistance and ultimately their electrical performance. Furthermore, we have computed by atomistic-level simulations, the end-contact resistance between single-wall carbon nanotube and palladium (Pd) electrode to mimic the Pd–CNT end-contact resistance of each CNT shell in MWCNT. We have developed an advanced shell-by-shell model to include various parameters, such as shell diameter, shell chirality, defects on each shell, and connectivity of each shell to end contacts. We run Monte Carlo simulations to perform variability studies on each of these parameters to understand the electrical performance variation on MWCNT interconnects. We present the simulation results to convey the critical impact of variations. The impact of doping on MWCNT variability in the form of Fermi level shift will be addressed in Part II of this paper. [ABSTRACT FROM AUTHOR]

This paper presents a physics-based analytical model for the MOS transistor operating continuously from room temperature down to liquid-helium temperature (4.2 K) from depletion to strong inversion and in the linear and saturation regimes. The model is developed relying on the 1-D Poisson equation and the drift-diffusion transport mechanism. The validity of the Maxwell–Boltzmann approximation is demonstrated in the limit to 0 K as a result of dopant freezeout in cryogenic equilibrium. Explicit MOS transistor expressions are then derived, including incomplete dopant ionization, bandgap widening, mobility reduction, and interface charge traps. The temperature dependence of the interface trapping process explains the discrepancy between the measured value of the subthreshold swing and the thermal limit at deep-cryogenic temperatures. The accuracy of the developed model is validated by experimental results on long devices of a commercial 28-nm bulk CMOS process. The proposed model provides the core expressions for the development of physically accurate compact models dedicated to low-temperature CMOS circuit simulation. [ABSTRACT FROM AUTHOR]

The nonlinearities and memory effects of power amplifiers (PAs) can be compensated by multistage cascaded digital predistortion with low complexity. Compared with full multistage models, sparse multistage models may have the same linearization performances while their complexities are even lower. However, the choice of the model structure is very difficult, especially for the sparse models. For instance, if there are $(K+1)(L+1)$ full models, then $2^{K+L-2}$ different corresponding sparse models exist. An algorithm with the optimal search space definition is proposed in this paper to search for the optimal cascaded sparse model structure. The search criterion represents tradeoff between the modeling accuracy and identification complexity with a weight coefficient. A method to determine the value of the weight coefficient is proposed in this paper. The sparse model solution found by the proposed algorithm is evaluated with a three-way Doherty PA using a long term evolution-advanced signal. It is also compared with the solution of full model structure search. [ABSTRACT FROM AUTHOR]

Dynamic operational behavior (DOB) of electrical machines can cause effects that are difficult to describe and understand. The short-circuit behavior (SCB) in particular is a dangerous DOB for machine and human. It could destroy the machine itself and cause heavy damage to the power supply unit and mechanical coupling components. Analytical calculation of the SCB is simplified and thus not highly accurate. Therefore, the finite element method simulation of the SCB is an important tool for understanding these effects without the danger of damaging the machine by experiments. In this paper, a suitable field formulation, modeling details, and simulation methods for dynamic analysis of synchronous machines are presented in detail. In particular, the accuracy of 2-D and 3-D transient electromagnetic simulations is analyzed by comparison against the available measurements performed on a chosen testing salient pole synchronous machine under the conditions of three-phase, two-phase, and single-phase short circuit. [ABSTRACT FROM AUTHOR]

In deep submicron nodes, the final design patterning quality depends profoundly on the optical proximity correction (OPC) quality. The required pattern fidelity and CD uniformity can never be achieved without good OPC. However, OPC runtime-resource factor has been exponentially increasing every technology node reaching alarming levels, where the OPC cost in terms of resources and turn-around-time is becoming very expensive. In this paper, we present a novel approach for speeding up the OPC convergence process using our model-based initial bias methodology. Our proposed methodology is based on building generic compact bias-models that can predict the final OPC shapes with a good accuracy using the optical simulation parameters. As a result, the OPC initial condition is much closer to the final solution and more than half of the OPC iterations can be saved as a result. In this paper, we present the details of our methodology and our compact initial-bias model we are proposing. We also present our testing results on a 10 nm metal level, where almost 50% of the OPC iterations could be saved when we apply our methodology. [ABSTRACT FROM AUTHOR]

The 3-D integrated circuits (3-D ICs) are emerging as a viable solution to enhance the performance of many-core platforms. These architectures generate a high and rapidly changing thermal flux that makes conventional air-cooled devices more susceptible to overheating. Liquid cooling is an alternative that can improve dissipation and reduce thermal issues. Fast and accurate thermal models are needed to appropriately dimension the cooling system at design time. Several models have been proposed to study different designs, but generally with low simulation performance. In this paper, we present an efficient model of the transient thermal behavior of liquid-cooled 3-D ICs. This paper presents an approach with extremely low memory usage and advanced numerical methods to efficiently compute the transient temperature of 3-D ICs. Our experiments show the $100\times $ speedup versus the state-of-the-art models, while maintaining the same level of accuracy, and demonstrate the efficiency of liquid cooling to remove the heat from 3-D many-core platforms. [ABSTRACT FROM PUBLISHER]

Efficient performance modeling of today’s analog and mixed-signal circuits is an important yet challenging task, due to the high-dimensional variation space and expensive circuit simulation. In this paper, we propose a novel performance modeling algorithm that is referred to as Bayesian model fusion (BMF) to address this challenge. The key idea of BMF is to borrow the information collected from an early stage (e.g., schematic level) to facilitate efficient performance modeling at a late stage (e.g., post layout). Such a goal is achieved by statistically modeling the performance correlation between early and late stages through Bayesian inference. Furthermore, to make the proposed BMF method of practical utility, four implementation issues, including: 1) prior mapping; 2) missing prior knowledge; 3) fast solver; and 4) prior and hyper-parameter selection, are carefully considered in this paper. Two circuit examples designed in a commercial 32 nm CMOS silicon on insulator process demonstrate that the proposed BMF method achieves up to $9\times $ runtime speed-up over the traditional modeling technique without surrendering any accuracy. [ABSTRACT FROM AUTHOR]

This paper addresses theoretical aspects of arithmetic circuit verification based on algebraic rewriting. Its goal is to advance the understanding of algebraic techniques for arithmetic circuit verification in the context of symbolic computer algebra. The paper offers a new insight into the arithmetic circuit verification problem, by viewing the computation performed by the circuit as the flow of digital data. In the proposed bit-flow model, the circuit is modeled as a network of logic components satisfying a bit-flow conservation law. We prove that the value of the flow of data in the circuit is invariant throughout the circuit and use this to prove soundness and completeness of the rewriting technique, independently from the computer algebra arguments. The efficiency of the method is illustrated with impressive results for large integer multipliers. The verification system and benchmarks are offered in an open source software environment. [ABSTRACT FROM AUTHOR]

The rapid proliferation of distributed generation (DG) in active distribution networks (ADNs) increases the power system modeling complexity, which requires more efficient numerical methods to analyze dynamic interactions among DGs in ADN. This paper proposes a reduced-order dynamic phasor (DP) modeling method which is applied to large-scale ADNs with DGs for reducing the modeling scale and allowing larger time steps in ADN analyses. First, a unified state-space DP model, referred to as full-order DP model for linear circuits, is developed on the abc-axis to provide a comprehensive technique for interfacing DGs with other electric devices in large ADNs. The model order reduction (MOR) is applied to this full-order model to reduce the computation burden for large-scale ADNs. The paper develops a state-space DP model on positive and negative sequence synchronous rotating reference frames for three-phase DGs, and a stationary frame for single-phase DGs. The accuracy and the efficiency of the proposed models are verified using the modified IEEE 123-node test feeder and IEEE European low voltage test feeder with DGs. [ABSTRACT FROM AUTHOR]

An electrical transient model (ETM) of insulated-gate bipolar transistor (IGBT)-diode switching cell is developed by coupling a temperature-dependent IGBT model with power loss model. The nonlinear behavior of IGBT and the reverse recovery characteristic of the diode are considered in this model to simulate the transient switching waveforms. Based on the transient waveforms of ETM under various operating conditions, the power loss estimation method (PLEM) for IGBT is developed. In addition to traditional modeling techniques that only uses ideal switch, this paper uses the model to replicate the power loss behaviors of semiconductor devices in circuit simulation by looking up tables. The proposed ETM is simulated in PSCAD/EMTDC with nanosecond time step, whereas the overall system application can be simulated with conventional time step in range of microsecond. By this way, the model can promise reasonable accuracy as well as an acceptable fast solving speed. The proposed ETM and PLEM have been implemented in PSCAD/EMTDC simulator and validated by experimental results using a double pulse test bench and boost converter test platform. [ABSTRACT FROM AUTHOR]

Energy management is a critical challenge in multicore processors due to continuous technology scaling. Previous methods have mostly focused on the energy minimization of the processor cores. However, energy overhead of the off-chip voltage regulator (VR) has recently shown to be a nontrivial part of the total energy consumption and has been previously overlooked. In this paper, we propose an overall energy optimization method for the system that minimizes both per-core energy consumption and VR energy consumption using dynamic voltage frequency scaling and VR phase scaling by solving a comprehensive convex model. In order to improve the accuracy of the task latency model, a new task model considering both computation and memory access of the task is also developed. Furthermore, for better scalability and lower online overhead, we decompose our proposed convex method into two stages: 1) an offline stage and 2) an online stage. During the offline stage, we explore the convex model by assuming different numbers of active phases of the VR, various workload pressures and workload characteristics to collect the optimal frequency assignments under different scenarios. During the online stage, the specific frequency assignment for cores and optimal active phase number of the VR are selected and applied based on the actual workload pressure and its characteristics running on the cores. Experiments on real benchmarks show that when compared with the state-of-the-art approaches, which are oblivious to VR overheads and exploit slack time to achieve energy minimization, our method can achieve a significant energy saving of up to 22.4% with negligible online overhead. [ABSTRACT FROM AUTHOR]

A novel method for semantic action recognition through learning a pose lexicon is presented in this paper. A pose lexicon comprises a set of semantic poses, a set of visual poses, and a probabilistic mapping between the visual and semantic poses. This paper assumes that both the visual poses and mapping are hidden and proposes a method to simultaneously learn a visual pose model that estimates the likelihood of an observed video frame being generated from hidden visual poses, and a pose lexicon model establishes the probabilistic mapping between the hidden visual poses and the semantic poses parsed from textual instructions. Specifically, the proposed method consists of two-level hidden Markov models. One level represents the alignment between the visual poses and semantic poses. The other level represents a visual pose sequence, and each visual pose is modeled as a Gaussian mixture. An expectation-maximization algorithm is developed to train a pose lexicon. With the learned lexicon, action classification is formulated as a problem of finding the maximum posterior probability of a given sequence of video frames that follows a given sequence of semantic poses, constrained by the most likely visual pose and the alignment sequences. The proposed method was evaluated on MSRC-12, WorkoutSU-10, WorkoutUOW-18, Combined-15, Combined-17, and Combined-50 action datasets using cross-subject, cross-dataset, zero-shot, and seen/unseen protocols. [ABSTRACT FROM AUTHOR]

This paper proposes a detailed equivalent model for electromagnetic transient simulation of a modular multilevel converter with embedded battery energy storage in its submodules. The model offers an accuracy identical to that of a detailed switching model (DSM), while it markedly reduces the computational complexity of simulations. This is achieved by modeling each multivalve as a Thevenin equivalent considering the full dynamics of each constituent submodule, which results in a significant reduction in the number of switchable nodes in the converter model and hence the dimensions of the system's admittance matrix. The paper presents the mathematical development of the model and validates it against detailed switching models through several case studies. Experimental results from a scaled-down laboratory setup are also presented for further verification. [ABSTRACT FROM AUTHOR]

This paper proposes a new equivalent magnetic network (EMN) model for vehicular dual-permanent-magnet vernier (DPMV) machines by applying a generalized modeling method. First, the magnetic circuit method and the meshing method are combined together to improve the modeling efficiency of the DPMV machine. The magnetic circuit method is used to generate conventional lumped parameter permeances to shorten time consumption, whereas the mesh method is utilized in disordered magnetic fields to obtain high precision. Second, a meshing solution for oblique region is proposed to enhance modeling flexibility. Moreover, the flux distributions in meshes are represented without magnetic field pre-delineation, which enables its utilization as a self-adaptive reluctance network model in design optimization. Finally, the proposed EMN model is used to predict the performance of the DPMV machine, considering leakage magnetic flux, local iron saturation, and magnetic field modulation effect simultaneously. Meanwhile, the effectiveness of the proposed EMN model is verified by comparison with finite-element analysis and experimental tests. [ABSTRACT FROM AUTHOR]

Assembly of power-flow equations has traditionally begun from a nodal analysis formulation of the underlying transmission circuit's behavior. Most power-flow formulations encapsulate network constraints in the bus admittance matrix, $Y_{\text{bus}}$. From a circuit perspective, this admittance representation restricts the network elements to be voltage controlled; resulting drawbacks treating zero-impedance branches in such applications as state estimation have long been recognized. This paper explores the advantages of the alternatives to $Y_{\text{bus}}$ -based formulations in power flow. It proposes a sparse tableau formulation (STF), and it demonstrates its computational efficiency, robustness, and generality in detailed comparison to traditional $Y_{\text{bus}}$ -based solution algorithms. In the examples of power networks ranging from 1888 to 82 000 buses, computational case studies indicate that STF provides comparable computational speed, while allowing simple treatment of zero-impedance branches and more reliably converging to solutions in many cases for which $Y_{\text{bus}}$ -based Newton algorithms diverge. [ABSTRACT FROM AUTHOR]

State of charge (SOC) estimation of lithium-ion batteries has been extensively studied and the estimation accuracy was mainly investigated through the development of various battery models and dynamic estimation algorithms. All battery models, however, contain inherent model bias due to the simplifications and assumptions, which cannot be effectively addressed through the development of various algorithms such as Kalman filtering (KF) or particle filtering (PF). Consequently, as observed in some study, battery SOC estimation using a typical extended KF in fact is not very accurate where the error could range from 5% to 10% or even more depending on the battery characteristics. This paper proposes bias characterization of the battery model, so that accuracy of the baseline model could be significantly improved and eventually SOC estimation could be much more accurate than the one only using the baseline model. This paper reports great potential for improving battery SOC estimation with the bias characterization and proposes two methods for actual bias modeling. In particular, the polynomial regression model and the Gaussian process regression model are proposed to examine the effects of the two methods on bias modeling and SOC estimation using a typical battery circuit model. Results are demonstrated in both simulation and lab testing using three battery charging/discharging profiles with the cross-validation technique. [ABSTRACT FROM AUTHOR]

This paper presents methods for the modeling of the localized (near) fields of vertical interconnects in silicon interposers and the applications of these methods for the efficient computation of the electromagnetic properties of through silicon via structures. The localized fields are due to the mode conversions of the coaxial-to-radial waveguide junctions present in these structures. Because exact analytical techniques exist only for the homogeneously filled junction, an efficient numerical technique is proposed in this paper for the modeling of the inhomogeneous cases. This technique provides accurate results in the form of network parameters with three ports, which can be applied, e.g., in the framework of the physics-based via models. The finite-difference frequency domain method for the case of rotational symmetry is adapted to variable grid distances along the axial and radial coordinates, and interface conditions for the inhomogeneous filling of silicon and electrically isolating silicon dioxide are implemented. The method is validated with full-wave results from finite-element simulations and with the results from the published analytical methods that are adapted to the layered structures. The main focus is in the modeling for signal integrity analysis from the frequencies where the skin effect is well developed at about 100 MHz up to 100 GHz. Nevertheless, good agreement with the results from finite-element simulations up to 500 GHz is obtained for several relevant example structures, and a speedup of at least two orders compared with the finite-element simulations is achieved. [ABSTRACT FROM AUTHOR]

This paper proposes a novel memristor-based multiplexer implemented by using NOT-material implication. The proposed design can be extended to arbitrary ${N}$ -bit inputs and the enable-port can be added to improve its structure. Furthermore, this structure can be applied in the cascade circuit and crossbar array. A novel peripheral read circuit is introduced to overcome the problem that it is difficult to read out the operation results stored in crossbar array with large scales. The feasibility and correctness of our design is verified by the HSPICE simulation results with voltage threshold adaptive memristor model. [ABSTRACT FROM AUTHOR]

In this paper, compact time-domain (TD) models featuring materials with frequency-dependent electromagnetic (EM) properties are derived. The considered frequency-dependent material models include multiterm Debye and Lorentz models for the electric permittivity and the magnetic permeability and a multiterm Drude model for the electric conductivity. The TD models are based on finite-element systems in the frequency domain (FD). To render the model compact and computationally efficient, the dimension of the FD system is compressed with the help of projection-based model-order reduction. In contrast to older approaches, the TD transformation is performed on the FD model itself rather than on the transfer function. The result is a state-space representation, which may either be solved by custom time integrators or imported into commercial circuit simulators. The advantages of the new approach include provable passivity of the FD model, provable causality of the TD model, and the ability to reconstruct the transient EM fields. [ABSTRACT FROM AUTHOR]

Boolean networks are a notable model of gene regulatory networks and, particularly, prominent theories discuss how they can capture cellular differentiation processes. One frequent motif in gene regulatory networks, especially in those circuits involved in cell differentiation, is autoregulation. In spite of this, the impact of autoregulation on Boolean network attractor landscape has not yet been extensively discussed in literature. In this paper we propose to model autoregulation as self-loops, and analyse how the number of attractors and their robustness may change once they are introduced in a well-known and widely used Boolean networks model, namely random Boolean networks. Results show that self-loops provide an evolutionary advantage in dynamic mechanisms of cells, by increasing both number and maximal robustness of attractors. These results provide evidence to the hypothesis that autoregulation is a straightforward functional component to consolidate cell dynamics, mainly in differentiation processes. [ABSTRACT FROM AUTHOR]

This paper presents the modeling of some protective relays commonly used in generation and transmission systems, and their integration in three-phase RMS dynamic simulation tool. The three-phase models of the network and the power apparatuses, utilizing phase frame representation, enlarges the possibility to better represent the protection systems, since the relays involving ground and neutral circuitry can be modeled. The network can be modeled with a node-breaker topology representation, facilitating the integration of protecting relays and the switchgear. The relay modeling framework can also be used in positive-sequence RMS dynamic simulation tools with few adjustments in the measured quantities. Simulation results in realistic small and large-scale systems showing the performance of the proposed relay modeling framework and a comparison with an EMT tool are presented. [ABSTRACT FROM AUTHOR]

This paper introduces an enhanced equivalent model of the half-bridge symmetrical monopole modular multilevel converter (MMC) topology for the analyses of the electromagnetic transients. Compared with the existing MMC models, the proposed model reduces the simulation computational time without compromising accuracy, and contrary to the existing models, it provides accurate representation of the MMC behavior with respect to the dc-side fault. This paper also evaluates and verifies the accuracy of the proposed equivalent model under various operating conditions, that is, startup, dc-side pole-to-pole fault, and ac-side three-phase-to-ground fault. The study results indicate that: 1) in contrast to the existing equivalent models, the proposed enhanced model accurately represents the MMC under various operating conditions; 2) the implemented simplifications to the model do not adversely affect the accuracy of the simulation results; and 3) a reduced-level approximated model of the MMC is also adequately accurate for protection studies. [ABSTRACT FROM AUTHOR]

Exploring the design space of computer architectures generally consists of a trial-and-error procedure where several architectural configurations are evaluated by using simulation techniques. The final goal of the multiobjective design space exploration (DSE) process is the identification of architectural configurations optimal for a set of target objective functions, typically power consumption, and performance. Simulations are computationally expensive making it rather hard to efficiently explore the design space to identify high-quality configurations in an acceptable exploration time when relying solely on a single-core machine to run simulations. To tackle this problem, engineers proposed solutions based on either: 1) the use of approximate analytic performance models to prune the suboptimal regions of the design space by reducing the number of simulations to run or 2) the use of parallel computing resources to run different simulations concurrently. In this paper we demonstrate that, to efficiently speedup the DSE process while fully exploiting the parallel computing infrastructure, we need to combine the two techniques together in a structured manner. In this paper, we investigate this issue and we propose a DSE solution that exploits approximate analytic prediction models to improve the simulation schedule on a parallel computing environment rather than to prune the number of simulations. Experimental results demonstrate that the proposed technique provides a speedup from 1.26\boldsymbol \times to 4\boldsymbol \times with respect to other parallel state-of-the art DSE techniques. [ABSTRACT FROM PUBLISHER]

In the companion paper, a methodology for computing transmission-line short circuits caused by direct and nearby ground lightning incidence was described. This paper presents the application of methodological and computational procedures of this methodology, regarding the calculation of lightning performance of transmission lines. From the computed results, focusing on 138- and 230-kV typical three-phase transmission lines, the effectiveness of the described process is clear, even when the line is modeled three-dimensionally or when nonlinear elements are present, for example, when arresters are installed in the line. [ABSTRACT FROM AUTHOR]