16 results on '"Bo Zhang"'
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2. Dynamic Simulation of Surge Corona With Time-Dependent Upwind Difference Method.
- Author
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Wei Li, Bo Zhang, Rong Zeng, and Jinliang He
- Subjects
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CORONA discharge , *ALGORITHMS , *FINITE element method , *ELECTRIC fields , *ELECTRIC transients - Abstract
This paper presents a new algorithm to simulate the surge corona of power transmission lines in two dimension. The charge simulation method and the finite element method are applied to calculate the electric field, while a time-dependent upwind difference algorithm is applied to calculate the migration of the space charges. The implementation of boundary conditions and the choice of mesh size and time step are discussed to ensure the stability of the proposed algorithm. The Q-V (charge-voltage) curves of impulses applying on single conductor and bundle conductors in a cage having a square cross section are calculated. The simulation results are supported by the published experiments. [ABSTRACT FROM AUTHOR]
- Published
- 2010
- Full Text
- View/download PDF
3. Field Enhancement for Dielectric Layer of High-Voltage Devices on Silicon on Insulator.
- Author
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Bo Zhang, Zhaoji Li, Shengdong Hu, and Xiaorong Luo
- Subjects
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DIELECTRICS , *CONTINUITY , *SILICON-on-insulator technology , *ELECTRIC displacement , *ELECTRIC fields - Abstract
Based on the continuity theorem of electric displacement including interface charges, the enhanced dielectric layer field (ENDIF) for silicon-on-insulator (SOI) high-voltage devices is proposed. The following three approaches for enhancing the dielectric layer electric field E1 to increase the vertical breakdown voltage of a device VB,V are presented: 1) using a thin silicon layer with a high critical electric field ES,C; 2) introducing a low-permittivity dielectric buried layer; and 3) implementing interface charges between the silicon and the dielectric layer. Considering the threshold energy of silicon εT, the formula of ES,C on silicon layer thickness tS is first obtained, which increases sharply with a decrease of tS, and reaches up to 141 V/µm at tS = 0.1 µm. Expressions for E1 and VB,V are given, which agree well with simulative and experimental results. Based on the ENDIF, the new device structures are given, and an E1 value of 300 V/µm has been experimentally obtained for double-sided trench SOI. Moreover, several conventional SOI devices are explained well by ENDIF. [ABSTRACT FROM AUTHOR]
- Published
- 2009
- Full Text
- View/download PDF
4. High-Voltage SOT SJ-LDMOS With a Nondepletion Compensation Layer.
- Author
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Wenlian Wang, Bo Zhang, Zhaoji Li, and Wanjun Chen
- Subjects
METAL oxide semiconductors ,SILICON-on-insulator technology ,DENSITY functionals ,OXIDES ,SEMICONDUCTOR junctions ,ELECTRIC breakdown ,ELECTRIC charge ,ELECTRIC fields ,ELECTRIC potential - Abstract
Abstract-A new superjunction LDMOS on silicon-on-insulator (SOl) with a nondepletion compensation layer (NDCL) is proposed. The NDCL can be self-adaptive to provide additional charges for compensating the charge imbalance while eliminating the substrate-assisted depletion effect. In addition, the highdensity oxide interface charges at the top surface of the buried oxide layer (BOX) enhance the electric field in the BOX and improve the vertical breakdown voltage (By). Numerical simulation results indicate that a uniform surface electric field profile is obtained and that the vertical electric field in BOX is increased to 6 x 10[sup6] V/cm, which results in a high BV of 300 V for the proposed device with the BOX thickness of 0.5 μm and drift length of 15 μm on a thin SO! substrate. [ABSTRACT FROM AUTHOR]
- Published
- 2009
- Full Text
- View/download PDF
5. New High-Voltage (> 1200 V) MOSFET With the Charge Trenches on Partial SOT.
- Author
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Xiaorong Luo, Bo Zhang, and Zhaoji Li
- Subjects
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METAL oxide semiconductor field-effect transistors , *HIGH voltages , *ELECTRIC charge , *ELECTRIC fields , *SILICON-on-insulator technology , *BREAKDOWN voltage , *SUBSTRATES (Materials science) , *SILICON , *SIMULATION methods & models - Abstract
A novel silicon-on-insulator (SOI) high-voltage MOSFET structure and its breakdown mechanism are presented in this paper. The structure is characterized by oxide trenches on the top interface of the buried oxide layer on partial SOI (TPSOI). Inversion charges located in the trenches enhance the electric field of the buried layer in the high-voltage blocking state, and a silicon window makes the depletion region spread into the substrate. Both of them modulate the electric field in the drift region; therefore, the breakdown voltage (BV) for a TPSOI LDMOS is greatly enhanced. Moreover, the Si window alleviates the self-heating effect. The influences of the structure parameters on device characteristics are analyzed for the proposed device structure. The TPSOI LDMOS with BV > 1200 V and the buried-layer electric field of EI > 700 V/μm is obtained by the simulation on a 2-μm-thick SOI layer over 2-μm-thick buried oxide layer, and its maximal temperature reduces by 19 and 8.7 K in comparison with the conventional SOI and partial SOI devices. [ABSTRACT FROM AUTHOR]
- Published
- 2008
- Full Text
- View/download PDF
6. Calculation of Ion Flow Field Under HVdc Bipolar Transmission Lines by Integral Equation Method.
- Author
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Bo Zhang, Jinhiang He, Rong Zeng, Shanqiang Gu, and Lin Cao
- Subjects
- *
FUNCTIONAL equations , *ELECTRIC fields , *ELECTRIC utilities , *INTEGRAL equations , *OPERATIONAL calculus , *FUNCTIONAL analysis , *FREDHOLM equations - Abstract
The electric fields under high-voltage direct current (HVdc) transmission lines and the ions produced by corona affect each other greatly. This paper presents an iterative method to calculate ion flow fields under HVdc bipolar transmission lines in the presence of wind. Both the electric fields and the ion densities are calculated by integral equation method. The method is fast and stable. The results are in good agreement with the experimental data. The ion flow fields under a ± 800-kV bipolar direct current (dc) transmission line are analyzed. [ABSTRACT FROM AUTHOR]
- Published
- 2007
- Full Text
- View/download PDF
7. Calculation of DC Current Distribution in AC Power System Near HVDC System by Using Moment Method Coupled to Circuit Equations.
- Author
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Bo Zhang, Xiang Cui, Rong Zeng, and Jinliang He
- Subjects
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DIRECT currents , *ELECTRIC resistors , *ELECTRODES , *ELECTRIC fields , *ELECTROMAGNETIC fields , *ELECTRIC lines - Abstract
When dc current is injected into the earth through the grounding electrodes of a high-voltage direct current (HVDC) system, transformers in ac system may be under dc bias if the dc currents flowing through the transformers are large enough. In this paper, a numerical method coupling the method of moments (MoM) to circuit equations is presented to calculate the dc current distribution in ac power system caused by an HVDC system. The MoM is used to calculate the electric fields in complex earth structure caused by all the grounding systems including the dc grounding electrodes, the ac substation grounding systems and the long metal pipe lines. The circuit equations are coupled to the moment method to take account of the effects of the transmission lines. By using the method, the dc current distribution in an ac power system caused by an HVDC system is analyzed. Some useful conclusions are drawn from the analyzed results. [ABSTRACT FROM AUTHOR]
- Published
- 2006
- Full Text
- View/download PDF
8. Electric Field Calculation for HV Insulators on the Head of Transmission Tower by Coupling CSM With BEM.
- Author
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Bo Zhang, Jinliang He, Xiang Cui, Shejiao Han, and Jun Zou
- Subjects
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ELECTROMAGNETIC fields , *ELECTRIC insulators & insulation , *ELECTRIC power transmission , *ELECTRIC resistance , *INSULATING materials , *NUMERICAL analysis - Abstract
An approach coupling indirect boundary element method with charge simulation method to calculate the electric fields around the head of transmission tower and its composite insulators is presented. On the composite insulators, the indirect boundary element method is used, while on the transmission tower and the transmission lines, the charge simulation method is used. Therefore, both the heterogeneous medium such as the composite insulators and the filament metal structure such as the transmission tower and the transmission lines are considered all together. The electric field distribution around a 330-kV transmission tower and its composite insulators was analyzed. The method gives the possibility to model very complex geometries. [ABSTRACT FROM AUTHOR]
- Published
- 2006
- Full Text
- View/download PDF
9. Numerical Analysis of Electric-Field Distribution Around Composite Insulator and Head of Transmission Tower.
- Author
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Bo Zhang, Shejiao Han, Jinliang He, Rong Zeng, and Puxuan Zhu
- Subjects
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POWER transmission , *ELECTRICAL engineering , *ELECTRIC power , *ELECTRIC fields , *ELECTRIC power distribution - Abstract
In this paper, the electric-field distribution around the composite insulators and the heads of transmission towers is calculated by a model coupling the indirect boundary-element method to the moment method. The heterogeneous media, such as the composite insulators and the filament metal structures such as the transmission towers and the transmission lines, are considered altogether. The method can take into account not only the permittivity but also the resistivity of the media by using the complex resistivity in the frequency domain. The electric-field distribution around a three-phase 330-kV transmission tower with composite insulators was analyzed. The electric fields on the surfaces of the grading rings and the phase subconductors and at the ends of the composite insulators are analyzed. Both the method and the results are useful for the design of high-voltage transmission lines. [ABSTRACT FROM AUTHOR]
- Published
- 2006
- Full Text
- View/download PDF
10. Efficient Evaluation of the [Z] Matrix With Method of Moment in Grounding Analysis by Using Adaptive Spatial Sampling Approach.
- Author
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Jun Zou, Bo Zhang, Jian Guo, Jin-Liang He, Jaebok Lee, and Sughun Chang
- Subjects
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NUMERICAL analysis , *ELECTROMAGNETIC fields , *ELECTRIC fields , *ELECTRIC current grounding , *MOMENTS method (Statistics) - Abstract
The design of grounding system often relies on the performance simulations. The evaluation of the current distribution of grounding system for many frequencies by using the method of moments (MoM) may take a long time since the impedance matrix must be recomputed at each new frequency. A multiobject adaptive spatial sampling approach is presented to construct the fitted model of the electric field intensity generated by a horizontal electric dipole. The [Z] matrix spatial interpolation technology with MoM is described to reduce the computational time needed for the transient characteristics analysis of a horizontal grounding system. The accuracy and computational time of the [Z] matrix interpolation method are compared with those of the direct MoM. The numerical examples show that the [Z] matrix spatial interpolation method can reduce the computation requirement effectively. [ABSTRACT FROM AUTHOR]
- Published
- 2006
- Full Text
- View/download PDF
11. Electromagnetic Environment Analysis of a Software Park Near Transmission Lines.
- Author
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Jinliang He, Shuiming Chen, Jian Guo, Rong Zeng, Jaebok Lee, Sughun Chang, Bo Zhang, Jun Zou, and Zhicheng Guan
- Subjects
ELECTRIC lines ,ELECTROMAGNETISM ,COMPUTER software ,PARKS ,ELECTRIC fields ,SHORT circuits ,FAULT location (Engineering) - Abstract
The electromagnetic environments (EMEs) of the planned Zhongguancun Software Park near transmission lines, including electrical field, magnetic field, and ground potential rise under three cases of lightning stroke, normal operation, and short-circuit faults, are assessed by numerical analysis. The power frequency EMEs of the software park are below the maximum ecological allowed exposure values for the general public; , nevertheless, the power frequency magnetic field may interfere with the sensitive computer display unit. The influence of short-circuit fault in two different cases of remote short circuit and neighboring short circuit on the software park is discussed. The main problem we must pay attention to is the ground potential rise in the software park due to neighboring short-circuit fault; it would threaten the safe operation of electronic devices in the software park. On the other hand, the lightning stroke is a serious threat to the software park. How to improve the EMEs of the software park is discussed. [ABSTRACT FROM AUTHOR]
- Published
- 2004
- Full Text
- View/download PDF
12. Folded-Accumulation LDMOST: New Power MOS Transistor With Very Low Specific On-Resistance.
- Author
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Baoxing Duan, Yintang Yang, Bo Zhang, and Xufeng Hong
- Subjects
METAL oxide semiconductor field-effect transistors ,ELECTRODES ,ELECTRIC fields ,BREAKDOWN voltage ,SUBSTRATES (Materials science) - Abstract
A new lateral power MOSFET structure [folded-accumulation LDMOS (FALDMOS)] is proposed, in which the silicon-substrate surface is trenched to form a folded shape from the channel to the drain electrode and the gate is extended to the drain. The majority-carrier accumulation layer is formed as the device is in ON state due to the extended gate in the drift region whose concentration is higher than that in a conventional LDMOS at the same breakdown voltage (By), resulting from the additional electric-field modulation, and an extra majority carrier is introduced on the sidewall of the trench, which reduced the on-resistance of the drift region further. In addition, the channel density is doubled because of trenching the folded channel, which reduced the channel on-resistance. It indicates by simulation that the specific on-resistance of 4.6Ω · mm
2 with a BV of 27.4 V in FALDMOS is lower than that of the previously reported lowest one. [ABSTRACT FROM AUTHOR]- Published
- 2009
- Full Text
- View/download PDF
13. A High-Voltage LDMOS Compatible With High-Voltage Integrated Circuits on p-Type SOl Layer.
- Author
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Xiaorong Luo, Tianfei Lei, Yuangang Wang, Huanmei Gao, Jian Fang, Ming Qiao, Wei Zhang, Hao Deng, Bo Zhang, Zhaoji Li, Zhiqiang Xiao, Zhengcai Chen, and Jing Xu
- Subjects
SEMICONDUCTOR research ,ELECTRIC fields ,HIGH voltages ,INTEGRATED circuits ,SILICON-on-insulator technology - Abstract
Breakdown mechanism for a high-voltage n-channel LDMOS compatible with a high-voltage integrated circuit (HVIC) on a p-type silicon-on-insulator (SOI) layer is investigated theoretically and experimentally. The device is characterized by buried n-islands on a buried oxide layer (BOX). For the proposed structure, ionized donors in n-islands enhance the bottom-interface electric field of the SOI layer from 10 V/μm in the conventional devices on p-SOI layer to 27 V/μm, resulting in enhancement of the BOX electric field E
I from 30 to 82 V/μm. Moreover, holes located between the depleted n-islands help to increase EI as well. Both improve the blocking capability of the device. A 660-V SOI LDMOS is obtained, in which the implanted n-type drift region, along with the n-islands on a p-type SOI layer, realizes the self-isolation in HVIC. [ABSTRACT FROM AUTHOR]- Published
- 2009
- Full Text
- View/download PDF
14. Realization of High Voltage (> 700 V) in New SOT Devices With a Compound Buried Layer.
- Author
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Xiaorong Luo, Zhaoji Li, Bo Zhang, Daping Fu, Zhan Zhan, Kaifeng Chen, Shengdong Hu, Zhengyuan Zhang, Zhicheng Feng, and Bin Yan
- Subjects
SILICON-on-insulator technology ,ELECTRIC insulators & insulation ,SEMICONDUCTORS ,OXIDES ,BREAKDOWN voltage ,ELECTRIC fields ,DIODES - Abstract
A novel silicon-on-insulator (SOl) high-voltage de- vice with a compound buried layer (CBL SOl) consisting of two oxide layers and a polysilicon layer between them is proposed. Its breakdown characteristic is investigated theoretically and experimentally. Theoretically, its vertical breakdown voltage (BV) is shared by two oxide layers; furthermore, the electric field in the lower buried oxide layer of E12 is increased from about 78 to 454 V/jtm by holes collected on the bottom interface of the polysilicon. Both result in an enhanced BY. Experimentally, 762-V SO! diode is obtained. The maximal temperature of CBL SO! diode is reduced by 16.9 K because a window in the upper buried oxide layer alleviates the self-heating effect. [ABSTRACT FROM AUTHOR]
- Published
- 2008
- Full Text
- View/download PDF
15. A Novel 1200-V LDMOSFET With Floating Buried Layer in Substrate.
- Author
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Jianbing Cheng, Bo Zhang, and Zhaoji Li
- Subjects
ELECTROMAGNETIC fields ,ELECTRIC fields ,METAL oxide semiconductor field-effect transistors ,ELECTRIC breakdown ,SIMULATION methods & models ,FIELD theory (Physics) - Abstract
A novel 2-μm thin-drift-layer power MOSFET with an n-type floating buried layer (FBL) in substrate is proposed in this letter. Since the charges in the buried layer modulate the bulk electric field, a nearly uniform electric field is obtained, and the vertical breakdown voltage (BV) is significantly improved. Simulation results show that the BV of the proposed FBL lateral double-diffused MOSFET (LDMOSFET) is increased from 743 V of the conventional LDMOSFET to 1332 V with the same 100 μm drift region length. Furthermore, the figure-of-merit of the FBL-LDMOSFET is better than that of the conventional LDMOSFET. [ABSTRACT FROM AUTHOR]
- Published
- 2008
- Full Text
- View/download PDF
16. A Novel 700-V SOI LDMOS With Double-Sided Trench.
- Author
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Xiaorong Luo, Bo Zhang, Zhaoji Li, Yufeng Guo, Xinwei Tang, and Yong Liu
- Subjects
SILICON-on-insulator technology ,ELECTRIC insulators & insulation ,SEMICONDUCTORS ,ELECTROMAGNETIC fields ,ELECTRIC fields - Abstract
A novel silicon-on-insulator (SOI) high-voltage device structure with double-sided trenches on the buried oxide layer (DT SOl) is proposed and its breakdown characteristics are investigated theoretically and experimentally in this letter. Theoretically, the charges implemented in the DTs, whose density changes with the drain voltage, increase the electric field in the buried layer and modulate the electric field in the drift region, which results in the enhancement of the breakdown voltage (BV). Experimentally, the BV of 730 V is obtained for the first time in SOI LDMOS with DT on 20-µm SOI layer and 1-µm buried oxide layer. [ABSTRACT FROM AUTHOR]
- Published
- 2007
- Full Text
- View/download PDF
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