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An extended model of through-silicon via (TSV)-based solenoid inductor is proposed to save on-chip areas for 3-D radio frequency (RF) ICs and package integration. To achieve a high inductance density, the nested topology consists of high-density TSVs in high-resistivity silicon substrate and multilayers of metals in compatible CMOS process. Then, an analytical inductance model, considering the mutual inductance of TSVs and complicated metal traces, is established and verified. The inductance variation in physical dimensions is studied based on the modeled and simulated results of a TSV solenoid inductor in single tier. The proposed TSV solenoid typology gets better performance at inductance density and quality factor around some frequencies through analytical model and full-wave simulations. Further studies are directed toward RF application overview according to broadband and low power consumption.

Recent studies reported that PIG negative hydrogen ions extraction for neutron tube is superiority to positive hydrogen ions extraction. Present maturing products of neutron tube on market almost use PIG ion source and extract positive hydrogen ions. If negative hydrogen ions extraction can be applied on present products, the combination property will be greatly improved. In this study, a contrast experiment of PIG positive and negative hydrogen ion source for D–T neutron tube is put into effect. The relationships between the current of ion source, the beam current and the voltage extraction are investigated. The experiment results demonstrate that the negative ion extraction has higher yield of neutron for unit target current. We also point out that the ratio of yield to target current is a considerable parameter to reflect the overall performance of neutron tube.

In this paper, the radiated emission of a microcontroller integrated circuit is investigated by rotating the test board in a transverse electromagnetic (TEM) cell measurement. The dependence of the radiated emission on the angle of rotation is derived on the basis of the coupling between a microstrip line and the TEM cell, and then validated by the multiple-orientation TEM cell measurements in a quantitative accuracy of fitting. With the validated dependence, the radiated emissions contributed by electric and magnetic coupling are extracted. The extracted emissions are found in agreement with the measurement result by near-field scanning experiments.

With the trend of miniature, high-integrated assembly modules are common in modern industry. The measurement of the flowing current and voltage on a trace is basic for diagnosis and monitoring of these modules. The traditional contact detection method is not practical especially in conditions of high power and small space. In this paper, we demonstrate a novel method for collocated and simultaneous measurements of radio frequency current and voltage on a trace in a noncontact and movable manner. The measurements are achieved by using a compact probe with both voltage and current detectors, as well as an algorithm based on the transfer functions quantifying the capacitive and inductive couplings between the detectors and the tested trace. The proposed method is verified and applied for continuous power measurements, collocated and simultaneous measurements of transient voltage and current pulses and the dynamic voltage and current of a switching device.

A near-field scanning is usually time-consuming to map the electromagnetic field along the surface of a device. In this communication, a dual probe is proposed with a U-shaped loop to sense radio frequency (RF) magnetic and electric fields simultaneously, so that the one-time scanning by the dual probe can replace the two-time scanning by single-detector probes. Different from the traditional near-field scanning by using a single-detector probe and spectrum analyzer, the proposed scanning can be achieved by the two-output probe and a two-port vector network analyzer connecting to the probe. The efficient near-field scanning measurements of the electric and magnetic field on a conductor-backed coplanar waveguide transmission line and an RF power divider by using the dual probe are in agreement with those by using two single-detector probes.

We have investigated the debonding failure of the through-silicon via (TSV)–Cu/Si interface during annealing treatment at 425 °C. The interface microstructure was characterized by two parameters: the TSV–Cu/Si interface roughness and the Cu seed layer grain size. Scanning electron microscopy observation of the cross-section of the TSV–Cu/Si interface was performed to analyze the effect of the interface microstructure on its microcrack failure. In addition, qualitative numerical simulations were performed to investigate the effect of the TSV–Cu/Si interface roughness and Cu seed layer grain size on the overall response of the TSV–Cu/Si interface crack. The experimental results indicate that most of the TSV interfacial cracks propagate along the Cu seed layer after annealing, and the crack length of the TSV–Cu/Si interface increases with increasing interface roughness and Cu seed layer grain size. The numerical simulation is constructed to reveal the interfacial crack mechanism, and the results suggest that the stress concentration in the Cu seed layer which influence by interface roughness and Cu grains size is the main driving force for interfacial cracking. Based on the experimental and simulation results, guidelines for controlling the TSV-Cu/Si interfacial cracking from the perspective of the TSV manufacturing process are proposed.

This paper presents a noncontact radio frequency voltage sensing of a printed trace by using a capacitive-coupled probe. The noncontact voltage sensing is demonstrated by using an open-end coaxial probe, and achieved through the transfer factor from the printed trace to the probe and a reconstruction algorithm. To validate the voltage sensing, known periodic, and pulse voltages are injected into the printed trace and compared with the reconstructed waveforms. Our results demonstrate that the voltage sensing method can be used for measurement of a random waveform with period even down to 1 ns and single pulse with rise time down to 2 ns. In consideration of the flexible relocation of the probe, the voltage sensing accuracy caused by spatial errors is also investigated.

Degradation characteristics and mechanisms of AlGaN/GaN high electron mobility transistors (HEMTs) were investigated under swift heavy-ion irradiation. AlGaN/GaN HEMTs were exposed to 800 MeV Bi ions with fluence up to 5.28 × 10 10 ions/cm 2 . Post-irradiation measurement shows that the saturation drain current reduced by 15%, the maximum transconductance decreased by more than 27%, and both the positive and negative gate characteristics degraded dramatically. By the off-state examination using the Photo Emission Microscopy (PEM), electroluminescence hot spots were found in the gate areas, which indicates new leakage passages produced by heavy-ion bombardment. Micro cross sections were prepared at hot spot areas by dual-beam focused ion beam (FIB) and examined using transmission electron microscope (TEM). The presence of latent tracks throughout the whole hetero-junction area was confirmed. Latent tracks, which related to the high density ionizing energy-loss, play a role of new leakage paths and account for the increment of gate leakage. Moreover, nonionizing energy-loss induced defects decrease the charge density in the two-dimensional electron gas (2DEG) and reduce the carrier mobility, leading to the degradation of device output performances.

This paper presents the total ionizing dose (TID) radiation performances of core and input/output (I/O) MOSFETs from 130 nm partially-depleted silicon-on-insulator (PDSOI). Both the core NMOS and PMOS are totally hardened to 1.5 Mrad(Si), while the I/O devices are still sensitive to TID effect. The worst performance degradation is observed in I/O PMOS which is manifested as significant front gate threshold voltage shift and transconductance decrease. Contrary to PMOS, front gate transconductance overshoot is observed in short channel I/O NMOS after irradiation. A radiation induced localized damage model is proposed to explain this anomalous phenomenon. According to this model, the increments of transconductance depend on the extension distance and trapped charge density of the localized damage region in gate oxide. More trapped charge lead to more transconductance increase. These conclusions are also verified by the TCAD simulations. Furthermore, the model presents a way to extract the trapped charge density in the localized damage region.

In this paper, we study the orientation effect of magnetic and electric field-to-line coupling (FtLC) between a microstrip line and a TEM cell by using a square-shaped transmission line pulse as an interference source. With the detections at enough orientations, the electric and magnetic FtLCs can be extracted with high accuracy. It is found that in the TEM cell, the ratio of electric to maximum magnetic FtLC is dominated by the characteristic impedance of the studied microstrip line due to the determined value of width-to-distance. For a certain ratio of electric to maximum magnetic FtLC, there is a singular angle at which the microstrip line gives no response for any electromagnetic interference excitation. Meanwhile, at the supplementary angle, the response of the microstrip line shows no dependence on the termination load.

In this paper, the electrical properties and low-frequency noise for bipolar junction transistors irradiated by 170 keV proton are examined. The result indicates that for the sample under proton irradiation with fluence 1.25 × 1014 p/cm2, base current IB in low bias range (VBE < 0.7 V) increases due to superimposition of radiation-induced recombination current, while the gain decreases significantly. Meanwhile, the low-frequency noise increases in the proton-irradiated sample. By analysis of evolution of parameters extracted from low-frequency noise power spectra, it is demonstrated that radiation-induced noise is mainly originated from carrier fluctuation modulated by generation–recombination centers (G–R centers) located at the interface of Si/SiO2, which are introduced by proton-radiation-induced defects. It is also confirmed that the electrical properties and noise behavior of irradiated sample are mostly affected by the carrier recombination process caused by G–R centers at the interface of S...

To provide a guideline for converter design and fault protection, the failure mechanism and reliability of silicon carbide (SiC) power MOSFETs needs to be further investigated. In this paper, the failure mechanism during short-circuit (SC) of commercial 1.2-KV/19-A SiC power MOSFETs was investigated. After the SC tests, the I ds of the device decreased significantly. Moreover, it was found that the V th and I gs increased obviously. The results demonstrated that negative charges were captured by the gate oxide and accumulated during the SC tests, which is eventually causes degradation of the gate oxide. The results of this study may be useful in the design and application of SiC power MOSFETs.

Only bulk diffusion occurs in the solder joint of the monocrystalline structure without grain boundary diffusion. The migration direction of intermetallic compounds (IMCs) is mainly determined by grain orientation. Correspondingly, both bulk diffusion and grain boundary diffusion exist in the polycrystalline structure solder joints. The grain boundaries with random orientation and different lengths are distributed in the bumps, which can effectively inhibit the IMCs migration under the stressing of electron flow. The structure of lead-free solders mainly composed of Sn-based solder tends to nucleate cyclic twin structure with only two grains. The misorientation angle between the two grains is calculated to be a constant value of 57.2 degrees in this study. It is confirmed that the solder joints of the cyclic twin structure have a excellent inhibitory effect on electromigration failure.

Electromigration was characterized at the cathode Cu/solder interface&mdash, without the effect of Joule heating&mdash, by employing scanning electron microscopy (SEM) and electron backscatter diffraction (EBSD) analyses. Rapid (Cux,Ni1&minus, x)6Sn5 intermetallic compound (IMC) growth was observed at the anomalous region at the cathode end due to the effect of current crowding. The abnormal isotropic diffusion and parallel distribution of Pb were characterized in an ultra-low temperature environment in a monocrystalline structure stressed at &minus, 196 &deg, C. The interesting results were attributed to crystallographic transformation due to the simultaneous effect of cryogenic and electrical stressing. The diffusion behavior of Pb atoms in face-centered cubic lattices performed isomorphism. As a result, Pb atoms of the bump gathered at the high-energy grain boundaries by diffusing through the face-centered cubic lattices around the long grain boundary, eventually forming a long-range distribution and accumulation of Pb elements. Our study may provide understanding of cryogenic electromigration evolution of the Cu/solder interface and provide visual data for abnormal lattice transformation at the current stressing.

To deeply understand the charge trapping process in high-k gate stacks, we theoretically investigate the hole trapping characteristics of interfacial oxygen vacancies in (110) and (100) Si/SiO 2 /HfO 2 stacks. Si/SiO 2 and SiO 2 /HfO 2 interfacial defects are studied, and the hole trapping rate of each defect is calculated through ab initio simulation combining density-functional theory and Marcus theory. Among the possible hole traps considered in this work, it is suggested that the oxygen vacancies at SiO 2 /HfO 2 interface are the dominant under strong negative gate bias stress, and those at Si/SiO 2 interface can be effective traps only when hydrogen atom (H) or hydroxyl (OH) is induced at the vacancy. Moreover, the most dominant hole trap among the considered traps in the (110) structure locates at the Si/SiO 2 interface, while that in the (100) structure locates at the SiO 2 /HfO 2 interface.

Lithium sulfur (Li-S) batteries are very promising electrochemical storage system due to their high gravimetric energy density and low cost. Enormous efforts have been put on Li-S battery to achieve its commercialization. The function of electrolyte is a key issue in achieving the high performance of Li-S system, and several additives have been tried. But very few works have been working on the electrolyte optimization method with the consideration of over-all performance, including cycling stability, rate capability, especially self-discharge prevention ability, and the consideration of loading condition. In this work, we focus on the incorporation of room temperature ionic liquid (IL) as co-solvent, and the effect of IL in mitigating the polysulfide dissolution via systematical mechanism study of self-discharge phenomena. Moreover, the optimization of IL incorporation ratio is discussed for the sake of the better over-all electrochemical performance of Li-S cell by considering cycling stability, rate performance and self-discharge prevention ability, which is found to vary with loading condition. The improved understanding of the effect of IL on battery performance will help the development of electrolyte for Li-S batteries.

Displacement damage induced degradations in four-junction solar cells are investigated by electron irradiation and TCAD simulation. It shows that In0.3Ga0.7As cell is the key sub cell to affect the radiation tolerance of four-junction solar cell. Although irradiation will introduce relatively uniform displacement damage in each sub cell of four-junction solar cell, the In0.3Ga0.7As cell show the most significant degradation under the same radiation damage conditions. The radiation harness of the four-junction solar cell can be promoted by increase the short circuit current of In0.3Ga0.7As cell before irradiation, which is verified by the TCAD simulations. The relationship between electrical characteristics degradations and the displacement damage dose is established for four-junction solar cells. Then, the equivalent displacement damage dose method has been used to predict the on-orbit degradation of four-junction solar cells. The degradations of the four-junction solar cells on typical geosynchronous earth orbit are calculated by combining Monte Carlo simulations and ground irradiation test data.

In this paper, we investigated on -state electroluminescence (EL) characteristics in fresh GaN-based HEMTs under different on -state bias conditions. It demonstrated that: 1) the intensity of the on -state EL emitted by the GaN-based HEMTs with relatively high ${\rm V}_{\rm DS}$ $({\rm V}_{\rm DS}>10\ \hbox{V} )$ monotonically increased as the gate voltage increased; and 2) the distribution of the intensity of the on -state EL was uniform along the gate and across the device before stress tests. The degradation process and mechanisms of the devices in the high temperature operation (HTO) stress were also analyzed based on the on -state EL characterization, the electrical measurement, and failure analysis. It demonstrated the following. First, the on -state EL distribution of the device after step HTO (S-HTO) stress tests was no longer uniform along one of the fingers, which indicated that the degradation was related to this finger. This hypothesis was confirmed by the SEM observation after the deprocess of the gate metal and the SiN passivation layer. Second, a new degradation mechanism of AlGaN/GaN HEMTs that caused the abrupt degradation in the S-HTO stress was identified and related to the emergent, localized, and jagged crack under the gate metal. Third, there was no abrupt degradation in the long-term HTO (LT-HTO) stress test. However, the on -state EL intensity of the inner fingers in the device after the LT-HTO stress test decreased more than that of the outer fingers, which meant that the degradation of the inner fingers was faster than that of the outer fingers as a result of the higher temperature caused by self-heating in the inner region of the device. Finally, the gradual degradation in the LT-HTO stress test was ascribed to the gradual formation of structural damage along the drain side of the whole gate edge, which was confirmed by the SEM observation.

As we known, the measurement of junction-to-case thermal resistance (R th -JC) of semiconductor power devices is very important. In this paper, an approach of transient dual interface method (TDIM) with gate-source voltage (Vg s ) as the temperature sensitive electrical parameters (TSEP) was investigated for the measurement of R th -JC of packaged SiC MOSFET. The measured R th -JC value of packaged SiC MOSFET is in the range of 1.61 K/W to 1.76 K/W, and compared with the typical value of device specification, the maximum error is 5.29 %. The results show that the thermal resistance measurement of packaged SiC MOSFET by TDIM with Vg s as the TSEP is feasible, and it is of good accuracy and reproducibility.

In this paper, a simulation tool named the neutron-induced single event effect predictive platform (NSEEP2) is proposed to reveal the mechanism of atmospheric neutron-induced single event effect (SEE) in an electronic device, based on heavy-ion data and Monte-Carlo neutron transport simulation. The detailed metallization architecture and sensitive volume topology of a nanometric static random access memory (SRAM) device can be considered to calculate the real-time soft error rate (RTSER) in the applied environment accurately. The validity of this tool is verified by real-time experimental results. In addition, based on the NSEEP2, RTSERs of 90 nm–32 nm silicon on insulator (SOI) and bulk SRAM device under various ambient conditions are predicted and analyzed to evaluate the neutron SEE sensitivity and reveal the underlying mechanism. It is found that as the feature size shrinks, the change trends of neutron SEE sensitivity of bulk and SOI technologies are opposite, which can be attributed to the different MBU performances. The RTSER of bulk technology is always 2.8–64 times higher than that of SOI technology, depending on the technology node, solar activity, and flight height.

The instabilities of indium–zinc oxide thin film transistors under bias and/or illumination stress are studied in this paper. Firstly, illumination experiments are performed, which indicates the variations of current–voltage characteristics and electrical parameters (such as threshold voltage and sub-threshold swing) are dominated by the stress-induced ionized oxygen vacancies and acceptor-like states. The dependence of degradation on light wavelength is also investigated. More negative shift of threshold voltage and greater sub-threshold swing are observed with the decrease of light wavelength. Subsequently, a negative bias illumination stress experiment is carried out. The degradation of the device is aggravated due to the decrease of recombination effects between ionized oxygen vacancies and free carriers. Moreover, the contributions of ionized oxygen vacancies and acceptor-like states are separated by using the mid-gap method. In addition, ionized oxygen vacancies are partially recombined at room temperature and fully recombined at high temperature. Finally, low-frequency noise is measured before and after negative bias illumination stress. Experimental results show few variations of the oxide trapped charges are generated during stress, which is consistent with the proposed mechanism.

The polarity effect of electromigration on the interfacial reactions of micro ball grid array (μBGA) solder joints was studied in terms of microstructural evolution. A dummy μBGA package with the same pair of solder joints was used to obtain reproducible results for a practical application. The μBGA package with Ni(P)/SnPb/Ni(P) structure showed a polarity effect on intermetallic compound (IMC) formation after stress by a current density of 3.0 × 10 3 A cm −2 at 120 °C, compared to the no-current case. Electric current enhanced the growth of Ni 3 Sn 4 at the anode and retarded it at the cathode because of the change in Sn diffusion induced by electromigration. The IMC growth at the anode was about one order of magnitude faster than that at cathode. The growth of IMC at the anode had a parabolic dependence on time since the square of thickness of IMC increases linearly with time. The real μBGA package has unique and more complicated geometry compared to ordinary diffusion couples. So not only the polarity growth of IMC but also the fast dissolution of Cu and Ni at specific positions was found with the μBGA package. The unique geometry of μBGA solder joints caused heat generation at the upside interfaces due to Joule heating. Because of the heat generation and the high interfacial energy at the triple point of upside interfaces, the electroless Ni(P) finishes and Cu trace are consumed rapidly in the region where the current is crowded. Thus electromigration induced the rapid dissolution of Ni and Cu into solder and then formed (Cu,Ni) 6 Sn 5 at the triple point of the current crowding region at high temperature. This is a rapid failure process because the localized fast dissolution of Ni and Cu accelerated the solid-state reaction between solder and electroless Ni(P) or Cu trace.

Based on a method combined artificial neural network (ANN) with particle swarm optimization (PSO) algorithm, the thermo-mechanical fatigue reliability of plastic ball grid array (PBGA) solder joints was studied. The simulation experiments of accelerated thermal cycling test were performed by ANSYS software. Based on orthogonal array experiments, a back-propagation artificial neural network (BPNN) was used to establish the nonlinear multivariate relationship between thermo-mechanical fatigue reliability and control factors. Then, PSO was applied to obtaining the optimal levels of control factors by using the output of BPNN as the affinity measure. The results show that the control factors, such as print circuit board (PCB) size, PCB thickness, substrate size, substrate thickness, PCB coefficient of thermal expansion (CTE), substrate CTE, silicon die CTE, and solder joint CTE, have a great influence on thermo-mechanical fatigue reliability of PBGA solder joints. The ratio of signal to noise of ANN-PSO method is 51.77 dB and its error is 33.3% less than that of Taguchi method. Moreover, the running time of ANN-PSO method is only 2% of that of the BPNN. These conclusions are verified by the confirmative experiments.

This paper proposed a two-dimensional thermal impedance model for amorphous silicon thin film transistors (a-Si:H TFTs) from a system of coupled energy equations, heat flowing equations and boundary conditions. By using of this model, the channel temperature distribution and thus the maximum channel temperature can be calculated. This model can be applied to describe the thermal behavior and thermal reliability of a-Si:H TFTS in the design phase.

Total ionizing dose (TID) radiation effects in the bipolar voltage comparator with different biases and dose rates were investigated in this paper. The experimental results show that offset voltages shift after irradiation. Dominated by the current gain degradation of differential PNP transistors, the shifts of offset voltage and output characteristics were significantly affected by biases at high dose rate. Dominated by the current gain degradation of NPN transistors, the shifts of offset voltage and output characteristics were similar in all biases at low dose rate.

The effect of Pb content in the rang of 0∼37wt.% on solidification behavior and shear performance of Sn3.0Ag0.5Cu/Cu joint was investigated. It was shown that Pb contamination showed a significant influence on the solidification behavior of Sn3.0Ag0.5Cu/Cu joint. A little amount of Pb resulted in the formation of ternary eutectic Sn-Pb-Ag phase with a low melting temperature and a mushy region between primary solidification phase and Sn-Pb-Ag phase during solidification stage of mixed joint. The mushy zone decreased with the increasing of Pb content and disappeared when Pb content in solder matrix of joint exceeded 18.34wt.% The addition of Pb in Sn3.0Ag0.5Cu/Cu joint has been shown to be beneficial to improve the shear force of SAC/Cu joint by using ball shear test method and the shear force of single interface mixed solder joint was in parabolic relationship with Pb content. The formation of ternary eutectic Sn-Pb-Ag phase and mushy zone in solidification stage had no obvious influence on the shear force of mixed solder joint.

Firstly, the storage failure mode and failure mechanism study of the klystron was carried out, the main failure modes of klystron in storage were summarized, and the failure mechanism and failure reasons of the main failure mode were analyzed. The results of the study showed that the vacuum degree decline is the main reason for the failure in long-term storage of klystron. The vacuum degree decline of tube is due to the residual gas of in seal manufacturing process or the deflation and shell leakage of the tube during the period of storage. Secondly, the generation process of residual gas was studied. At last, a failure sample of long-term storage klystron was analyzed; results showed that the failure mechanism was due to a large number of evaporation the cathode emission material which induced the serious degeneration of cathode, then the cathode emission current reduced and the out power declined. The reason of cathode degradation was vacuum degree decline in long-term storage process, ions back to the cathode surface that caused the huge evaporation of cathode emitting material.

When the Minimum channel length shrink to 0.13μιη, As the device geometry size scaling down while the operation voltage of the device decreased, but the electric field increase. The current density is still high in interconnect line, various failure mechanisms still exist in the process generation of copper interconnect/low k dielectric integrated, the reliability is still a very important problem. By using accelerated test, the reliability of the main failure mechanisms have been evaluated, the results showed that the lifetimes of main failure mechanism can achieve the requirements of more than 10 years lifetime. In the same time, NBTI effect will become the main failure mechanism in ultra deep sub-micron CMOS process when Minimum channel length becomes less than 0.13 μιη.

We have submitted the AlGaN/GaN High electron mobility transistors (HEMTs) to the high temperature reverse bias(HTRB) stress to assess their reliability for high voltage operations. The effects of HTRB stress as a function of the V DG and stress time on the DC parameters and trapping effects were investigated. The study was based on combined DC and pulsed characterization, transient measurement. It provides the following information: 1) the exposure to HTRB may result in a permanent degradation in on-state current, the transconductance, and a slightly positive shift of threshold voltage; 2) the high temperature (T A =175°C) step reverse bias (V DG stepped from 20V to 80V) stress tests revealed that the gate leakage current I GS increased abruptly after 50V stress voltage V DG ; 3) interestingly, the long term high temperature moderate reverse bias(V DG 40V) stress resulted in some positive effects such as the decrease of gate leakage current, improved gate lag characteristics and the decrease of current collapse in pulsed measurement during the whole test; 4) the reverse-bias voltage is the key factor but for reliability assessment of AlGaN/GaN HEMTs for high voltage application based on HTRB stress; 5) The degradation mechanism of the gate leakage current under relatively high voltage HTRB test has been ascribed to the degradation metal and semiconductor interface; 6) the improved I-V characteristic under moderately voltage HTRB test has been attributed to the reduction of lateral tunneling current.

Along with the infrared technical rapid development, infrared radiation (IR) thermal imaging technology is widely applied in device and circuit reliability research. For device and circuit reliability study, IR thermal imaging technology is best for getting the peak temperature and temperature distribution. With the peak temperature and temperature distribution, the thermal information of the devices were evaluated and optimized to meet the design requirement. Secondly, IR thermal imaging technology is used to position hotspot for failures analysis, example for especially increases in elevated leakage currents. However, IR thermal imaging technology can provide evidence of excessive temperature rise due to power dissipation. It can identify root-cause of failures at temperatures below expectations.

This work aims to characterize the microstructure and temperature field of the hermetic packaging structure by welding the cover made of Kovar alloy and the base made of a low-carbon low-alloy steel (i.e., #10 steel) using parallel seam welding (PSW) process. The microstructure of welded joints and distribution of elements were analyzed by scanning electron microscopy (SEM) equipped with energy dispersive spectrometer (EDS). Welding mechanism of PSW is discussed and temperature field of PSW is studied by a nonlinear transient finite element analysis. In FEM simulation, the surface contact pair is created to form weld beam and the heat generated by a pulse current is taken as a moving heat source. The results show that the maximum temperature in the weldment is 1105.3 °C, which is below the melting point of Kovar alloy and #10 steel (both in 1400∼1500°C). The cross-sectional microstructure analysis results of the welded joint show that welded junction is localized between the plating layers of two base materials, both Kovar alloy and #10 steel did not melt during the welding process. Numerical simulation value of the temperature at the plating coat layer on Kovar side is larger than that on #10 steel because of boundary conditions and thermal conductivity. Same phenomenon can be seen at the location 3 mm away from the weldment. The temperature on the node of Kovar with a distance of 5 mm from the weldment is 796 °C.

The total-dose-induced edge effect in SOI NMOS transistors with different layouts is presented. Experimental results show that the edge effect is very sensitive to their layouts. Among the transistors hardened by design, the H-gate and ringed-source transistors do not behave as expected. At high radiation doses, the edge leakage currents appear for both transistors. Compared to the unhardened two-edged transistor, their total-dose-induced edge leakage paths and the role of layouts on edge effect are discussed.

Inherent reliability of Surface acoustic wave filters plays a key role for its application in the mobile communication systems. Construction analysis is an effective method for evaluating the inherent reliability of electronic components. This work provides a construction analysis process for the surface acoustic wave filters, which includes external encapsulation analysis, internal encapsulation analysis and chip-level analysis. The results show that oxidation occurs on the upper surface of the Al electrodes and leads to the formation of Al2O3. The break in the Al electrode stripe is observed.

Electromigration has a potential to be used as a process for microstructural design in ultrafine interconnects such as TSVs and microbumps. This study investigates the relationship between the electromigration and the microstructural evolution in a Cu/Sn-microbump/Cu structures through a modeling and simulation approach. The electromigration-induced polarity effect on the interfacial Cu6Sn5 and Cu3Sn compounds as well as the acceleration of the Cu pad consumption are found, as previously reported in experimental studies. In addition, the simulation results predict that the Cu6Sn5 grains at the anode become finer when an current is applied. The polarity effect is weaker when the pad size increases from 10 μm to 20 μm. In the larger microbump, the growth of the interfacial Cu6Sn5 is slower, while the growth of the interfacial Cu3Sn and the consumption of the Cu pad is faster. The growth of the interfacial IMCs and the consumption of the Cu pad at both electrodes are faster in the hourglass-shaped microbump. The interfacial Cu6Sn5 layer at the anode in the barrel-shaped microbumps appears to be convex, while concave in the hourglass-shaped microbump. The polarity effect becomes more pronounced when bulk Cu6Sn5 grains in the Sn microbump are dissolved and redeposited onto the interfacial Cu6Sn5 at the anode. The bulk Cu6Sn5 grains are predicted to migrate towards the anode driven by the electric current.

Total Dose ionizing radiation response of substrate PNP transistors have been investigated as functions of biases and dose rates. The experiment result shown that emitter-base junction bias dominates dose rate effects in the SPNP transistors. By considering of radiation induced interface traps and oxide trapped positive charges, the degradation mechanisms have been discussed based on space charge model. In addition, the worst case biases in the SPNP transistor with different dose rates are also discussed in this paper.

This paper proposed a physical model for reverse subthreshold currents in the amorphous silicon thin film transistors. Firstly, an approximation for the band bending in the back interface as a function of gate-source voltage is derived. By considering of deep states, a current model based on electron conduction in the back channel is then developed. Finally, the proposed model was verified using the experimental data.

This paper investigates the total dose effects of substrate PNP transistors through experiments. By considering of oxide trapped positive charges and interface traps, the radiation induced excess base current in the irradiated SPNP is simulated. The simulation results showed similar trends with the experimental results, thus the mechanisms of total dose effects in the SPNP transistors are verified.

An investigation of thermal effects in a high power 3-5μm solid state laser pumped with different pump beam transverse profiles is carried out by COMSOL software based on the finite element method, and the temperature of the crystal center where the Super-Gaussian distributed light projected area is 81.8°C, and is bigger than that of Gaussian pump light mode and top plane pump light mode.

Total dose dependence of bias current and offset voltage in the linear operational amplifier μA741 with different bias is presented in this paper. The experimental results show that the bias current in the μA741 with grounded bias is significantly affected by the degradation of the differential input transistors. In addition, the offset voltage is affected by the degradation of bipolar transistors of the current source in the differential input stage.

In this paper, effect of bias dependence of substrate NPN (SNPN) transistors on total dose radiation is investigated. By considering of bulk field and fringing electric field in the oxide, the degradation mechanisms are discussed in numerical simulations. Experimental results show that the applied emitter voltage and the emitter-base junction bias play important roles in the total dose irradiation effect of SNPN transistors, which is agreement with the theoretical analysis.

With the increase demand of high power, high efficient and good beam quality solidstate lasers, thermal management become more important for the lasers. Thermal resistance between laser crystal and heat sink can be effectively reduced by soldering technology, but the technology might induce huge heat stress. In order to solve the problem, finite-element method was used to analysis the stress and thermal resistance. Moreover, a practicable structure was also designed and calculated in this study. Keywords-lasers crystal rod; thermal stress; thermal resistance; Soldering technology

High power laser diodes have found wide spread applications as pump sources for solid state lasers or in direct material processing. Due to the high electrical and optical power densities in the laser structures the reliability is still questionable. We report on lifetime testing of a high power cm-bar arrays using an automated diode array reliability experiment. This computer controlled setup operates the cm-bar array 24 hours a day, and three groups of different operating condition aging test were carried on. Analysis of the aging data suggest that the extrapolated lifetime of cm-bars at 25°C can reach 7950 hours (2.86×109 shots).

The miniaturization of solder interconnects may lead to the excessive growth of brittle intermetallic compounds (IMCs) at the interface of solder joints, and this has brought serious reliability concern to flip chip (FC) and ball grid array (BGA) packages, in particular for the drop impact reliability of the solder joints in portable electronic products. In this study, the lap-shear behavior and critical factors affecting the drop impact performance of single BGA structure Cu/Sn-3.0Ag-0.5Cu/Cu joints with different standoff heights (or volumes) were characterized. The experimental results show that the shear strength change of joints with standoff height exhibits a parabolic trend regardless of the shear loading rate, and the thermal aging can deteriorate the joints' strength significantly. The failure position of the joints changes from the middle of the solder matrix to near the interface with increasing standoff height regardless of the shear loading rate and isothermal aging treatment. It seems that the drop resistance of small joints is only slightly influenced by the isothermal aging and loading rate. In addition, the probability of brittle fracture of the joints with 0.50 mm standoff height increases with increasing the loading rate and undergoing isothermal treatment. The geometry of the joints (standoff height) plays a dominant role in influencing the joints' properties. While the interactive effect of the evolution of microstructure and standoff height results in the different brittle fracture modes of the joints after undergoing isothermal aging at 125°C.

Oxide trapped charges which were produced in oxide area of MOSFET in the process of using can cause ESD characteristic changed. So the gate forced given bias to Simulate oxide trapped charges. In this paper, TLP test method was used to study the ESD parameters of NMOSFET with various gate biases. It was indicated that the threshold voltage V t1 and secondary breakdown current I t2 first increased and then decreased with the gate voltage increasing, but the maintained Voltage V sp essentially unchanged.

In order to understand the vibration characteristic of plastic BGA solder joints, the test vehicles with daisy chain were designed, vibration reliability test platform and real-time monitoring platform were developed, a series of vibration test including sweep vibration at different levels and random vibration were conducted, and the comparative study for experiments and simulation results was carried out. And the effect of void and pad type on the maximum vibration stress of solder joint was studied. The results showed the relation between deformation of test vehicle and input accelerator represented nonlinear characteristic. The failure of solder joint was occurred firstly in the PBGA which was located on the center of board due to the maximum deformation. The solder joint failure presented the character of solder joint crack, and the crack was initiated at the soldering interface close to solder joint outmost on BGA side and propagated to the internal of solder joint. It can be known that the soldering interface close to SMD pads on BGA side had higher stress concentration and poorer adhesive strength, NSMD solder pad is useful to raise the vibration reliability of solder joint, and maximum stress of solder joint have few sensitive for the changing of solder pad thickness. The phenomenon was validated in the cross-section results. The soldering voids were easy to induce the stress concentration around the voids.

In order to explore the influence of various fixation method on vibration fatigue reliability of high density PCB assembly, a three-dimensional simulation model which was almost completely in keeping with test samples was created, and the modal parameters were obtained through modal test and finite element method respectively. Based on the verification of FEM Model correctness, through designed different fixation methods, random vibration finite element simulation was being done, and vibration parameters were picked up and analyzed. The result showed that more PCB fixations could increase the first frequency, decrease the deformation of PCB. Under the same conditions, the order of the first frequency of the PCB Assembly with different fixation methods is: one end fixation

In order to explore the influence of solder joint parameter on vibration fatigue reliability of high density PCB assembly, a three-dimensional simulation model which was almost completely in keeping with test samples was created, and the modal parameters were obtained through modal test and finite element method respectively. Based on the verification of FEM model correctness, through designed different solder joint parameters, such as height, diameter, and material, and based on GJB-150.16-86 vibration test standard, random vibration finite element simulation was being done, and vibration parameters were picked up and analyzed. The result shows that more PCB fixations could increase the first frequency, decrease the deformation of PCB. Moreover, solder joint stress and strain decreases with solder joint height decreasing and diameter increasing, but when height and diameter reaches a certain value, stress and strain will almost keep constant. Under the same conditions, the order of the strains of the joints is: lead solder joints (Sn63Pb37) > mixed solder joints (79% SAC and 21% SnPb) > lead-free solder joints (SAC305). Consequently, more PCB fixations and solder joints which have smaller height, larger diameter or have lead-free will decrease stress and strain of key positions of PCB assembly, and BGA (ball grid array) devices should be placed near the region which has more fixation positions. Finally, based on stress and strain failure criteria, it can make some references for predicting and optimizing random vibration fatigue life of solder joints, guiding BGA layout and selecting solder joints.