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We demonstrate a W-band bolometer based on a platinum nano-strip which is integrated with a waveguide probe on a polymer substrate. We measure a high thermal response of 49000 K/W thanks to the small size of the Pt resistor and the thermal properties of the polymer. Furthermore, its small thermal capacity allows to decrease the time constant to 2.2 ms. A good matching in the entire W-band is achieved by a careful design of the probe. The linearity of the bolometer is demonstrated over 4 decades of RF power. As it is based on traditional microelectronic fabrication techniques, all dimensions of the circuit can be easily reduced to design full-band bolometers for smaller waveguides and higher frequency band up to the THz.

We report a 94-GHz large-signal load-pull characterization of InP/GaAsSb double heterojunction bipolar transistors. The investigated devices have an emitter area of 0.20 × 9.5 μm2. Biased for highest power added efficiency (PAE), an output power of 6.62 mW/μm2 (11 dBm), a power gain of 5.2 dB, and a PAE of 27.7% have been obtained. Biased for highest output power, 10.26 mW/μm2 (12.8 dBm) has been achieved without significant degradation of the PAE (25.2%) and the power gain (4.5 dB).

International audience; We have developed an adjustable Interferometer combined to a Scanning Microwave Microscopy (ISMM) to characterize the impedance of thousands of nanocapacitors. The adjustable interferometer allows the choice of the interference frequency within ± 50 MHz as well as the choice of the impedance range where the interference occurs. Calibration is investigated using metal-insulating-semiconductor capacitances. The ISMM allows quantitative characterization of tiny capacitors with size reaching sub-10 nm and capacitance value around the aF with a limit of resolution of about 0.5 aF at 7.8 GHz. A water meniscus parasitic capacitance is introduced to explain the discrepancy between measured and theoretical values over the 5 to 100-nm nanodot diameter range. The ISMM allows also measuring tunnel junctions made with very thin Al2O3 dielectric layers.

Far-field terahertz imaging is limited by diffraction to low resolutions in the 50 μm range. On the other hand, near-field optical nanoscopy is a recent technique that shows permittivity contrasts at the nanoscale. We present here images of graphene layers on SiO2 obtained by scattering scanning near-field nanoscopy at 2.5 THz that show high contrasts.

International audience; We show that the capacitive transduction of a MEMS device using a setup based on a microwave detection scheme achieves the measurement of the thermomechanical noise spectrum of a high-frequency (>10 MHz) high-stiffness (>10 5 N/m) resonator, reaching the outstanding displacement resolution of 1 fm/√Hz. This result paves the way for vibrating sensors with exquisite force resolution in the fN/vHz range, enabling large-bandwidth measurements of mechanical interactions at small scale and rheology of fluids at very high frequency. An example of application is given and concerns atomic force microscopy images of biomolecular assemblies.

This letter reports the first millimeter-wave power demonstration of AlGaN/GaN high-electron-mobility transistors grown on a (110) silicon substrate. Owing to an AlN/AlGaN stress-mitigating stack and in spite of the twofold surface symmetry of Si (110), it is possible to obtain crack-free GaN layers for the fabrication of millimeter-wave power devices with high performance. The device exhibits a maximum dc drain current density of 1.55 A/mm at VGS = 0 V with an extrinsic transconductance of 476 mS/mm. An extrinsic current gain cutoff frequency of 81 GHz and a maximum oscillation frequency of 106 GHz are deduced from Sij parameters. At 40 GHz, an output power density of 3.3 W/mm associated with a power-added efficiency of 20.1% and a linear power gain of 10.6 dB is obtained.

A report is presented on the first microwave power performances of high-k metal gate 28 nm CMOS devices. Measurements were performed in a large signal operation based on a nonlinear vector network analyser associated with a passive tuner at 10GHz. First, the behaviour of these high-k metal gate 28 nm CMOS devices was analysed in A-class operation. Then, the maximum withstandable drain voltage (before device destruction) was determined for various topologies. Finally, a comparison between this new technology and the usual CMOS 45 nm technology was exposed.

International audience; A GaN Schottky Diode-based Analog Phase Shifter MMIC of T-topology has been designed for 35 GHz operation. An all E-Beam technology was employed for MMIC realization. The measured, as well modeled small and large-signal diode characteristics were used for evaluating the phase-shifter performance in view of its potential for robust power operation. The phase shifter presents analog phase shifting capability up to 45 degrees with similar to 7 dB insertion loss and a maximum VSWR of 2: 1 in the 32 to 38 GHz range. Good power handling capability and robust performance is demonstrated through large signal analysis and experimental characterization.

We report about the self-heating management of an InP double heterojunction bipolar transistor (DHBT) by the way of the thermal resistance. In order to reduce this latter, an AlInP/GaAsSb DHBT has been transferred on a silicon substrate offering a high thermal conductivity. According to our thermal resistance measurements on a 0.8 × 6 μm 2 DHBT, a low thermal resistance of 1625 K/W is obtained, 65 % lower than for the same device fabricated on its own substrate of InP and which exhibited a value of 4452 K/W.

Taking advantage of a recently developed 20GHz six port mixer based nonlinear vector network analyzer (NVNA) prototype able to measure three frequencies simultaneously, the time domain tension and current waveforms are reconstructed at each chosen pulse of a non periodic pulse train starting from first pulse. This new instrument is used to study the influence of realistic radar pulse train on a 5W S-band GaN on silicon HEMT transistor.

We report on AlN/GaN double heterostructures for high frequency applications. 600 hours preliminary reliability assessment has been performed on these emerging RF devices, showing promising millimeter-wave 100 nm gate length GaN-on-Si device stability for the first time. A 150 nm AlN/GaN double heterostructure has been developed and evaluated on SiC substrate. State-of-the-art CW power-added-efficiencies (PAE) at 10 and 18 GHz have been achieved on ultrathin barrier (6 nm) GaN devices while operating at a drain bias exceeding 30 V.

A six port mixer based 20GHz nonlinear vector network analyzer (NVNA) dedicated to the characterization of radar power amplifier driven by non periodic pulsed signal is proposed. For the first time a mixer based NVNA is able to measure the fundamental and two harmonics simultaneously while using non periodic radar pulse train allowing measuring time domain waveforms and pulse to pulse measurement within actual radar conditions. The measurement is applied on an S-band 5W GaN on silicon HEMT.

A measurement of time domain waveforms using a commercial two ports mixer based NVNA to measure a non periodic repetitive radar pulse train as a periodic one was performed. Then for the first time a 20GHz six port mixer based NVNA able to measure three different frequencies at the same time is designed and validated. This instrument allowed us to overcome the imprecision caused by the sequential measurements of the different tones that arise when the device under test present a highly unstable pulse to pulse behavior which is common in radar functioning conditions. It was possible to catch the non linear behavior of a device within a truly non periodic predefined pulse train. The measurements are performed on an S-band 5W GaN on silicon HEMT.

Microwave frequency capabilities of AlGaN/GaN high electron mobility transistors (HEMTs) on high resistive silicon (111) substrate for power applications are demonstrated in this letter. A maximum dc current density of 1 A/mm and an extrinsic current gain cutoff frequency (F/sub T/) of 50 GHz are achieved for a 0.25 /spl mu/m gate length device. Pulsed and large signal measurements show the good quality of the epilayer and the device processing. The trapping phenomena are minimized and consequently an output power density of 5.1 W/mm is reached at 18 GHz on a 2/spl times/50/spl times/0.25 /spl mu/m/sup 2/ HEMT with a power gain of 9.1dB.

International audience; We present the operation of microwave power limiters based on reversible phase transition of vanadium dioxide thin films integrated on coplanar waveguides submitted to incident pulsed peak power at 10 GHz. During the pulse on-time, the fabricated devices can be reversibly driven by the incident signal from a high transmission state to a low-transmission level on a relatively short timescale (response times as low as 4 microseconds for incident peak powers of 35 dBm). The broadband operation and the simplicity of fabrication and integration of these devices, their potential for faster response times, make them attractive as protective devices against continuous or transient RF power.

The paper proposes a novel technique for measuring the vibration of capacitive microelectromechanical resonators. Based on microwave reflectometry in the gigahertz range, the technique offers signal-to-noise ratio greater than 100 dB for the studied device and it rejects any parasitic crosstalk due to stray capacitances. Experiments demonstrate that amplitude resolution better than 10 fm/√Hz is achieved, which competes with standard optical interferometry. The technique is particularly appropriate for electrical characterization of MEMS devices but also for signal processing of resonant sensors when large-bandwidth, high signal-to-noise ratio and fully electrical detection is required.

This paper reports on the first RF microwave power characterization of High-k metal gate 28 nm CMOS devices. Measurement was performed on Load-pull configuration using a Nonlinear Vector Network Analyzer (NVNA) associated with a passive tuner at the fundamental frequency of 10 GHz. Behavior of these High-k metal gate 28 nm CMOS was analyzed on large signal conditions in class A operation. The maximal drain voltage withstanding was determined for various topologies. Transistors behavior was analyzed for optimal load impedance condition in terms of microwave output power and power added efficiency. Finally, a comparison with the standard 45 nm CMOS was achieved.

We report on an emerging GaN double heterostructure grown on silicon, which enables the simultaneous achievement of high breakdown voltage and high frequency performance. The use of an AlN barrier layer capped by an in situ SiN layer, and the introduction of an AlGaN back barrier layer in addition to standard field plates enabled the achievement of a remarkable three-terminal breakdown voltage VBK of over 100 V together with a power gain fmax above 200 GHz for the first time on GaN devices grown on silicon substrates. This results in a record combination of fmaxVBK of above 20 THz V, promising breakthrough performance for widespread millimeter-wave applications.

International audience; We report on an adjustable interferometric set-up for Scanning Microwave Microscopy. This interferometer is designed in order to combine simplicity, a relatively flexible choice of the frequency of interference used for measurements as well as the choice of impedances range where the interference occurs. A vectorial calibration method based on a modified 1-port error model is also proposed. Calibrated measurements of capacitors have been obtained around the test frequency of 3.5 GHz down to about 0.1 fF. Comparison with standard vector network analyzer measurements is shown to assess the performance of the proposed system.

In this paper, an emerging double heterostructure high electron mobility transistor (DHFET) based on AlN/GaN/AlGaN grown on silicon substrate is presented. This configuration system allowed state-of-the-art GaN-on-silicon DC, RF output power and noise performances at 40 GHz, paving the way for high performance mmW cost-effective amplifiers. Preliminary reliability assessment has been performed on this new class of RF devices, showing promising mmW GaN-on-Si device stability for the first time.

In this work, the possibility of achieving GaN-on-Si devices for millimeter wave applications operating at high bias is demonstrated. It is shown that highly scaled AlN/GaN-on-Si double heterostructure enables us to significantly improve electron confinement under high electric field as compared to single heterostructure while delivering high carrier density (>2 × 1013 cm−2). Subsequently, trapping effects can be minimized resulting in the highest GaN-on-Si output power density up to 40 GHz and at a drain bias of 15 V together with a record fmax close to 200 GHz. At higher bias, infrared camera analysis clearly shows that these devices are mainly limited by self-heating effects. Furthermore, low noise figure has been assessed on this heterostructure, promising integration of cost effective low noise and high power millimeter wave amplifiers.

E-Beam processed GaN-based Schottky diodes for microwave, millimeter-wave power applications were characterized under both small-signal and large-signal conditions. A Large-Signal Network Analyzer was used and equivalent circuit models were obtained by combining small signal S-parameter data with large-signal time-domain waveform optimization. The impact of anode diameter size and layer design were investigated and the active layer thickness dependence of the intrinsic elements was analyzed. Large-signal measurements allowed device non-linearity evaluation.

In this paper, an emerging double-heterostructure high-electron mobility transistor based on AlN/GaN/AlGaN grown on silicon substrate is presented, which enables a unique simultaneous achievement of high breakdown voltage and high frequency performance. This configuration system allowed state-of-the-art GaN-on-silicon dc, RF output power, and noise performances at 40 GHz, paving the way for high-performance millimeter-wave (mmW) cost-effective amplifiers. Preliminary reliability assessment has been performed on this new class of RF devices, showing promising mmW GaN-on-Si device stability for the first time.

In this letter, high-output-power-density GaN-based high-electron-mobility transistors grown on a 100-mm silicon substrate is demonstrated for the first time at 40 GHz. The use of an optimized double heterostructure based on ultrathin barrier AlN/GaN allows both high current density and low leakage current, resulting in high-frequency performance (f max close to 200 GHz). Furthermore, the control of the trapping effects on these highly scaled devices enabled to set a first benchmark at 40 GHz with 2.5 W/mm at V DS = 15 V, mainly limited by RF losses and thermal issues. These results show that an AlN/GaN/AlGaN heterostructure grown on silicon substrate is a viable technology for cost-effective high-power millimeter-wave amplifiers fully compatible with standard Si-based devices.

In this letter, we report load pull measurements on SiGe HBTs at 94 GHz. Nowadays, this kind of device exhibits FMAX above 400 GHz and thus has a growing interest for W-band applications. A load pull test bench is developed for the characterization of this device with special care on architecture and calibration procedure for accurate measurements in 75-110 GHz. The device was characterized under large signal operation showing attractive performance for power amplifier design. A state-of-the-art power density of 18.5 mW/μm2 at 1-dB compression has been obtained at 94 GHz.

We report on the dependence of trapping effects on electron confinement in ultrashort AlN/GaN-on-Si high-electron-mobility transistors grown on 100 mm silicon substrates. The use of a back barrier allows a drastic reduction of the current collapse while offering high current density and high voltage operation, which resulted in excellent RF power performance at 18 GHz. The possibility to achieve sub-100-nm-gate-length GaN-on-Si devices with low RF dispersion under high bias is also demonstrated for the first time, promising breakthrough performance of GaN-on-Si technology in millimeter-wave applications.

The piezoelectric actuation of a micro-electro-mechanical system (MEMS) resonator based on an AlGaN/GaN heterostructure is studied under various bias conditions. Using an actuator electrode that is also a transistor gate, we correlate the mechanical behaviour to the two-dimensional electron gas (2DEG) presence. The measured amplitude of the actuated resonator is maximum at moderate negative biases and drops near the pinch-off voltage in concordance with the 2DEG becoming depleted. Below the pinch-off voltage, residual actuation is still present, which is attributed to a more complex electric field pattern supported by quantitative modelling. The results confirm that epitaxial AlGaN barriers are fully adapted to the piezoelectric actuation of MEMS.

We report on the millimeter-wave noise performance of AlN/GaN/AlGaN double heterostructure (DHFET) grown on a 100-mm Si substrate with low-noise properties up to 40 GHz. The ultrathin-barrier GaN DHFETs simultaneously exhibit high current density, high transconductance, and high frequency performance (above 100 GHz) while showing low dc-to-RF dispersion and low gate and drain leakage currents. Consequently, sub-1-dB minimum noise figure at 36 GHz with an associated gain of 7.5 dB has been achieved. To our knowledge, this is the best noise performance reported in the Ka-band for any GaN device.

1-Introduction: Thin-body MOSFET architectures associated to upcoming technology nodes are expected to deliver a higher current drive at shallower junction depth and reduced silicide thickness. As a result, extremely severe constraints are placed on the junction and contact technologies. One alternative is to use silicided metallic contacts that present a very low effective Schottky barrier height (SBH) to electrons and holes for n-type and p-type MOSFETs, respectively. Considering that the equivalent SBH should not exceed 0.1 eV in order to position SBMOSFETs advantageously with respect to conventional technology [1], low temperature dopant segregation (DS) at the Schottky interface has emerged as a sound technological solution. The most advantageous methodology is to combine a band-edge silicide to its appropriate dopant type. In that way, p-type MOSFETs with boron segregated PtSi contacts have been demonstrated [2]. Conversely, a conduction band-edge silicide coupled to segregated donor impurities is desirable for n-MOSFETs [3]. However, this last approach faces two major obstacles: i) the integration of a second silicide material and ii) difficulties to process high quality rare-earth silicides layers [4-5]. Although, a material like PtSi that presents a large SBH to electrons is theoretically not attractive for n-MOS devices, it proved to produce a near 0.1eV when combined to As segregation [6]. Following this integration route, 0.35μm gate length MOSFETs of both polarities were also integrated [6]. Although dopant segregated contacts in complementary MOS were previously published based on midgap silicides [7-8], implantation before silicidation (IBS) and high temperature activation suppressed the advantage of low temperature processing. In this paper, As and B segregated PtSi contacts are integrated in the socalled implant-through-silicide (ITS) flavour down to 70 nm of gate length. Functional elementary inverters are demonstrated in both DC and transient modes. 2SB height modulation: experiments and characterization: Dedicated test structures consisting in two silicided backto-back junctions separated by a micrometer gap have been fabricated on n-type (100) Si wafers. Starting from a 20 nm thick Pt layer, the subsequent silicidation reaction was activated by rapid thermal annealing (RTA) at 350°C for 3 min before As implantation at 20 keV with a dose of 10 cm. A RTA post-anneal activates the mechanism of As segregation. SIMS profiles show how arsenic accumulates at the PtSi/Si interface when the post annealing temperature increases from 400 to 700°C. It is observed a sharp As peak concentration around 4 10 cm at 500°C and above. The accurate extraction of SB heights is based on a procedure which gives a precise extraction of extremely low SBH by coupling experiments data from diode structures with a transport model including thermionic, tunnel emission and barrier lowering due to image charge induction [9]. SBH below 80 meV for nand p-type are obtained with activation at 600°C. 3n-MOS performance and CMOS integration: The Ids-Vgs characteristic shows how arsenic segregated PtSi source/drain improve operation when a post silicidation threshold temperature of 600°C is reached. Such thermal activation provides a SBH to electrons of 70meV which do not limit carrier injection as illustrated by the Ion vs Lg trend line. It is also demonstrated that the As-DS junctions do not degrade the subthreshold swing and DIBL. A comparison to the state-of-the-art of metallic Schottky S/D n-MOSFETs places the Assegregated ITS scheme with PtSi in a competitive position. Only particular channel architectures (i.e. FinFET) outperform the presented results. Arsenic (nMOS) and boron (p-MOS) segregated PtSi junctions have been integrated in a single low temperature (600°C) process and CMOS inverters have been successfully fabricated. Based on Ids-Vgs and Ids-Vds characteristics of 70 nm gate long nand p-MOSFETs, current drives for nand p-type devices of 596/378 μA/μm at VDD=1.1V (with |Vg|=2V to account for the 2.4 nm gate oxide thickness) have been obtained. Based on the above devices, inverters with nearly ideal DC voltage transfer characteristics and large voltage gains have been obtained down to 0.5V of supply voltage with excellent noise margins (~VDD/2). The dynamic response at 10 MHz of a 70nm CMOS inverter shows excellent regenerative properties. 4Conclusion: This approach provides a low temperature S/D module suitable for a viable and low-cost manufacturing approach for future CMOS technology nodes. In summary, one major improvement compared to the conventional ohmic contact is to reach similar performance with a huge process simplification. Conventional transistor architectures in the sub-22nm regime require junctions with ultrasharp doping concentration gradient. This imposes the development of very sophisticated annealing techniques and also leads to tight thermal constraints on constituent materials. Conversely, the proposed integration scheme can be qualified as a cold process, without high temperature dopants activation, that leverages many constraints associated to the integration of innovative gate stacks comprising high-K dielectric and metal gate.

Nowadays with capabilities offered by advanced silicon technologies both for design above 60GHz and for high performance Digitally Controlled Oscillator, the use of sub fF varactor is mandatory. One of the challenge to develop this device is to be able to characterize it accurately for process optimization and modeling. In high and above all low frequency range, this type of measurement has to face with the issue of high impedance characterization and mismatch regarding 50Ω. In the RF range, Agilent is developing an interferometer module added to a VNA able to characterize very low capacitance. In this paper, we evaluate this equipment using dedicated calibration silicon structures to measure 500aF MOS varactor and compare measurement to developed electrical model.

In this letter, ultrathin-barrier AlN/GaN high-electron mobility transistors (HEMTs) capped with in situ metal-organic-chemical-vapor-deposition- grown SiN have been successfully fabricated on 100-mm Si substrates. Output current density exceeding 2 A/mm has been reached, which represents, to the best of our knowledge, the highest value ever achieved for GaN-on-Si HEMTs. This results from the high 2DEG density of the optimized AlN/GaN heterostructure. Despite the ultrathin barrier of 6 nm, low gate and drain leakage currents of about 10 μA/mm are obtained without the use of a gate dielectric that generally induces reliability issues. Furthermore, the high aspect ratio (gate length Lg/gate-to-channel distance) and low RF losses (at the buffer/Si substrate interface) are reflected in excellent RF performances. The current gain extrinsic cutoff frequency fT and the maximum oscillation frequency f\max were 52 and 102 GHz with a 0.2- μm gate length, respectively, resulting in an fT Lg product as high as the reported state-of-the-art GaN-on-Si HEMTs.

AlN/GaN heterostructure is an ideal candidate to push the limits of microwave GaN-based devices owing to the maximum theoretical spontaneous and piezoelectric difference between the epitaxial AlN barrier and the underlying GaN layer. If the tricky growth conditions of this binary can be controlled, AlN/GaN HEMTs promise breakthrough performances, superior to any other III-V nitride-based heterostructure [1]. In particular, this structure should allow the extension of the GaN-based frequency operation due to the possibility to significantly reduce the gate length while maintaining an appropriate gate-to-channel aspect ratio to mitigate short channel effects. However, gate leakage current remains a serious issue with such ultrathin barrier heterostructure and gate dielectrics that often leads to device instability are generally used to overcome this problem. Furthermore, there is an increasing interest in the growth of GaN-on-Si substrates because of its low cost, large size, good thermal conductivity and the potential for integration with Si-based devices. In this work, we developed a novel AlN/GaN HEMT technology on Si substrate. The highest GaN-on-Si drain current density as well as a record transconductance together with excellent RF performance have been achieved. Additionally, AlN/GaN HEMT power measurements at 18 GHz have been performed for the first time. These results show the outstanding potential of this structure to extend GaN-on-Si performances to millimeter wave applications.

International audience; A TEM horn antenna is integrated with a uni-travelling-carrier photodiode. Its radiation pattern is measured from 280 to 540 GHz thanks to a 1.55 μm photomixing set-up and a sub-harmonic mixer. The direction the main lobe shifts to a lower incidence when the frequency is increased.

This paper presents the RF power performances of nLDMOSFETs fabricated on bulk and SOI substrates and the layout changes made to improve these performances. It is shown that simple design rules modifications can be done to increase f max , by reducing the gate resistance, without penalizing f T . A significant improvement of both the output power P out and the power added efficiency PAE is demonstrated in A and AB classes.

International audience; We report on-wafer measurements of planar transmission lines on quartz substrate at J-band. We have fabricated and characterized as well CPW than Planar Goubau-Sommerfeld Lines (PGSL) up to 325 GHz. The transmission level is relatively good for straight PGSL but we can notice higher losses for structures with two 90deg-bendings. Different metallization have also been used for the study of metallic losses. The plasmon launcher efficiency is still high in the whole J-band and also at THz frequencies.

International audience; CNFETs have been characterized under large signal conditions at 600 MHz with an original active load pull setup using a LSNA. A non linear model of CNFET has been established and validated by comparison with the experimental results. Using this non linear model, design of circuits can be considered, allowing the optimization in non linear behavior.

International audience; We report for the first time to our knowledge large-signal measurements performed at 600 MHz and in time domain on carbon nanotube field-effect transistors (CNFETs) using a large-signal network analyzer. To overcome the very high mismatch between the high CNFET impedance and the basic 50-Omega configuration of the setup, the output impedance was matched with the help of an experimental active load-pull configuration. Hence, we were able to observe under large-signal conditions the nonlinear behavior of CNFETs. Static measurements and continuous-wave S ij -parameter measurements were made for many different biases. They were used in order to determine a nonlinear electrical model that has been validated thanks to the nonlinear measurements. The developed model opens the way for electrical CNFET circuit simulation and nonlinear applications of these devices.

AllnN/GaN high electron mobility transistors (HEMTs) on sapphire substrate have yielded a maximum drain current density of 1.26 A/mm with a current gain cutoff and maximum oscillation frequencies about 26 and 40 GHz, respectively, for a 0.25 mu m gate length device. Pulsed characterisations indicate absence of the virtual gate effect and reveal that the drain current dispersion is mainly due to thermal effects. Temperature stress experiments up to 800 degrees C indicate that surface and hetero-interface are inherently stable. The reasons for the behaviour are discussed.

This paper describes some aspects of the fabrication and modeling of a GaN device to be employed in a power amplifier covering one WiMAX frequency band. The work has been carried out in the frame of the TARGET's NoE work package WiSELPAS. Details concerning the AlGaN/GaN device technology and the performed linear and nonlinear measurements are provided. Since these new devices require specific nonlinear models, a procedure for selecting an appropriate simplified nonlinear model and for extracting its parameters is discussed and evaluated. The developed nonlinear model has been experimentally tested under linear and nonlinear conditions. The agreement between experimental and model-predicted performance suggests that the described model could be useful in a preliminary power amplifier design.

Short-channel punch-through effects are demonstrated in 0.17 /spl mu/m gate length AlGaN/GaN single heterojunction field-effect transistors. These take the form of a high output conductance and the strong dependence of pinch-off voltage on drain voltage. It is shown by simulation that they can be explained by poor confinement of charge at the AlGaN/GaN interface resulting in current flow within the bulk of the GaN layer. This is caused by there being a concentration of only /spl sim/1.5/spl times/10/sup 16/ cm/sup -3/ deep levels in the insulating GaN buffer layer. It is found that a net acceptor density of around 10/sup 17/ cm/sup -3/ is required to ensure suppression of short-channel effects.

DC- and RF-pulsed measurements of AlGaN/GaN HEMTs on high resistive silicon (111) substrate are achieved under probes in the 300–525 K temperature range. Current collapse and heating effects are studied and it demonstrates the high temperature properties of these devices. Hence the potential of this technology for power applications at microwave frequencies is confirmed. © 2006 Wiley Periodicals, Inc. Microwave Opt Technol Lett 48: 2301–2305, 2006; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.21897

In this letter, we present the process and power microwave measurements of 0.07-/spl mu/m Al/sub 0.25/Ga/sub 0.75/As/In/sub 0.22/Ga/sub 0.78/As pseudomorphic high-electron mobility transistors (PHEMTs). These devices are passivated and exhibit a Ft of 125 GHz, a current density of 750 mA/mm associated to a high breakdown voltage of 4 V at open channel. Careful power measurements performed at 94 GHz have allowed to demonstrate for the first time an output power of 876 mW/mm associated with 5.7-dB power gain and a power added efficiency of 29% on a PHEMT on GaAs substrate.

The authors report on the effects of plasma pre-treatment before SiN x passivation on the electrical traps of undoped AlGaN/GaN HFETs. Different plasmas were tested with O 2 or CF 4 or (O 2 + CF 4 ) gas. The maximum drain current decreased when an O 2 plasma was used before SiN x passivation, and increased up to 35% in the other cases. The best results were obtained using an (O 2 + CF 4 ) plasma. In that case, an important decrease of the knee voltage was observed in the I ds ( V ds , V gs ) characteristic which becomes independent of the bias variation. The influence of the lighting on the electrical characteristics of AlGaN/GaN HFETs was also studied. We have deduced that a part of the electrical traps is located at the surface of the structure and that another part is present under the gate, in the volume of the AlGaN layer, and/or at the interface AlGaN/GaN.

AlGaN/GaN HEMTs are realized on a sapphire substrate without a field plate for power applications at microwave frequencies using a new Ar+ ions implant-isolation technology. The first results obtained are very good in terms of device isolation. © 2005 Wiley Periodicals, Inc. Microwave Opt Technol Lett 46: 311–315, 2005; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.20974

This paper reports on the LP-MOCVD growth optimisation of GaAlN/GaN heterostructures grown on silicon carbide substrates for HEMT applications, and on the first device performances obtained with these structures. The critical impact of some growth parameters on the physical properties of the GaAlN/GaN epilayers has been identified and studied using high-resolution X-ray diffraction, AFM, C – V and sonogauge measurements. SiC substrates from different suppliers were evaluated and their influence on the physical properties of the GaAlN/GaN HEMT structures were investigated. We show that the static characteristics of the devices such as maximum drain current Idss or pinch-off voltage are correlated with the nucleation layer composition ( GaN or GaAlN) of the HEMT structure and with the defect density of the SiC substrate. A maximum drain current Idss around 1 A/mm and a pinch-off voltage of −5 V have been measured for devices with a gate length of 0.3 μm and a GaN nucleation layer, to be compared to an Idss up to 1.3 A/mm obtained for devices with the same geometry but with a GaAlN nucleation layer. I – V characteristics measured under pulsed measurements have also evidenced a clear impact of the nucleation layer composition on the trap density in the GaAlN/GaN HEMT structure. The first devices related to HEMT wafers with GaN nucleation layers were measured at 10 GHz using a load pull system. They show a CW output power in excess of 2.8 W/mm for a gate length of 0.5 μm, while devices related to HEMT wafers with GaAlN nucleation layer exhibit output power up to 4 W/mm at 10 GHz.

We present a method to characterize sub-10 nm capacitors and tunnel junctions by interferometric scanning microwave microscopy (iSMM) at 7.8 GHz. At such device scaling, the small water meniscus surrounding the iSMM tip should be reduced by proper tip tuning. Quantitative impedance characterization of attofarad range capacitors is achieved using an 'on-chip' calibration kit facing thousands of nanodevices. Nanoscale capacitors and tunnel barriers were detected through variations in the amplitude and phase of the reflected microwave signal, respectively. This study promises quantitative impedance characterization of a wide range of emerging functional nanoscale devices.

Microwave reflectometry is proposed as an effective technique to detect the vibration of capacitively transduced microelectromechanical resonators. The transducer capacitor is probed by an incident wave, which is reflected being modulated by the time variations of the resonator displacement. Calculations demonstrate that the sensitivity of the technique is maximum for a given microwave frequency depending on the transducer total capacitance. Experimental data show that capacitance variations as low as 3 zF/√Hz are measurable at 4 GHz for the studied devices. Such a performance corresponds to a sub-picometer resolution in vibration amplitude of the microelectromechanical resonator. The measurement technique is particularly appropriate for resonant sensors when high signal-to-noise ratio and fully electrical detection are required. It can be used for device resonance frequency up to several hundreds of MHz.

The performance of novel AlInN/GaN HEMTs for high power / high temperature applications is discussed. With 0.25 mu m gate length the highest maximum output current density of more than 2 A/mm at room temperature and more than 3 A/mm at 77 K have been obtained even with sapphire substrates. Cut-off frequencies were f(T) = 50 GHz and f(MAX) = 60 GHz for 0.15 pm gate length without T-gate. Pulsed measurements reveal a less instable surface than in the case of AlGaN/GaN structures. Although limited by buffer layer leakage, with field plates a maximum drain bias of 100 V has been reached with these devices. The high chemical stability of this unstrained heterostructure and its surface has been demonstrated with successful operation at 1000 degrees C in vacuum. sapphire substrate [8]. The studied structure consists of 2 mu m thick GaN buffer, 1 nm thick AlN spacer layer and 13 ran thick AlInN barrier layer containing 81% A]. Hall Effect measurements at room temperature and at 77 K give a sheet carrier density Ns = 2.5x 1013 cm(-2), a sheet resistance of 210 Omega/square (RT) and 80 Omega/square (77 K) with a record electron mobility of 1170 cm 2 Ns and 3170 cm Ns respectively. NIESA isolation has been performed by dry etching in Argon plasma. For the ohmic contacts, a Ti/Al/Ni/Au metal sequence annealed at 890'C for 60 sec has been used. A contact resistance Rc = 0.7 n.mm has been obtained, as measured by TLM. Tle DrainSource distance is 2.5 pm. Ni/Au Schottky gates have been defined by e-beam lithography

Over the last years, there is an increasing need to know and characterize the non linear behaviour of most high frequency semiconductor devices. For that, a new and original automatic active load-pull system based on a large signal network analyzer is presented which allows to carry out an accurate non linear characterization with very high load reflection coefficient (more than 0.96) under microwaves probes. After describing the setup and the calibration procedure, a dedicated study has been performed in order to validate the active load-pull system and to know and evaluate the good accuracy of non linear measurements. At non linear model of AlGaN/GaN HEMT device has been established in order to compare measurements and simulations.