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9. Impact of local back biasing on performance in hybrid FDSOI/bulk high-k/metal gate low power (LP) technology

13. Impact of a 10 nm ultra-thin BOX (UTBOX) and ground plane on FDSOI devices for 32 nm node and below

14. FDSOI devices with thin BOX and ground plane integration for 32 nm node and below

17. Variability Evaluation of 28nm FD-SOI Technology at Cryogenic Temperatures down to 100mK for Quantum Computing

19. Effects of Total Ionizing Dose on 1-V and Low Frequency Noise characteristics in advanced Si/SiGe:C Heterojunction Bipolar Transistors

21. Localization of 1/f noise sources in Si/SiGe:C HBTs

30. Measurement and characterization of low frequency noise collector current in 0.13 µm SiGe:C HBTs

32. Characterization and modeling of low frequency noise in 0.13 µm BiCMOS SiGe: C heterojunction bipolar trasnsistors

33. Study of low frequency noise in advanced SiGe : C heterojunction bipolar transistors

34. 28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications

36. Etude du bruit basse fréquence dans les transistors bipolaires à hétérojonction Si/SiGe:C développés pour des applications MMW et Terahertz

43. A 55 nm triple gate oxide 9 metal layers SiGe BiCMOS technology featuring 320 GHz fT / 370 GHz fMAX HBT and high-Q millimeter-wave passives

48. Planar Bulk+ Technology using TiN/Hf-based gate stack for Low Power Applications

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