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In this article, an ultrathin-barrier (UTB) AlGaN/GaN diode featuring metal–insulator–semiconductor (MIS)-gated hybrid anode (MG-HAD) and in situ Si3N4 cap passivation is demonstrated. The intrinsic turn-on voltage (VON) as low as 0.31 V determined by the as-grown AlGaN-barrier thickness (4.9 nm) is obtained and the VON exhibits excellent uniformity. More importantly, benefit from the MIS-gated hybrid anode structure, the UTB MG-HAD features good thermal stability in reverse blocking capability. The device delivers a substantially low leakage less than 1~μm/mm at −300 V at high temperature (HT) up to 200 °C, which is more than 100 × lower than that in the reference device w/o gate dielectric. Besides, the device exhibits respectably improved dynamic characteristics due to the incorporation of in situ Si3N4-cap passivation layer and remote plasma pretreatment (RPP) prior to Al2O3 gate dielectric deposition. The UTB MG-HAD featuring precisely VON modulation and low reverse leakage is of great interest for power electronic applications. [ABSTRACT FROM AUTHOR]

In this paper, we carried out a systematic comparison between the enhancement-mode GaN-based fully recessed metal-insulator-semiconductor field-effect transistors (MIS-FETs) and partially recessed MIS-high-electron-mobility transistors (MIS-HEMTs) with the same gate dielectric stack (LPCVD-SiNx/PECVD-SiNx) that has delivered promising long-term reliability and stability. Despite a moderately larger on-resistance (${R}_{ \mathrm{ON}}$), the MIS-FETs deliver superior ${V}_{\text {TH}}$ uniformity and thermal stability. Under long-term gate bias stress, both the MIS-HEMT and MIS-FET deliver similar small positive-bias temperature instability, while the negative-bias temperature instability of the MIS-HEMT is much larger than that of MIS-FET. The MIS-FET also delivers a higher ${V}_{\text {TH}}$ stability than the MIS-HEMT under dynamic gate bias stress. It is suggested that the differences in ${V}_{\text {TH}}$ stability mainly originate from the different spatial separation between the trap states and the conducting channel, with it being larger in MIS-HEMT than in MIS-FET. [ABSTRACT FROM AUTHOR]

In this letter, we investigated the threshold voltage V\text {TH} stability under reverse-bias step-stress in the E-mode LPCVD-SiNx/PECVD-SiNx/GaN MIS-FET. Under the OFF-state reverse-bias stress with the same net gate-to-drain voltage ( V\text {GD} ), the V\text {TH} shift shows an obvious dependence on the negative gate bias. With a V\text {GS} of 0 V, the V\text {TH} shift is small and recoverable, while the V\text {TH} shifts are substantially larger with more negative gate bias ( V\text {GS}=-20 V). This larger V\text {TH} shifts caused by the negative V\text {GS} can be explained with a hole-induced degradation model. An important indication revealed by this model is that negative gate bias should be well confined in high-power switching applications of GaN E-mode MIS-FET for a stable V\text {TH} . [ABSTRACT FROM PUBLISHER]

Developing effective technique to protect the etched- GaN surface from the degradation in a high-temperature (i.e., at ~ 780°C) process, such as low-pressure chemical vapor deposition (LPCVD), is essential for fabricating normally-off GaN MIS-FETs with high-quality dielectric/GaN interface and highly reliable gate dielectric. In this letter, we developed an approach of obtaining such a protection layer using oxygen-plasma treatment followed by in situ annealing prior to the LPCVD-SiNx deposition. A sharp and stable crystalline oxidation interlayer (COIL) between the LPCVD-SiNx and etched-GaN was successfully formed. The LPCVD-SiNx/GaN MIS-FETs with COIL deliver normally-off operation with a VTH of 1.15 V, small on-resistance, small hysteresis, and thermally stable VTH . [ABSTRACT FROM AUTHOR]

In this letter, we demonstrate an integrated process that illustrates the compatibility of AlN/SiNx passivation with high-performance (i.e. low leakage and high breakdown) low-pressure chemical vapor deposition (LPCVD) SiNx gate dielectric for GaN-based MIS-HEMT. It is shown that the AlN/SiNx passivation structure maintains its superior capability of suppressing the current collapse after enduring high temperature of 780 °C during the LPCVD-SiNx deposition. The AlN/SiNx passivation is shown to be significantly better than the LPCVD-SiNx passivation by delivering small dynamic $R_{{\mathrm{\scriptscriptstyle ON}}}$ degradation, especially under high drain bias switching with $V_{{\mathrm{DS}}} > 100$ V. [ABSTRACT FROM PUBLISHER]

In this paper, we systematically investigated the leakage and breakdown mechanisms of the low-pressure chemical vapor deposition (LPCVD) silicon nitride thin film deposited on AlGaN/GaN heterostructures. The LPCVD-SiNx gate dielectric exhibits low leakage and high breakdown electric field. The dominant mechanism of the leakage current through LPCVD-SiNx gate dielectric is identified to be Poole–Frenkel emission at low electric field and Fowler–Nordheim tunneling at high electric field. Both electric-field-accelerated and temperature-accelerated time-dependent dielectric breakdown of the LPCVD-SiNx gate dielectric were also investigated. [ABSTRACT FROM PUBLISHER]

Effective interface trap characterization approaches are indispensable in the development of gate stack and dielectric surface passivation technologies in III-nitride (III-N) insulated-gate power switching transistors for enhanced stability and dynamic performance. In III-N metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) that feature a buried channel, the polarized barrier layer separates the critical dielectric/III-N interface from the two-dimensional electron gas (2DEG) channel and consequently complicates interface trap analysis. The barrier layer not only causes underestimation/uncertainty in interface trap extraction using conventional ac-conductance method but also allows the Fermi level dipping deep into the bandgap at the pinch-off of the 2DEG channel. To address these issues, we analyze the frequency/temperature dispersions of the second slope in capacitance-voltage characteristics and develop systematic ac-capacitance techniques to realize interface trap mapping in MIS-HEMTs. The correlation between ac-capacitance and pulse-mode hysteresis measurements show that appropriate gate bias need to be selected in the interface trap characterization of MIS-HEMTs, in order to match the time constant of interface traps at the Fermi level with ac frequency and pulsewidth. [ABSTRACT FROM AUTHOR]

In this letter, silicon nitride (SiNx) film deposited at 780 °C by low-pressure chemical vapor deposition (LPCVD) was employed as gate dielectric for GaN-based metal–insulator–semiconductor high-electron-mobility transistors. The LPCVD-SiNx exhibit improved gate dielectric performance than the plasma enhanced chemical vapor deposition-SiNx, including smaller forward and reverse gate leakage, and higher forward gate breakdown voltage. [ABSTRACT FROM AUTHOR]

Al2O3/AlGaN/GaN enhancement-mode metal-isolator-semiconductor high-electron-mobility transistor (MIS-HEMT) featuring a partially recessed (Al) GaN barrier was realized by a fluorine plasma implantation/etch technique. By properly adjusting the RF power driving the fluorine plasma, the fluorine plasma is able to produce two desirable results: 1) a well-controlled slow dry etching for gate recess and 2) implanting fluorine ions into the AlGaN barrier. The fluorine ions become negatively charged in the barrier layer and induce a positive shift in the threshold voltage. The proposed MIS-HEMT exhibits a threshold voltage ( V\mathrm {\mathbf {TH}}) of +0.6 V at a drain current of 10~\mu \textA /mm, a maximum drive current of 730 mA/mm, an ON-resistance of 7.07~\Omega \,\cdot \, mm, and an OFF-state breakdown voltage of 703 V at an OFF-state drain leakage current of 1~\mu \text{A} /mm. From room temperature to 200 °C, the device exhibits a small negative shift of V_{\mathrm {\mathbf {TH}}}$ ( $\sim 0.5$ V) that is attributed to the high-quality dielectric/F-implanted-(Al) GaN interface and the partially recessed barrier. [ABSTRACT FROM AUTHOR]

We report an in situ low-damage pre-gate treatment technology in an atomic layer deposition (ALD) system prior to the ALD-Al2O3 deposition, to realize high-quality Al2O3/III\-nitride (III-N) interface. The technology effectively removes the poor quality native oxide on the III-N surface while forming an ultrathin monocrystal-like nitridation interlayer (NIL) between Al2O3 and III-N surface. With the pre-gate treatment technology, high-performance Al2O3(NIL)/GaN/AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors are demonstrated, exhibiting well-behaved electrical characteristics including suppressed gate leakage current, a small subthreshold slope of \sim64~mV/dec, and a small hysteresis of \sim0.09~V. [ABSTRACT FROM AUTHOR]

AlN/GaN heterostructures were realized by growing AlN thin film with low-thermal-budget (300^\circC) plasma-enhanced atomic layer deposition (ALD) on a semi-insulating GaN-on-sapphire template. Thin-film transistors (TFTs) have been successfully fabricated using in situ ALD-grown Al2O3 as the gate dielectric. The proposed TFTs exhibit good gate control with a low subthreshold swing of \sim85~mV/decade and a low-field mobility of \sim27~cm^2/(V\cdot s). This mobility is one order of magnitude higher than that obtained in AlN/GaN heterostructures grown by magnetron sputtering. The enhanced device performance is attributed to a high-quality ALD-AlN/GaN interface obtained by in situ remote-plasma predeposition cleaning and the subsequent epitaxial growth of AlN thin film by plasma-enhanced ALD. [ABSTRACT FROM PUBLISHER]

A high-\kappa\ \LaLuO3 (LLO) thin film is successfully incorporated into AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MISHEMTs) as the gate dielectric. The LLO–AlGaN/GaN MISHEMTs fabricated with a planar process exhibit a high ION/IOFF of \10^9, a maximum drain current of 820 mA/mm at VGS = 3\ \V, a peak transconductance (Gm) of \sim192 mS/mm, and a steep subthreshold slope (SS) of \sim73 mV/dec. [ABSTRACT FROM PUBLISHER]

We report the study of high-dielectric-constant (high-κ) dielectric LaLuO3 (LLO) thin film that is grown on AlGaN/GaN heterostructure by molecular beam deposition (MBD). The physical properties of LLO on AlGaN/GaN heterostrucure have been investigated with atomic force microscopy, x-ray photoelectron spectroscopy, and TEM. It is revealed that the MBD-grown 16 nm-thick LLO film is polycrystalline with a thin (∼2 nm) amorphous transition layer at the LLO/GaN interface. The bandgap of LLO is derived as 5.3 ± 0.04 eV from O1s energy loss spectrum. Capacitance-voltage (C-V) characteristics of a Ni-Au/LLO/III-nitride metal-insulator-semiconductor diode exhibit small frequency dispersion (<2%) and reveal a high effective dielectric constant of ∼28 for the LLO film. The LLO layer is shown to be effective in suppressing the reverse and forward leakage current in the MIS diode. In particular, the MIS diode forward current is reduced by 7 orders of magnitude at a forward bias of 1 V compared to a conventional Ni-Au/III-nitride Schottky diode. [ABSTRACT FROM AUTHOR]

Benzocyclobutene (BCB), a low-k, photosensitive, easily patterned material is used as the interfacing layer that isolates the passive components from the lossy, low-resistivity silicon. Its performance is further improved by reducing the conductive loss with an electroplated and highly-conductive metal, namely, copper. Standard 50-Ω microstrip lines and a microstrip-transmission-line-based microwave filter, exhibiting insertion losses of 0.8 dB and 1.1 dB at 10 GHz, respectively, are demonstrated. © 2004 Wiley Periodicals, Inc. Microwave Opt Technol Lett 40: 9–11, 2004; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.11271 [ABSTRACT FROM AUTHOR]