61 results on '"Silicon-on-isolator -- Design and construction"'
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2. Estimation of heavy-ion LET thresholds in advanced SOI IC technologies from two-photon absorption laser measurements
3. Large SET duration broadening in a fully-depleted SOI technology - mitigation with body contacts
4. An embeddable SOI radiation sensor
5. Field enhancement for dielectric layer of high-voltage devices on silicon on insulator
6. Eliminating back-gate bias effects in novel SOI high-voltage device structure
7. Development and fabrication of cylindrical silicon-on-insulator microdosimeter arrays
8. Cylindrical silicon-on-insulator microdosimeter: design, fabrication and TCAD modeling
9. Bulk lateral MEM resonator on thin SOI with high Q-factor
10. A non-contact-type RF MEMS switch for 24-GHz radar applications
11. A mode-matched silicon-yaw tuning-fork gyroscope with subdegree-per-hour Allan deviation bias instability
12. Tungsten-based SOI microhotplates for smart gas sensors
13. Silicon nanotweezers with subnanometer resolution for the micromanipulation of biomolecules
14. Compact surface potential model for FD SOI MOSFET considering substrate depletion region
15. Threshold voltage variation in SOI Schottky-barrier MOSFETs
16. Physical model of noise mechanisms in SOI and bulk-silicon MOSFETs for RF applications
17. Threshold voltage model of short-channel FD-SOI MOSFETs with vertical Gaussian profile
18. A novel low-power and high-speed SOI SRAM with actively body-bias controlled (ABC) technology for emerging generations
19. Hole distributions in erased NROM devices: profiling method and effects on reliability
20. Analysis of self-heating effects in ultrathin-body SOI MOSFETs by device simulation
21. Device design and optimization methodology for leakage and variability reduction in sub-45-nm FD/SOI SRAM
22. Innovative materials, devices, and CMOS technologies for low-power mobile multimedia
23. Design considerations of silicon nanowire biosensors
24. Low-frequency-noise spectroscopy of SIMOX and bonded SOI wafers
25. A comprehensive study of the corner effects in Pi-gate MOSFETs including quantum effects
26. Device design of high-speed source-heterojunction-MOS transistors (SHOTs): optimization of source band offset and graded heterojunction
27. Revolutional progress of technologies exhibiting very high speed performance over a 50-GHz clock rate
28. Surface-potential solution for generic undoped MOSFETs with two gates
29. Design of low-power fast VCSEL drivers for high-density links in 90-nm SOI CMOS
30. A three-dimensional stacked Fin-CMOS technology for high-density ULSI circuits
31. Possible influence of the Schottky contacts on the characteristics of ultrathin SOI pseudo-MOS transistors
32. Control of threshold-voltage and short-channel effects in ultrathin strained-SOI CMOS devices
33. Experimental evaluation of gate architecture influence on DG SOI MOSFETs performance
34. Analysis and optimization of the back-gate effect on lateral high-voltage SOI devices
35. Comparison of SOI power device structures in power converters for high-voltage, low-charge electrostatic microgenerators
36. Subthreshold electron mobility in SOI MOSFETs and MESFETs
37. 1/f noise and generation/recombination noise in SiGe HBTs on SOI
38. Lateral high-speed bipolar transistors on SOI for RF SoC applications
39. Self-heating effects in a BiCMOS on SOI technology for RFIC application
40. A 243-GHz Ft and 208-GHz Fmax, 90-nm SOI CMOS SoC technology with low-power mmWave digital and RF circuit capability
41. Fabrication of Terahertz frequency phonon cooled HEB mixers
42. Density measurement of a thin-film by the pressure-of-floatation method
43. A low-power silicon on sapphire CMOS optoelectronic receiver using low- and high-threshold devices
44. Thin-film strained-SOI CMOS devices-physical mechanisms for reduction of carrier mobility
45. A device design methodology for sub-100-nm SOC applications using bulk and SOI MOSFETs
46. Multiple-gate SOI MOSFETs: device design guidelines
47. SOI MOSFET structure with a junction-type body contact for suppression of pass gate leakage
48. Gate-all-around OTA's for rad-hard and high-temperature analog applications
49. BESS: a source structure that fully suppresses the floating body effects in SOI CMOSFET's
50. Body-contacted SOI MOSFET structure and its application to DRAM
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