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This paper presents a new source-follower type analog buffer for active-matrix liquid crystal displays applications, which exhibits high immunity to the threshold voltage variations of the polysilicon (poly-Si) thin-film transistors (TFTs). The functionality of the buffer was verified through simulations. In order for the simulations to be realistic, parameters extraction from fabricated poly-Si TFTs were used. Index Terms--Active-matrix liquid crystal displays (AMLCDs), analog buffer, column driver, low-temperature (LT) polysilicon (poly-Si) thin-film transistors (TFTs), pixel array.

The article investigates Pentacene-based planar- and vertical-type organic thin-film transistors (OTFTs).

A chemical bath deposition process for zinc oxide (ZnO) deposition is used for demonstration of solution-processed transparent ZnO transistors. The process results in high mobility of 3.5 [cm.sub.2]/V.s with on-off ratios of approximately [10.sup.5].

The effects of static stress were investigated by the aid of numerical simulations and using two types of procedures namely the on stress and the hot carrier stress. Results show that the variations of trap state density into the whole polysilicon layer and not only near the drain junction are responsible for the degradation of thin-film transistors (TFTs) performances in both types of stress and that the interface trap states play a negligible role compared to the bulk trap states.

Various experiments and studies are conducted to study the role of order and disorder on the electronic performance of n-type ionic oxides, which are used as active or passive layers in thin film transistors (TFTs) processed at the room temperature. The analysis shows that the disorder does not affect the carrier mobility of the transistors much, as compared to that of semiconductors, though the electrical properties are found to be highly dependent on the oxygen vacancies.

Several electrical in situ and ex situ measurements are conducted to study the influence of various environmental conditions, like dry oxygen and moisture on the electronic transport and device stability of the polycrystalline pentacene transistors. The analysis reveals that such conditions inhibits the injection of holes in the highest occupied molecular orbital level of the film, which further leads to an apparent reduction of the charge carrier mobility, as well as the threshold voltage.

A combination of solvent cleaning and oxygen plasma cleaning processes is used to study and explain the effects of Si[O.sub.2] dielectric preparation on interfacial trap density in pentacene-based organic thin-film transistors. The reduction in the organic contamination at the semiconductor/dielectric interface following the plasma cleaning, leading to a reduction in the trapping states, is found to improve the threshold voltage of the devices.

The heat generation of a low-temperature polycrystalline thin-film transistor in pulse operation is analyzed and a technique is proposed for accurately measuring its thermal temperature in high-frequency operation. The degradation in pulse operation is investigated by pulse signal input into the p-channel low-temperature p-Si thin-transistor (TFT) and the relationship between the thermal temperature and the degradation in the pulse operation is discussed.

The device degradation behaviors of typical-sized n-type metal-induced laterally crystallized polycrystalline silicon thin-film transistors are investigated under hot-carrier (HC) stress and self-heating (SH) stress. The results have shown that the device degradation is the consequence of HC induced defect generation locally at the drain side under HC stress.

A new source-follower-type analogy buffer is proposed for active-matrix displays, which are designed by using low-temperature polysilicon thin-film transistors (TFTs). The new buffer does not need storage capacitor for the threshold-voltage variation cancellation, thereby leading to high-speed operation.

We report on glass etching transfer processes to obtain thermally stable large-size TFT flexible substrates on plastic film bases. The transfer processes include high-pressure jet etching that allows us to achieve good etch-rate uniformity over the large area and the utilization of an adhesive having a low elastic modulus. From the experiments and simulations, we find that using an adhesive having a low elastic modulus is effective in reducing bend of the flexible substrate under thermal stresses. The simulations also predict that the reduction in the bend corresponds to the reduction in the principal stress of the adhesive, leading to the suppression of the film peeling off from the thinned glass. Using the transfer processes, we have successfully fabricated thermally stable TFT flexible substrates (300 mm x 350 mm x 200 [micro]m) that have satisfactory electrical characteristics. Index Terms--Adhesive, elastic modulus, flexible substrate, glass etching, thin-film transistor, transfer process.

The long-term bias stress stability of poly(quaterthiophene) thin film transistors and slow stress process are described. The threshold voltage and the mobility, both are explicitly measured, a stress-induced mobility decrease is identified and it is seen that the slow stress also recovers but on a time scale of days, leading to a stabilized threshold voltage shift which does not change much for at least a few months.

Low-frequency noise is studied in n-channel furnace solid phase crystallized and in laser solid phase crystallized (LSPC) polysilicon TFTs biased from weak to strong inversion. The results are attributed to the effects of the laser annealing on the active layer crystal quality.

The neutral cluster beam deposition method was applied to produce and characterize organic thin-film transistors based upon tetracene and pentacene molecules as active layers. The overall device characteristics are strongly correlated to the surface morphology and structures are strongly correlated to the surface morphology and structures of the organic thin films.

The channel position of thin-film transistors (TFTs) inside a location-controlled grain was examined for obtaining high-performance TFTs. An electron mobility of approximately 600 cm (super 2)/V -s and subthreshold swing of 0.21 V/dec were obtained, when the current-flow direction of the TFTs was parallel to the radial direction of the grain filter.

Hot-carrier effects in n-channel polysilicon thin-film transistors (TFTs), with channel width W=10 mum and length L=10 mum are investigated. The apparent channel mobility is derived considering that the mobility of the damaged region is described with the mobility of amorphous Si TFTs, whereas the mobility of the virgin device.

Organic thin-film transistors (OTFTs) are fabricated with channel lengths as small as 10nm and an operating voltage of V(sub DD)= -0.3 V using e-beam lithography. Parasitic resistance and contact issues between pentacene and the source/drain contact material resulted in substantial device performance degradation, including a reduction in extrinsically measured transconductance and mobility.

The first organic complementary circuits on flexible substrates are reported. Organic thin-film transistors were fabricated using pentacene as the semiconductor for the p-channel devices and hexadecafluorocop-perphthalocyanine (F16CuPc) as the semiconductor for the n-channel devices.

The capacitance-voltage (C-V) measurement was used to investigate the degradation of n-type and p-type low-temperature polycrystalline silicon (poly-Si) thin film transistors (TFTs) due to hot-carrier stress. The degradation of n-type TFTs was caused by additional trap states in the grain boundary, whereas the degradation of p-type TFTs was caused by electron trapping into the gate oxide.

A p-channel polysilicon conductivity modulated thin-film transistor has been designed and studied experimentally. The novel transistor shows a significant reduction in on-state resistance through conductivity modulation in the offset region. Conductivity modulation was realized by injecting minority carriers into the offset region through a diode added into the drain. Results indicate that conductivity modulation in the p-channel device is as effective as that in the n-channel device. There was an increase in the on-state current by 1.5 to 2 orders of magnitude compared to conventional offset drainthin-film transistors.

Photoresist reflow is used in making a novel offset gated poly-Si thin-film transistor (TFT) with subgate. The novel TFT has an innovative gate pattern and its hydrogenation effect does not conform with previous results. It has been observed that hydrogenation improves when the space between the maingate and subgate is wider for the same offset length. The leakage current is two orders of magnitude lower than those for nonoffset gated devices. Its ON current is almost identical with the latter on the frequency range 10 to 100 KHz.

A study was conducted to develop a high performance polycrystalline silicon thin film transistor supporting a silicon nitride gate insulator with three stacked layers. Low resistive NiSi silicides were integrated as gate/source/drain electrodes to minimize process steps. Si:H film obtained by plasma enhanced chemical vapor deposition was used as the starting material for laser annealing. The thin film transistor featured a field effect mobility of 2262 cm2/Vs and a threshold voltage of -1 V.

A new, thick-layered etched-contact hydrogenated amorphous silicon transistor structure which allows the use of thick hydrogenated amorphous silicon layers while avoiding their adverse effects on the contact resistance of thin film transistors is introduced. The new structure is fully compatible with conventional thin film transistor fabrication technology and requires no additional masking levels. The currents of the new structure are higher than those of conventional thin film transistors with identically thick hydrogenated amorphous silicon layers.

The fabrication and characterization of a depletion-mode p-channel low-temperature polycrystalline silicon (poly-Si) thin-film transistor (TFT) is reported. The TFT having a conducting state at zero gate voltage has operated in the depletion mode and has displayed a field-effect mobility of 60 [cm.sup.2]/V . s, a threshold voltage of 18 V and a gate voltage swing of 1.1 V/dec.

A new solution-processable, high mobility polythiophene semiconductor is designed with enhanced stability for fabrication of low-cost thin-film transistors (TFTs). This semiconductor exhibited high field-effect transistor mobility even without the usual time-consuming postdeposition thermal annealing step, thus potentially enabling high-throughput, roll-to-roll mass manufacturing processes for TFT circuits.