51. Variability analysis of scaled poly-Si channel FinFETs and tri-gate flash memories for high density and low cost stacked 3D-memory application
- Author
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Kunihiro Sakamoto, Hiromi Yamauchi, Yuki Ishikawa, T. Kamei, Junichi Tsukada, Y. X. Liu, S. Oruchi, Atsushi Ogura, Kazuhiko Endo, M. Masahara, T. Mastukawa, and T. Hayashida
- Subjects
Flash (photography) ,Materials science ,Gate oxide ,business.industry ,Logic gate ,Charge trap flash ,MOSFET ,Electrical engineering ,Optoelectronics ,business ,Flash memory ,Communication channel ,Threshold voltage - Abstract
The threshold voltage (V t ) in scaled poly-Si channel FinFETs and tri-gate flash memories with poly-Si floating gate (FG) was systematically compared with crystal channel ones, for the first time. It was found that some superior I d -V g characteristics are observed in the scaled poly-Si channel FinFETs with gate length (L g ) down to 54 nm or less. The standard deviation of V t (σV t ) of poly-Si channel FinFETs was 3 times higher than that of crystal channel ones at the same gate oxide thickness (T ox ). However, the σV t of poly-Si channel tri-gate flash memories after one program/erase (P/E) cycle became comparable to that of crystal channel ones. Moreover, it was found that punch-through voltage of the poly-Si channel tri-gate flash memory is as high as 4.6 V even L g was down to 76 nm.
- Published
- 2011
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