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Group-IV alloy semiconductor materials are much attractive for photovoltaic application, as those realizes multijunction photovoltaic with multi-heterostructure like group-III-V compound semiconductors [1]. In addition, group-IV alloy materials are expected to be familiar to Si integrated electronics. Ge1–x–ySixSny is one of candidate materials suitable for multijunction photovoltaic, since ternary alloy semiconductor provides energy band design independent on the lattice constant. The energy band gap of Ge1–x–ySixSny can be controlled from 0.66 eV to 1.0 eV with the epitaxial layer whose lattice is matching to Ge substrate. We previously reported the epitaxial growth of Ge1–x–ySixSny layers and also investigated the crystalline and electronic properties of them [2, 3]. However, the junction properties of Ge1–x–ySixSny/Ge heterostructure have not been well understood and it is necessary to clarify the crystalline and electronic properties of group-IV ternary alloy hetero junctions. In this study, we examined the crystal growth of pseudomorphic epitaxial layers of Ge1–x–ySixSny ternary alloy on Ge(001) substrates to form heterojunction structure for photovoltaic application. We also investigated the electronic and optoelectronic properties of these Ge1–x–ySixSny/n-Ge heterojunction diodes. Substrate used was n-type Ge(001) wafer. After chemical cleaning of substrate, a 200 nm-thick undoped Ge1–x–ySixSny layer was grown at 150–350 °C on substrate using molecular beam epitaxy system in ultrahigh vacuum chamber. Ge and Sn were deposited using Knudsen cells and Si was done using electron gun evaporation. Then, we prepared a mesa-shaped structure with wet etching. A 300 nm-thick SiO2 layer was deposited with coating of spin-on-glass and annealing at 450 °C. Finally, an Al electrode was prepared on contact holes to form heterojunction diode structure. We confirmed the crystalline structure of epitaxial layers with X-ray diffraction reciprocal space mapping. A Ge1–x–ySixSny layer with a high Sn content of 12% can be prepared with lattice matching epitaxy on Ge at a low temperature below 250 °C. It is also found that the small misfit between Ge1–x–ySixSny and Ge effectively impacts on the high crystalline quality and high thermal stability of substitutional Sn atoms in Ge matrix. Absorption spectroscopy and current-voltage characteristics of undoped Ge1–x–ySixSny/n-Ge heterojunction diodes were also performed. We observed good rectifying property of the diodes meaning that the majority carrier of these undoped Ge1–x–ySixSny ternary alloy layers is hole unintentionally generated due to defects. We also found the extension of the energy band gap of Ge1–x–ySixSny layer with Si and Sn contents. Photovoltaic property of Ge1–x–ySixSny/Ge heterojunction diodes were also measured. We can see the increasing of the open circuit voltage, Voc from 0.08 to 0.12 V for undoped Ge/n-Ge to undoped Ge0.54Si0.36Sn0.10/Ge heterojunction photovoltaic cell structure, which indicates the enhancement of Voc with increasing the energy bandgap of epitaxial layer. We also achieved the improvement of Voc by 0.14 V with 500 °C-annealing in hydrogen (H2) ambient, which suggests the annihilation or termination of point defect in the heterojunction structure. In conclusions, heterojunction structure with Ge1–x–ySixSny ternary alloy semiconductor layer provides the energy band engineering for photovoltaic applications. Understanding and controlling the defect properties in epitaxial growth and heterojunction formation should be key factors for the enhancement of performance of group-IV multijunction photovoltaic. References [1] S. Asaba et al., in Ext. Abstra. of Int. Conf. on Solid State Devices and Materials (SSDM2013), pp. 1172-1173, Fukuoka, Japan, Sept. 2013. [2] T. Asano et al., Solid State Electronics 110, 49 (2015). [3] T. Yamaha et al., Appl. Phys. Lett. 108, 061909 (2016).

The interest in thermoelectrics (TE) for an electrical output power by converting any kind of heat has flourished in recent years, but questions about the efficiency at the ambient temperature and safety remain unanswered. With the possibility of integration in the technology of semiconductors based on silicon, highly harvested power density, abundant on earth, nontoxicity, and cost-efficiency, Si1-x-yGexSny ternary alloy film has been investigated to highlight its efficiency through ion implantation and high-temperature rapid thermal annealing (RTA) process. Significant improvement of the ambient-temperature TE performance has been achieved in a boron-implanted Si0.864Ge0.108Sn0.028 thin film after a short time RTA process at 1100 °C for 15 seconds, the power factor achieves to 11.3 μWcm−1 K−2 at room temperature. The introduction of Sn into Si1-xGex dose not only significantly improve the conductivity of Si1-xGex thermoelectric materials but also achieves a relatively high Seebeck coefficient at room temperature. This work manifests emerging opportunities for modulation Si integration thermoelectrics as wearable devices charger by body temperature.

We report the epitaxy of n-Ge layer with in situ phosphorus (P)-doping using metal-organic chemical vapor deposition (MOCVD) method with tertiary-butyl-germane and tri-ethyl-phosphine precursors. The crystalline and electrical properties of n-Ge epitaxial layers have been investigated using X-ray diffraction, atomic force microscopy, and Hall effect measurements in detail. In situ P-doping with MOCVD demonstrates the incorporation of P in Ge as high as 1 × 1020 cm−3. The electron concentration in P-doped Ge epitaxial layers are achieved as high as 1.7 × 1019, 1.8 × 1019, and 2.2 × 1018 cm−3 at growth temperatures of 400, 350, 320 °C, respectively.

The formation of Ge 1− x − y Si x Sn y /Ge 1− x Sn x /Ge 1− x − y Si x Sn y double heterostructures with strain-controlled Ge 1− x − y Si x Sn y layers and their crystalline properties were investigated. We achieved the epitaxial growth of double heterostructures consisting of a Ge 1− x Sn x layer with a Sn content of 9% sandwiched between compressive- or tensile-strained Ge 1− x − y Si x Sn y layers. The strain sign of the Ge 1− x − y Si x Sn y epitaxial layer influenced the crystallinity of the double heterostructures. Compressive-strained Ge 1− x − y Si x Sn y layers provided double heterostructures with higher crystallinity than the tensile-strained ones. The magnitude of strain in the Ge 1− x − y Si x Sn y layers also affected the surface roughness of the double heterostructures. Low surface roughness was achieved by decreasing the magnitude of strain in the Ge 1− x − y Si x Sn y layers. Moreover, the strain sign and/or Si content in Ge 1− x − y Si x Sn y influenced the thermal stability of the double heterostructures. Compressive-strained Ge 1− x − y Si x Sn y and/or a low Si content in Ge 1− x − y Si x Sn y improved the thermal stability of the double heterostructures to withstand annealing temperatures as high as 400 °C.

Electrical and optical properties of GeSn layers formed at various growth conditions under changing deposition temperature (Td) and deposition speed (vd) were systematically investigated. A high Sn content of 3.0% leads to high electron mobility and electron concentration for an as-deposited sample compared with the Sn content of 1.9%. Subsequent annealing at 550 °C after the growth is effective for improving the mobility and the activated carrier concentration. Moreover, the high vd and Td growth makes it possible to get clear photoluminescence (PL) signal from the band-to-band transition of the GeSn layers. The annealing at 550 °C leads to the high and sharp PL spectra compared with those for the as-deposited samples. Consequently, we found that the high vd and Td growth of the GeSn layers suppressing the Sn migration is quite important for getting electrical and optical properties to realize future electrical and optical devices.

Solid phase crystallization (SPC) of amorphous GeSn (a-GeSn) layers with a Sn content of 2% on various insulating substrates of Si3N4, sapphire, and Y2O3 have been investigated. We found that Si3N4, which has almost same value of a higher surface energy with sapphire and the value is about twice as high as Y2O3, could be reduced the SPC temperature of a-GeSn layers (to 400 °C) compared with the other cases. We can see that a maximum grain size as large as 0.9 µm was achieved for polycrystalline GeSn layers on Si3N4 by the annealing at 450 °C for 5 h. Correspondingly, a relatively higher Hall hole mobility (180 cm2/Vs) was obtained.

Impact of a local bonding structure in a Si y Ge 1-y-z Sn z thin film on the stabilization of substitutional Sn has been investigated. Ge 1-x Sn x group-IV alloy is widely studied especially for optoelectronic devices as it can become a direct bandgap semiconductor material. This transition requires introduction of Sn more than its solubility limit. Although non-equilibrium growth techniques enable to incorporate a lot of Sn in Ge, attempts of Sn stabilization to prevent Sn precipitation during a fabrication process or device operation have been reported only a few. We found that Sn atom in Ge matrix can be energetically stabilized by introduction of Si and reduction of compressive strain applied from a substrate. Extended X-ray absorption fine structure study revealed that Si-Sn bond is hardly formed in the Si y Ge 1-y-z Sn z thin film, rather, a Sn atom locates at the 2nd nearest neighbor position of a Si atom. These results indicated that the Si-Ge-Sn local bonding structure contributes to the stabilization of Sn at a substitutional site by releasing a local strain around Sn atoms.

We have investigated the dependence on the metal work function of Schottky barrier height (SBH) of metal/Ge 1− x Sn x / n -Ge Schottky diode and have discussed the mechanism of SBH reduction by insertion of a Ge 1− x Sn x interlayer. The SBH of metal/Ge 1− x Sn x / n -Ge Schottky diodes for various metal electrodes of Zr, Al, and Au were estimated. Even after the insertion of Ge 1− x Sn x layer at various metal/ n -Ge interface, the dependence of SBH on the metal work function is weak as well as direct metal/ n -Ge contact. We also found that the SBH decreases by 0.1–0.2 eV by the insertion of a Ge 1− x Sn x or Sn layer regardless of the metal work function. This result means that the SBH is determined only by the interfacial semimetal Ge 1− x Sn x layer. Considering that density of states at the E F and momentum of electrons in semimetal Ge 1− x Sn x and α-Sn are small, those epitaxial interlayers would suppress the metal induced gap state at the metal/Ge interface as well as the disorder induced gap states. Additionally, we demonstrated the reduction of the metal/ n -Ge contact resistivity by introduction of a Ge 1− x Sn x interlayer.

Toward creation of a direct gap group-IV semiconductor, we have developed a new method of growing Si1-xSnx layers with various Sn content including a very high Sn content around 40% by using solid phase epitaxy. Crystallographic analyses indicate that grown Si1−xSnx layers are nearly lattice-matched to the substrates, specifically, the substitutional Sn contents of ~20 and ~40% are achieved for case of growth on (001)-oriented Ge and InP substrates, respectively. Although band structure of the Si0.6Sn0.4 layers grown on InP is still indirect band gap, the difference between the indirect and direct band gap energies decreases from 3.01 (Si) to 0.14 eV (Si0.6Sn0.4) following Sn substitution.

Selective epitaxial growth of Ge and Ge1−xSnx layers on Si substrates was performed by using metal-organic chemical vapor deposition (MOCVD) with precursors of tertiary-butyl-germane (t-BGe) and tri-butyl-vinyl-tin (TBVSn). We investigated the effects of growth temperature and total pressure during growth on the selectivity and the crystallinity of the Ge and Ge1−xSnx epitaxial layers. Under low total pressure growth conditions, the dominant mechanism of the selective growth of Ge epitaxial layers is the desorption of the Ge precursors. At a high total pressure case, it is needed to control the surface migration of precursors to realize the selectivity because the desorption of Ge precursors was suppressed. The selectivity of Ge growth was improved by diffusion of the Ge precursors on the SiO2 surfaces when patterned substrates were used at a high total pressure. The selective epitaxial growth of Ge1−xSnx layer was also realized using MOCVD. We found that the Sn precursors less likely to desorb from the SiO2 surfaces than the Ge precursors.

For realizing high-performance Ge-channel metal-oxide-semiconductor field-effect transistor (MOSFET), the reduction of parasitic resistance is one of the most important issues [1] . However, it is generally difficult to reduce the contact resistivity at metal/ n -Ge interface because of its high Schottky barrier height (SBH) around 0.5–0.6 eV, in which the Fermi level of the metal is pinned at the valence band edge of Ge; well-known Fermi level pinning (FLP) phenomenon [2] , [3] . One of the considerable reasons for FLP is disorder-induced gap states owing to dangling bonds at the metal/Ge interface [4] . There are some reports in which an epitaxial metal/Ge interface alleviates FLP and the SBH can be lowered with Fe 3 Si/ n -Ge(111) [5] , Mn 3 Ge 5 / n -Ge(111) [6] , and NiGe/ n -Ge(110) contacts [7] .

The crystalline and electrical properties of $\mathrm{Ge}_{1-\mathrm{x}}\mathrm{Sn}_{\mathrm{x}}/\mathrm{Ge}_{1-\mathrm{x}-\mathrm{y}}\mathrm{Si}_{\mathrm{x}}\mathrm{Sn}_{\mathrm{y}}$ quantum well (QW) structures have been investigated. We fabricated QW samples with QW structure of 15-nm-thick Ge 0.91 Sn 0.09 well without any spacer layers (sample A) and 2-nm-thick Ge 0 . 91 Sn 0 . 09 well with GeSn (Sn: 1-2%) spacer layers (sample B). From current density-voltage (J-V) characterizations at 10 K, both QW diode samples exhibited non-Ohmic characteristics. Moreover, a peak obviously exists at ~0.5 V in the forward bias region for sample B. This result infers the potential to further develop $\mathrm{Ge}_{1-\mathrm{x}}\mathrm{Sn}_{\mathrm{x}}$ -based resonant tunneling diodes by using the $\mathrm{Ge}_{1-\mathrm{x}}\mathrm{Sn}_{\mathrm{x}}/\mathrm{Ge}_{1-\mathrm{x}-\mathrm{y}}\mathrm{Si}_{\mathrm{x}}\mathrm{Sn}_{\mathrm{y}}$ QW structure.

The interest in thermoelectrics (TE) for an electrical output power by converting any kind of heat has flourished in recent years, but questions about the efficiency at the ambient temperature and safety remain unanswered. With the possibility of integration in the technology of semiconductors based on silicon, highly harvested power density, abundant on earth, nontoxicity, and cost-efficiency, Si1-x-yGexSny ternary alloy film has been investigated to highlight its efficiency through ion implantation and high-temperature rapid thermal annealing (RTA) process. Significant improvement of the ambient-temperature TE performance has been achieved in a boron-implanted Si0.864Ge0.108Sn0.028 thin film after a short time RTA process at 1100 °C for 15 seconds, the power factor achieves to 11.3 μWcm−1 K−2 at room temperature. The introduction of Sn into Si1-xGex dose not only significantly improve the conductivity of Si1-xGex thermoelectric materials but also achieves a relatively high Seebeck coefficient at room temperature. This work manifests emerging opportunities for modulation Si integration thermoelectrics as wearable devices charger by body temperature.

We examined the formation of locally strained Ge nanostructures sandwiched between Ge1−x Sn x stressors using metal-organic chemical vapor deposition method. We have investigated the microscopic local strain and stress in the Ge/Ge1−x Sn x heterostructures using synchrotron microdiffraction and finite element method calculation. The microdiffraction measurement for an asymmetric lattice plane enables directly quantitative evaluation of the strain value of an individual Ge fine line structure with a few tens of nanometers width. An in-plane compressive strain value of 0.9% is achieved for a 30 nm-width Ge line with Ge1−x Sn x stressors, which corresponds to a compressive stress of 1.2 GPa.

Thermoelectric generator has attracted attention because of their ability to recover waste heat with converting it to electricity. The energy conversion efficiency is related to the thermoelectric figure of merit Z, expressed as Z = S2σ/κ, where σ and κ is electrical and thermal conductivities, respectively, and S is the Seebeck coefficient. Consequently, in order to achieve a high Z value, the material must possess a unique combination of electrical and thermal properties, i.e., metal-like high σ and glass-like low κ. In our previous study on electrical and thermal properties of a Ga-doped Ge0.929Sn0.071 thin film grown on Ge(001), it was revealed that simultaneous realization of a high σ (6.5×102 S/cm) and a low κ (2.0 Wm-1K-1) by the incorporations of the Sn and Ga atoms into Ge matrix [1]. Very recently, Uchida et al. [2] has reported heat transport property of polycrystalline GeSn (poly-GeSn) films on SiO2, together with the carrier transport property, to assess self-heating effect of the poly-GeSn channel thin-film transistors. Here, they showed a relatively lower κ of 5–9 Wm-1K-1 for poly-Ge1-xSnx (x-1K-1) [3]. These results are quite beneficial in the field of Ge-based thermoelectric generator. However, the thermoelectric properties of GeSn films have not been entirely understood. It is therefore, in the present study, we aim to reveal the thermoelectric properties of the Ge-rich poly-Ge1-xSnx films grown by solid phase crystallization. Doping effects in poly-Ge1-xSnxon the thermoelectric properties will be discussed. Acknowledgments The authors would like to thank Drs. Hiroshi Onoda and Yoshiki Nakashima of Nissin Ion Equipment Co., Ltd. for providing the opportunity to use ion implanters. This work was partially supported by a Grant-in-Aid for Scientific Research (S) (Grant No. 26220605) of the JSPS and PRESTO from JST. References [1] M. Kurosawa, M. Fukuda, K. Takahashi, M. Sakashita, O. Nakatsuka, and S. Zaima, “Thermophysical characterizations of Ge1-xSnx epitaxial layers aiming for thermoelectric device,” 9th International Conference on Silicon Epitaxy and Heterostructures (ICSI-9), Montreal, Canada, 4.4.1, May 21, 2015. [2] N. Uchida, T. Maeda, R. R. Lieten, S. Okajima, Y. Ohishi, R. Takase, M. Ishimaru, and J.-P. Locquet, Appl. Phys. Lett. 107, 232105 (2015). [3] C. J. Glassbrenner and G. A. Slack, Phys. Rev. 134, A1058 (1964).

The epitaxial growth of a Ge1 − xSnx layer was examined using metal-organic chemical vapor deposition (MOCVD) with two types of Ge precursors; tetra-ethyl-germane (TEGe) and tertiary-butyl-germane (TBGe); and the Sn precursor tri-butyl-vinyl-tin (TBVSn). Though the growth of a Ge1 − xSnx layer on a Ge(001) substrate by MOCVD has been reported, a high-Sn-content Ge1 − xSnx layer and the exploration of MO material combinations for Ge1 − xSnx growth have not been reported. Therefore, the epitaxial growth of a Ge1 − xSnx layer on Ge(001) and Si(001) substrates was examined using these precursors. The Ge1 − xSnx layers were pseudomorphically grown on a Ge(001) substrate, while the Ge1 − xSnx layer with a high degree of strain relaxation was obtained on a Si(001) substrate. Additionally, it was found that the two Ge precursors have different growth temperature ranges, where the TBGe could realize a higher growth rate at a lower growth temperature than the TEGe. The Ge1 − xSnx layers grown using a combination of TBGe and TBVSn exhibited a higher crystalline quality and a smoother surface compared with the Ge1 − xSnx layer prepared by low-temperature molecular beam epitaxy. In this study, a Ge1 − xSnx epitaxial layer with a Sn content as high as 5.1% on a Ge(001) substrate was achieved by MOCVD at 300 °C.

We have investigated the epitaxial growth and crystalline properties of Ge1 − xSnx layers on a Si(110) substrate. We found that the twin growth in the Ge epitaxial layer deposited on the Si(110) using molecular beam epitaxy at a low temperature of 200 °C can be effectively suppressed by the incorporation of 2.0% Sn. We also examined the strain relaxation of annealed Ge1 − xSnx/Si(110) samples. The degree of strain relaxation is enhanced by the annealing process, and the threading dislocation in the Ge1 − xSnx layers decreases from 1011 cm− 2 to 1010 cm− 2 because of the propagation of misfit dislocations. We also observed misfit dislocations formed at the Ge1 − xSnx/Si interface, which would effectively promote isotropic strain relaxation in the Ge1 − xSnx layers.

In this study, we report a power factor (PF) value as high as 1950 μW m−1 K−2 for B-ion implanted thermoelectric Si1-x-yGexSny ternary alloy films at ambient temperature by radio frequency sputtering followed by a short-term rapid thermal annealing heat treatment. The record high PF value was realized by modulation doping of Sn in the Si1-x-yGexSny film. It was found that using metallic Sn as nanoparticles and Si1-x-yGexSny as the matrix leads to a large enhancement of the carrier concentration and a very small decrease in carrier mobility. As a result, the electrical conductivity and power factor of the modulation doped Si1-x-yGexSny alloy were greatly improved. The findings of this study present emerging opportunities for the modulation of Si integration thermoelectrics as wearable devices charged by body temperature.

Thermoelectric properties of Ge 0.95 Sn 0.05 layers with various Ga concentrations (1018–1020 cm−3) grown on GaAs and Si by LTMBE have been investigated. Even for single-crystalline layers, the thermal conductivity has been reduced down to 2.5 Wm−1K−1 by introducing the stacking faults due to microscopic tilt in crystals, which value is 4% of bulk-Ge. The layer possessed a good electrical conductivity and Seebeck coefficient (73% and 79% of bulk-Ge, respectively); hence, a relatively good figure-of-merit (ZT=0.13 at 300 K) was obtained.

We have investigated thermoelectric (TE) properties of poly-Ge}_{1-x}Sn}_{x} layers prepared with pulsed laser annealing in water. Even for polycrystalline layers, relatively high power factors of 0.37 and 0.92 mWK−2m−1 were obtained for p- and n-type poly-Ge}_{1-x}Sn}_{x} layers, respectively. The Ge}_{1-x}Sn}_{x}-based TE generator has been firstly fabricated blow the process temperature of 300 °C.

We analyzed the incorporation of C atoms into a ternary alloy Ge 1 − x − y Sn x C y epitaxial film on Ge substrates on a sub-nanometer scale by using atom probe tomography. Periodic atom distributions from individual (111) atomic planes were observed both in the Ge 1 − x − y Sn x C y film and at the Ge substrates. Sn/C atoms had non-uniform distributions in the film. They also demonstrated a clear positive correlation in their distributions. Substitutional C atoms were only incorporated into the film when an Sn atom beam was applied onto the substrates under film growth conditions.

Research and development of GeSn and related group-IV semiconductor materials have been widely extended in recent years for not only electronic transistors but also various optoelectronic applications [1,2]. Design and engineering of the energy band structure of group-IV semiconductor materials are swiftly blossoming with establishing the crystal growth technology of GeSn and related materials. We have successively developed the crystalline growth technology of GeSn and GeSiSn thin films on various substrates mainly by using molecular beam epitaxy [1-7]. Recently, we also achieved the epitaxial growth of GeSn layer by using metal organic chemical vapor deposition method [8]. In this presentation, we will report our recent achievements of our study for the crystalline growth and electronic properties including energy band structure of GeSn and related group-IV materials. Controlling the composition of elements and the strain structure of the group-IV semiconductor alloys promises prospective energy band engineering technology. Increasing in the Sn content over about 10% or tensile strain over about 1% achieve the indirect-to-direct crossover, which is a strong driving force of the optical applications of GeSn material. In addition, we recently achieved the formation of polycrystalline SiSn thin layers with a very high Sn content of 20%, and demonstrated that the direct bandgap decreases to 1.05 eV with Si-Sn alloying, which is just 0.22 eV higher than the indirect bandgap of the poly-SiSn even by using Si matrix material [9]. Also, the ternary alloy GeSiSn promises the control of the energy band structure independently on the lattice constant by changing each content of three elements. We found that unstrained GeSiSn/Ge heterostructure realizes a type-I energy band alignment without using strain structure, that promises various electronic and optoelectronic applications [10]. We will demonstrate the experimental results of the energy band engineering with GeSn and related materials. The energy band engineering also provides controlling technology of the electronic property at the interface such as metal/Ge contact. Recently, we found that the Sn/Ge or GeSn/Ge contacts effectively reduces the Schottky barrier height at the metal/n-Ge interface [11,12]. In our presentation, we will also discuss the influence of the energy band structure on the interface properties for Ge and GeSn. This work was partially supported by Grant-in-Aid for Scientific Researches of the JSPS and the JSPS Core-to-Core Program, A. Advanced Research Networks. References [1] S. Zaima, Jpn. J. Appl. Phys. 52, 030001 (2013). [2] S. Zaima et al., Sci. Technol. Adv. Mater., submitted. [3] S. Zaima et al., ECS Trans. 41, 231 (2011). [4] S. Zaima et al., ECS Trans. 50, 897 (2012). [5] O. Nakatsuka et al., ECS Trans. 58, 149 (2013). [6] S. Zaima et al. ECS Trans. 64, 147 (2014). [7] O. Nakatsuka et al. ECS Trans. 64, 793 (2014). [8] Y. Inuzuka et al., ECS Solid State Lett., submitted. [9] M. Kurosawa et al., Appl. Phys. Lett. 106, 171908 (2015). [10] T. Yamaha et al., in Abstr. of ICSI-9, Montreal, Canada, May, 2015. [11] Suzuki et al., Jpn. J. Appl. Phys. 53, 04EA06 (2014). [12] A. Suzuki et al., SSDM2015, Hokkaido, Japan, Sept. 2015, to be submitted.

We investigated the crystalline structure of a NiGe layer grown on Ge(0 0 1) substrate through the reactive deposition method. NiGe layers grown at 350 °C are a single crystalline, provided that they are thin enough—below 22 nm. The epitaxial relationship with the Ge(0 0 1) substrate is then as follows: NiGe(1 1 1)//Ge(0 0 1), and NiGe[0 1 ¯ 1]//Ge[1 1 0]. However, the NiGe layer becomes polycrystalline when the thickness reaches 22 nm or thicker. We proposed a two-step deposition method combined with solid-phase reaction to suppress the polycrystalline formation and successfully achieved an epitaxial NiGe layer over 22 nm-thick with an atomically flat interface. We also clarified that the Ge atom is the dominant diffusion species during the reactive deposition and that the Ni atom dominates during the solid-phase reaction.

We examined the formation of polycrystalline-Si1−x−yGexSny layers on SiO2 by the solid phase crystallization method. We investigated the impact of Sn incorporation on the polycrystallization, crystallinity, and electrical property of Si1−xGex layers. We found that the polycrystallization time of Si1−x−yGexSny decreases with increasing in the Sn content in the annealing at 500 °C. No Sn precipitation is observed after the crystallization of Si1−x−yGexSny layer with an Sn content of 2%, while severe Sn precipitation is found in the sample with an Sn content of 10%. Moreover, larger grains of polycrystal can be obtained by the incorporation of 2%-Sn with comparison to that without Sn. The enlargement of polycrystalline grain of Si1−x−yGexSny improves in the hole mobility to 74 cm2/V s.

We have investigated the influence of tensile and compressive strain on the crystalline structures of Ge 1− x − y Si x Sn y epitaxial layers. The tensile strain in Ge 1− x − y Si x Sn y induces a non-uniform crystallinity of (2 2 0) lattice planes and surface roughening despite the strain magnitude is as small as 0.20%. In contrast, the unstrained or compressive strained Ge 1− x − y Si x Sn y layer exhibits a flat and uniform surface and high crystallinity. We found that the control of the sign of the strain is an important factor to obtain a high quality Ge 1− x − y Si x Sn y layer. Furthermore, substitutional Sn atoms in Ge 1− x − y Si x Sn y epitaxial layer with an Sn content of 10% are thermally stable for annealing at 500 °C.

Germanium (Ge) is a promising candidate semiconductor for channel material of low power consumption and high performance field-effect transistors (FETs) alternative to silicon because of high hole and electron mobilities and good process affinity of Ge for the integration on Si nanoelectronics. One of serious issues of Ge for the practical FET application is a high parasitic resistance at metal/n-type Ge (n-Ge) contact since its high contact resistivity owing to a high Schottky barrier height (SBH) of metal/n-Ge interface around 0.5–0.6 eV [1,2].

We have investigated the crystalline and electrical characteristics of heavily doped n-type Ge 1−x Sn x epitaxial layers with various Sb concentrations up to 1020 cm−3. In this study, we focus the thermal stability of Sb doped Ge 0.94 Sn 0.06 and Ge epitaxial layers and clarify the relationship between the crystalline and electrical characteristics. At the as-grown condition, the substitutional Sb concentration was achieved at higher than 2.6×1020 cm−3. After the post-deposition annealing, Sb-doped Ge 1−x Sn x maintained their superior crystallinity up to 400 °C, while the sheet resistance increases with Sb segregation. We also found that Sb atoms doped in the Ge 0.94 Sn 0.06 layer show a higher thermal robustness at 300 °C than those in the Ge layer.

Sn-related group-IV semiconductor such as Ge1-xSnx and Ge1-x-ySixSny are one of the most attractive materials for Si nanoelectronic applications. Ge1-xSnx alloy is expected to be a stressor for strain-engineering material of Ge devices [1,2]. In addition, Ge1-xSnx with a Sn content approximately higher than 10% is a direct transition semiconductor material, and that allows us to use electrons of the conduction band at the G-point for electronic applications. Those promise to improve on the performance of Ge devices and to introduce new functions of transistors, light receiving/emitting element, photovoltaic cells, etcon Si nanoelectronics. In these several years, we have investigated the crystal growth of Ge1-xSnx and Ge1-x-ySixSny thin films and the crystalline and electronic properties [2-5]. In addition, we have recently investigated and developed Ge1-xSnx technologies for electronic applications; those are (1) crystalline and electronic properties of defects, (2) strain and energy band engineering, (3) impurity doping, (4) metal/insulator/semiconductor (MOS) gate-stack structure, (5) metal/semiconductor (MS) contacts. In this report, we will present recent achievements in our research of Ge1-xSnxtechnology. Defects in Ge1-xSnx alloy It is known that a vacancy in Ge is an acceptor-like defect and undoped Ge grown at low temperature often shows p-type conduction. The formation and behavior of defects in Ge1-xSnx alloy should be essentially understood for electronic and optoelectronic applications. We investigated the influence of Sn on the electronic properties of Ge1-xSnx by preparing metal/Ge Schottky diodes with Sn-ion implantation and measuring the deep-level transient spectroscopy (DLTS) [6]. The Sn-ion implantation with a dose of 1014 cm-2 and a acceleration voltage of 370 kV generates acceptor-like defects in Ge substrate with a hole-concentration of 1017 cm-3, and these defects is hardly annihilated even after annealing as high as 500 °C. Also, we found by DLTS measurement that the concentration of vacancy-related deep-level defects can be reduced with Sn-implantation, although some additional Sn-related defects are formed. Oxidation of Ge1-xSnx and gate-stack structures It is essentially important to investigate the oxidation behavior of Ge1-xSnx for engineering the Ge1-xSnx gate-stacks. We previously reported the electrical properties of Al2O3/Ge1-xSnx/Ge MOS capacitors [7]. Recently, we examined the oxidation of Ge1-xSnx layers pseudomorphically grown on Ge substrate and investigated the behavior of Sn segregation during oxidation [8]. We found the surface segregation of Sn atoms near the Ge1-xSnx surface by oxidation at 400 °C. Thermal oxidation of Ge1-xSnx causes the Sn diffusion from Ge1-xSnx and the formation of Sn oxide on the surface. The capacitance-voltage measurement of Al/Al2O3/Ge1-xSnx capacitors also reveals that the oxidation of Ge1-xSnx increases in the concentration of holes unintentionally generated from acceptor-like defects in Ge1-xSnx layers. We need to develop the defect control technology for gate-stack formation of Ge1-xSnxwith considering Sn behavior during oxidation and annealing. Metal/Ge1-xSnx contact formation The formation of metal/Ge contacts with low parasitic resistance is required to improve on the performance of Ge devices. We examined the formation of NiGe/Ge1-xSnx contacts with germanidation processes of Ni/Ge1-xSnx system [9]. A single layer of Ni mono germanostanane, Ni(Ge1-xSnx) can be formed by annealing Ni/Ge1-xSnx/Ge samples at 350~550 °C. We found that the Sn content in Ni(Ge1-xSnx) increases with the Sn content of Ge1-xSnx and that decreases with the annealing temperature due to the Sn segregation from Ni(Ge1-xSnx). Smooth surface of Ni(Ge1-xSnx) layers on Ge1-xSnx can be successfully obtained with annealing at as low as 350 °C even for a Sn content as high as 6.5%, although the agglomeration of Ni(Ge1-xSnx) grains severely occurs after annealing at higher than 550°C. In summary, the incorporation of Sn promises additional key factors for engineering strain, energy band structure, interface, and defects in Ge nanoelectronics. We need to develop the crystal growth, process, and device technologies based on deeply understanding the crystalline and electronic properties of Sn-related group-IV semiconductor materials. Acknowledgements This work was partially supported by a Grant-in-Aid for Specially Promoted Research of MEXT and an ALCA Program of JST in Japan. References [1] S. Takeuchi et al., APL 92, 231916 (2008). [2] S. Takeuchi et al. ECS Trans. 33, 529 (2010). [3] O. Nakatsuka et al. ECS Trans. 58, 149 (2013). [4] S. Zaima et al., ECS Trans. 50, 897 (2012). [5] S. Zaima et al., ECS Trans. 41, 231 (2011). [6] T. Arahira et al., Ext. Abstr. of Int. Conf. on SSDM2013, p. 620, 2013. [7] C. Merckling et al., Appl. Phys. Lett. 98, 192110 (2011). [8] K. Kato et al., in Abstr. of IWDTF2013, p. 99, 2013. [9] T. Nishimura et al., Solid-State Electronics 60, 46 (2011).

Ge1-xSnx alloy thin films are much attractive for not only improving in Si nanoelectronics but also introducing new functional applications. High Sn content Ge1-xSnx promises to be direct semiconductor which promises the optoelectronic applications. We need to control the Sn precipitation, strain, dislocations, and point defects in Ge1-xSnx epitaxial layers for practical electronic and optoelectronic applications. We have been developing the growth technique of Ge1-xSnx epitaxial layers on various Si, Ge, Si on insulator (SOI), and Ge on insulator (GOI) substrates with molecular beam epitaxy (MBE) method [1-3]. Recently, we achieved high crystallinity Ge1-xSnx layers with a high Sn content up to 12% by lowering the growth temperature and controlling the lattice mismatch and strain [4]. In addition, the orientation of substrate has to be considered to improve on the crystalline quality and performance of Ge1-xSnx devices, because the substrate orientation significantly influence on the strain structure, defect structure, propagation of dislocations, energy band structures, and effective mass. The development of global- and local-growth technology of Ge1-xSnxepitaxial layers on not only Si(001) but also various substrates with (110) and/or (111) orientations is essentially required for various applications. Ge1-xSnx epitaxial growth on (110) and (111) substrates We examined the epitaxial growth of Ge1-xSnx layers on (110) and (111) Ge substrates [5-8]. We found that introducing Sn with a content as low as 2% into Ge is effective to reduce staking faults and twin defects in Ge epitaxial layers on (110) substrates even with the low-temperature growth of 150°C. We also found that the strain relaxation of Ge1-xSnxon (110) and (111) substrates takes place preferentially with a smaller Sn content than that grown on (001) substrate, that is attributed to the surface orientation dependence of the elastic modulus of epitaxial layers. The Sn incorporation into Ge also improves on the crystalline quality of epitaxial layers prepared with low-temperature MBE on Si(110) substrate [9]. Formation of twin defects in Ge epitaxial layers on Si(110) can be drastically suppressed by the incorporation of Sn with a content of 2%. The propagation of misfit dislocations can be effectively enhanced during the post deposition annealing by suppressing the formation of twin defects. Local growth of Ge1-xSnx epitaxial layers We examined the formation of locally strained Ge1-xSnx/Ge fine structure and characterized the microscopic local strain structures by using X-ray microdiffraction method [10]. The local growth of Ge1-xSnx with a Sn content of 6.5% on fine-structure-patterned-Ge is achieved with low-temperature MBE. The concentration of local stress in embedded Ge1-xSnx layer causes the degradation of crystallinity with tilting of the lattice plane and Sn precipitation. We can directly measure the individual local strain in Ge sandwiched with Ge1-xSnxlocal stressor by microdiffraction. We demonstrate increasing in the in-plane strain with shrinking the Ge width and increasing the Sn content. The maximum in-plane compressive strain is estimated to be 1.4% for a width of 25 nm. In the presentation, we will also talk about some electronic and optical properties of high Sn content Ge1-xSnx epitaxial layers and introduce some recent achievement in the epitaxial growth of Sn-related ternary alloys such as Ge1-x-ySixSny. Acknowledgements This work was partially supported by a Grant-in-Aid for Specially Promoted Research of MEXT, the JSPS through the FIRST Program, and the ALCA program from JST in Japan. The microdiffraction measurement was performed at SPring-8 with the approval of general proposals (No. 2013A1682 and No. 2013B1779/BL13XU). References [1] S. Zaima et al., ECS Trans. 41, 231 (2011). [2] S. Zaima et al., ECS Trans. 50, 897 (2012). [3] O. Nakatsuka et al., ECS Trans. 58, 149 (2013). [4] Y. Shimura et al., ECS Trans. 33, 529 (2010). [5] Y. Shimura et al., Appl. Phys. Express 5, 015501 (2012). [6] T. Asano et al., Thin Solid Films 531, 504 (2013). [7] T. Asano et al., Solid-State Electron. 83, 71 (2013). [8] T. Asano et al., Thin Solid Films, 557, 159 (2014). [9] S. Kidowaki et al., in Ext. Abstra of SSDM2012, p. 1043, Fukuoka, Japan, Sept., 2013. [10] S. Ike et al., Thin Solid Films, 557, 164 (2014).

We have investigated the epitaxial formation and electrical properties of Ni germanide/Ge(110) contacts. X-ray diffraction and transmission electron microscopy measurements have revealed that Ni5Ge3 and NiGe layers are epitaxially formed on a Ge(110) substrate after annealing at 200–350 °C. An epitaxial Ni5Ge3 layer is formed after annealing with the relationships Ni5Ge3(001)//Ge(110) and Ni5Ge3[311]//Ge[001]. We found that the orientation relationship between an epitaxial NiGe layer and Ge(110) substrate depends on the annealing temperature. When annealed at 300–350 °C, the orientation relationship is NiGe(100)//Ge(110) and NiGe[001]//Ge[001], while at 200–230 °C, the relationship is NiGe(102)//Ge(110) and NiGe[010]//Ge[001]. We demonstrate that the Schottky barrier height of the epitaxial NiGe(100)/Ge(110) contact is as low as 0.44 eV, as estimated from the current density–voltage characteristics, while that of polycrystalline NiGe/Ge(001) is 0.55 eV.

In this study, we have examined the formation of uniaxially strained Ge microstructures with embedded Ge 1 − x Sn x epitaxial layers and the microscopic local strain structure in Ge and Ge 1 − x Sn x using synchrotron X-ray microdiffraction and the finite element method. We achieved local heteroepitaxial growth of Ge 0.947 Sn 0.053 layers on the Ge recess regions. Microdiffraction measurements reveal that an average uniaxial compressive strain of 0.19% is induced in Ge locally with Ge 1 − x Sn x stressors. In addition, we found that the Sn precipitation near the Ge 1 − x Sn x /Ge(001) interface occurs after post-deposition annealing at 500 °C without the introduction of dislocation. It is considered that the local Sn precipitation occurs preferentially due to the larger residual stresses near the Ge 1 − x Sn x /Ge interface.

We have investigated the effect of the film thickness and lattice spacing of Zr oxides on the crystalline structures of Zr oxide films formed by atomic layer deposition (ALD) and sputtering methods to achieve higher-k tetragonal ZrO2 (t-ZrO2) films. In the ALD case, the t-ZrO2 crystalline structure stably formed over a wide range of film thicknesses (8 to 130 nm). The Zr oxide films with a t-ZrO2 structure prepared by ALD and post-deposition annealing at 350 °C achieved a relative permittivity of 35 ± 2. On the other hand, the ratio of the t-ZrO2 phase to the monoclinic (m-) ZrO2 phase decreases with increasing thickness of the Zr oxide film formed by sputtering, although it can be increased by Ge incorporation. Focusing on the relationship between the lattice spacing and the crystalline phase of Zr oxide, the t-ZrO2 crystalline structures are stably formed with decreasing lattice spacing of the t-ZrO2 crystalline structure. The effect of the lattice spacing on the t-ZrO2 crystalline structure formation is suitably explained in terms of the bulk (volume) energy of the t-ZrO2 phase.

Bulk and surface crystalline structures of the SiGe (001) substrate formed by the traveling liquidus-zone (TLZ) method were characterized. In addition, a possibility of the SiGe substrate as a seed for the strained-Ge/SiGe structures in optoelectronic and electronic devices has been investigated through surveying cleaning methods of the SiGe surface. It was found that the TLZ method can provide the high quality SiGe substrate with the threading dislocation density of the range from 4 × 10 5 to 6 × 10 7 cm − 2 . The high quality SiGe substrate treated with the appropriate chemical and thermal cleaning makes it possible to grow the epitaxial Ge layer with large strain of 1.3%. Consequently, we clarified that the high quality SiGe substrate fabricated by the TLZ method has a high potential as the seed for the strained-Ge layer in the devices.

We have investigated the substrate orientation dependence of the crystallinity and strain relaxation behavior of Ge and Ge 1 − x Sn x layers epitaxially grown on Ge(001), (110), and (111) substrates. The strain relaxation in Ge 1 − x Sn x layers on Ge(110) and (111) occurs from a strain value smaller than that on Ge(001). We obtained the critical strain energy of a Ge 1 − x Sn x layer regardless of Ge substrate orientation. As a result, we achieved the epitaxial growth of pseudomorphic Ge 1 − x Sn x layers with high substitutional Sn contents of 8.5% and 6.7% on Ge(110) and (111) substrates, respectively.

For formation of gate dielectrics with higher permittivity (higher-k) using rare-earth oxide thin film, we have investigated the effect of H2O partial pressure (PH2O) during the Pr-oxide film formation and annealing on the Pr valence states and the amorphous and crystalline phase structures of the Pr-oxide films. The amorphous structure of Pr-oxide is dominantly formed in the film formed by metal–organic chemical vapor deposition (MOCVD) at a low temperature of 300 °C. The decrease in PH2O during MOCVD leads to the formation of Pr2O3 (Pr3 +) composition compared with PrO2 (Pr4 +) composition. It achieves the increase in the permittivity of the Pr-oxide films. The PH2O value drastically changes the grain size of crystal Pr-oxide in the amorphous film, and the crystalline structure is identified to be hexagonal Pr2O3 without depending on the Pr-oxide composition in the amorphous region. The annealing of the Pr2O3 film in vacuum at 500 °C promotes the crystallization of the hexagonal Pr2O3 phase, although the annealing in N2 ambient forms cubic Pr2O3 phase.

The impact of the post thermal oxidation of the Al2O3/Ge structures on metal-oxide-semiconductor interface properties has been systematically investigated. Also, the reaction mechanisms at the Al2O3/Ge interfaces with thermal oxidation through the thin Al2O3 layer have been investigated. Interface state density around the midgap of Ge is reduced with the formation of AlGeO layer near the Al2O3/Ge interface. Also, through the detail analysis of chemical bonding state of Ge oxide, it is found that the AlGeO layer which has a stable phase, in other words Al6Ge2O13, is formed near the Al2O3/Ge interface, and a GeO2 layer is formed on the Al2O3 surface, suggesting Ge or GeO diffusion from the Ge surface. Furthermore, it is clarified that the mechanism of formation of AlGeO layer is different from that of GeO2 on the Al2O3 surface which is limited by oxygen diffusion in Al2O3 layer. Therefore, Al6Ge2O13 formation near the Al2O3/Ge interface without the GeO2 formation on the Al2O3 surface is a key to achieve a low interface state density and a thin equivalent SiO2 thickness.

We investigated the position of Sn atoms in Ge1 − xSnx film grown at a low temperature by using the Extended X-ray Absorption Fine Structure (EXAFS) method. Vacancies had been expected to be introduced near the growing surface vicinity of a Sn atom and located at a split-vacancy position due to the binding nature between a Sn atom and a vacancy, which was predicted by the calculation for a bulk model in the literature. However, the EXAFS showed that almost all Sn atoms were located at the substitutional position and did not form a split-vacancy.

We investigated impacts of the Ar and CF4 plasma during reactive ion etching (RIE) on defect formation in the Ge substrates using the deep-level-transient-spectroscopy (DLTS) technique. It was found that the Ar plasma causes the roughening of the Ge surface. Moreover, the Ar plasma induces a defect with an energy level of 0.31 eV from the conduction band minimum in the Ge substrate, confirming by DLTS spectra. On the other hand, the CF4plasma hardly induces the surface roughness of Ge. However, the CF4plasma induces many kinds of electron and hole traps. It should be noted that the defects associated with Sb and interstitials are widely distributed to around 3-µm.

Group-IV element semiconductor materials, germanium tin (GeSn) and germanium silicon tin (SiGeSn) have attracted much attention for electronic and optoelectronic applications because of those unique properties; direct transition with a high Sn content, higher carrier mobility than Si and Ge, low growth temperature, and low thermal conductivity [1-3]. GeSiSn realizes the control of energy band structure independently on the lattice constant of alloy. Also, GeSiSn/Ge(Sn) heterostructure provides a type-I energy band alignment with sufficiently large energy band offsets at both conduction and valence band edges simultaneously with the lattice constant matching. That promises an effective carrier confinement structure for quantum well laser and high electron mobility transistor. On the other hand, the development of crystal growth technology for GeSn-related materials is still a challenge, since the thermal equilibrium solid solubilities of Sn in Ge and Si are very low compared to a required substitutional Sn content higher than 10%. It is necessary to understand the behavior of Sn atoms in the epitaxial growth and post deposition process and to control the stability of Sn at substitutional site in GeSn-related epitaxial layers. In addition, the development of interface engineering technology is required for not only GeSn/GeSiSn heterostructure but also metal/GeSn and insulator/GeSn structures for nano-scale electronic devices. Recently, we examined the formation of double heterostructure with GeSiSn/GeSn/GeSiSn layers on Ge substrate using a molecular beam epitaxy (MBE) system [4]. The hard x-ray photoelectron spectroscopy measurement reveals that the sufficiently large energy band offset can be formed at the valence band edge of its GeSiSn/GeSn interface. We also demonstrated that the carrier confinement with this GeSiSn/GeSn/GeSiSn double heterostructure effectively improved the efficiency of photoluminescence (PL) [5]. However, we also found that the crystalline quality of the heteroepitaxial layers significantly influence on the PL intensity and it is necessary to understand the key factor of the crystallinity of heterostructures in order to reduce the dislocation and point defect in the epitaxial layers. For the low temperature growth of GeSn and GeSiSn hetero-epitaxial layers on Ge using MBE, a biaxial compressive strain is often induced into the epitaxial layers, as a GeSn or GeSiSn layer is often grown pseudomorphically on Ge substrate. The compressive strain of GeSn is a disadvantage for enhancing the luminescence efficiency because a higher Sn content is generally required to the indirect-to-direct crossover for a compressively strained GeSn compared to the unstrained case. In order to improve the efficiency of luminescence, it is important not only to enhance the Sn content but also to control the strain structure. We developed the strain relaxation technology of GeSn epitaxial layer on a substrate or buffer layer. We found that the ion implantation into Ge substrate effectively enhance the strain relaxation of GeSn layer. The degree of strain relaxation achieved over 90% for the GeSn layer grown on the Ge substrate after the boron ion implantation with 3x1014 cm-2, while the compressively strained GeSn layer was pseudomorphically grown on the Ge substrate without the ion implantation. This work was partly supported with a Grant-in-Aid for Scientific Research (S) (No. 26220605) and the Core-to-Core Program ICRC-ACP4ULSI from the JSPS. References [1] S. Zaima, O. Nakatsuka, N. Taoka, M. Kuorsawa, W. Takeuchi, and M. Sakashita, Sci. Technol. Adv. Mater. 16, 043502 (2015). [2] S.Wirths, D.Buca, and S.Mantl, Prog. Crystal Growth Character. Mater. 62, 1 (2016) [3] M. Kurosawa, Y. Imai, T. Iwahashi, K. Takahashi, M. Sakashita, O. Nakatsuka, and S. Zaima, ECS Trans. 86, 311 (2018). [4] M. Fukuda, T. Yamaha, T. Asano, S. Fujinami, Y. Shimura, M. Kurosawa, O. Nakatsuka, and S. Zaima, Mater. Sci. Semicond. Proc. 70, 156 (2017). [5] M. Fukuda, K. Watanabe, M. Sakashita, M. Kurosawa, O. Nakatsuka, and S. Zaima, Semicond. Sci. Technol. 32, 104008 (2017).

We have investigated the formation and optoelectronic properties of strain relaxed Ge1−x−y Si x Sn y /Ge1−x Sn x /Ge1−x−y Si x Sn y double heterostructures on ion-implanted Ge substrates. The strain relaxation of Ge1−x−y Si x Sn y and Ge1−x Sn x epitaxial layers was achieved using an ion-implanted Ge substrate. The maximal degree of strain relaxation (DSR) of the Ge1−x Sn x layers was evaluated to be 46%. In addition, we obtained a sharp and strong peak in the photoluminescence (PL) spectra from the sample with a DSR of 46%, while no strong peak was detected from a sample with a smaller DSR (22%). From the theoretical calculation of the energy band structure and the measurement temperature dependence of the PL intensity, the sharp and strong peak can be explained by the transition from an indirect to direct bandgap semiconductor due to the increase of the DSR and a concomitant increase of the Γ-valley electron population. Moreover, the PL intensity increases by the improvement of the crystallinity by a post deposition annealing process.

A thin-film thermoelectric generator composed of p- and n-type poly-Ge1−x Sn x (x ∼ 0.02) on a Si(001) covered with SiO2 has been successfully fabricated by low thermal budget processes (under 300 °C) and demonstrated for the first time. Both the crystallization and dopant activation were simultaneously performed using pulsed UV laser irradiation in flowing water. A recorded activation ratio of Sb in the poly-Ge1−x Sn x enabled a relatively high power factor (9.2 μ Wcm−1 K−2 at RT), which is comparable to the counterparts of n-type Ge1−x Sn x layers epitaxially grown on InP(001).