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Very fast transients of V {\text {TH}} shift and their impact on R\mathrm{\scriptscriptstyle ON} under dynamic AC (1 k–1 MHz) positive gate stress in depletion-mode (D-mode) metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) are revealed. We achieve data acquisition within 120 ns right after each stress pulse throughout the entire stress time range from 10^ -7 up to 10^ 3 s, by virtue of a short stress-to-sense delay of \sim 100 ns and high sampling rate up to 50 MSa/s. Despite the considerable V_{\mathrm {\mathbf {TH}}} shift, its impact on R\mathrm{\scriptscriptstyle ON} in D-mode MIS-HEMT is modest, if the device is under sufficient gate overdrive. Furthermore, V_{\mathrm {\mathbf {TH}}}$ shift and the consequent R\mathrm{\scriptscriptstyle ON} increase under dynamic stress, which are more relevant to high-frequency switching operation, exhibits frequency dependence within 1 k–1 MHz and is always smaller than that under conventionally used static (constant) stress. [ABSTRACT FROM PUBLISHER]

A low on-resistance normally-off GaN double-channel metal–oxide–semiconductor high-electron-mobility transistor (DC-MOS-HEMT) is proposed and demonstrated in this letter, which features a 1.5-nm AlN insertion layer (ISL) located 6 nm below the conventional barrier/GaN interface, forming a second channel at the interface between the AlN-ISL and the underlying GaN. With gate recess terminated at the upper channel, normally-off operation was obtained with V\mathrm {th} of +0.5 V at I\mathrm {DS}= 10 ~\mu \text{A} /mm or +1.4 V from the linear extrapolation of the transfer curve. The lower heterojunction channel is separated from the etched surface in the gate region, thereby maintaining its high field-effect mobility with a peak value of 1801 cm2/( \textV\cdot \texts ). The on-resistance is as small as 6.9 \Omega \cdot \text mm for a DC-MOS-HEMT with LG/L\mathrm {GS}/L\mathrm {GD} = 1.5/2/15~\mu \text{m} , and the maximum drain current is 836 mA/mm. A high breakdown voltage (>700 V) and a steep subthreshold swing of 72 mV/decade are also obtained. [ABSTRACT FROM AUTHOR]

In this paper, we systematically investigated the leakage and breakdown mechanisms of the low-pressure chemical vapor deposition (LPCVD) silicon nitride thin film deposited on AlGaN/GaN heterostructures. The LPCVD-SiNx gate dielectric exhibits low leakage and high breakdown electric field. The dominant mechanism of the leakage current through LPCVD-SiNx gate dielectric is identified to be Poole–Frenkel emission at low electric field and Fowler–Nordheim tunneling at high electric field. Both electric-field-accelerated and temperature-accelerated time-dependent dielectric breakdown of the LPCVD-SiNx gate dielectric were also investigated. [ABSTRACT FROM PUBLISHER]

The temperature dependence of current collapse (CC) in AlGaN/GaN high-electron mobility transistors on silicon substrate is studied in this paper. Devices without and with Si3N4 passivation are used to investigate the behavior of surface- and buffer-induced CC, respectively. It is found that the degree of surface-induced CC in unpassivated devices has a weak temperature dependence, which is induced by the cancelling out between enhanced carrier injection based on surface hopping and enhanced emission when the temperature is increased. On the other hand, the degree of buffer-induced CC in the Si3N4 passivated devices is reduced at higher temperature since the energy of hot electrons is reduced due to the phonon scattering and the trapping of hot electrons in the buffer is mitigated. Temperature-dependent transient measurement is also carried out to investigate the recovery process for these two type of CC. Two types of trap levels are identified in the unpassivated and Si3N4 passivated devices, respectively. The trap level $E1$ with an activation energy of 0.08 eV is supposed to be related to the surface trapping, while $E2$ with an activation energy of 0.22 eV is located in the buffer layer. [ABSTRACT FROM AUTHOR]

Effective interface trap characterization approaches are indispensable in the development of gate stack and dielectric surface passivation technologies in III-nitride (III-N) insulated-gate power switching transistors for enhanced stability and dynamic performance. In III-N metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) that feature a buried channel, the polarized barrier layer separates the critical dielectric/III-N interface from the two-dimensional electron gas (2DEG) channel and consequently complicates interface trap analysis. The barrier layer not only causes underestimation/uncertainty in interface trap extraction using conventional ac-conductance method but also allows the Fermi level dipping deep into the bandgap at the pinch-off of the 2DEG channel. To address these issues, we analyze the frequency/temperature dispersions of the second slope in capacitance-voltage characteristics and develop systematic ac-capacitance techniques to realize interface trap mapping in MIS-HEMTs. The correlation between ac-capacitance and pulse-mode hysteresis measurements show that appropriate gate bias need to be selected in the interface trap characterization of MIS-HEMTs, in order to match the time constant of interface traps at the Fermi level with ac frequency and pulsewidth. [ABSTRACT FROM AUTHOR]

Effective interface engineering techniques in III-nitride heterojunction power devices, aiming at yielding high VTH stability in insulated-gate devices and suppressed current collapse in high-voltage switching operation, are of critical significance to enhance device performance and reliability. In this work, we present an interface enhancement technology featuring in situ low-damage NH3/Ar/N2 pre-gate plasma treatment prior to the ALD-Al2O3 deposition for high-performance III-nitride MIS-HEMTs. It is manifest that this technology can effectively remove the native oxide while forming a monocrystal-like nitridation interfacial-layer (NIL) on the III-nitride surface. The Al2O3(NIL)/GaN/AlGaN/GaN MIS-heterostructures with high-quality interface exhibit well-behaved electrical characteristics, including a small subthreshold swing of ∼64 mV/dec, a small hysteresis of ∼0.09 V, tiny f/T dispersions in the C- V characteristics, and low interface trap density of ∼1 × 1012-6 × 1012 cm−2eV−1. Cross-sectional TEM micrograph of the Al2O3/III-nitride gate stack with a monocrystal-like nitridation interfacial-layer (NIL). [ABSTRACT FROM AUTHOR]

In this work, by using an on-chip integrated Schottky-on-heterojunction light-emitting diode (SoHLED) which is seamlessly integrated with the AlGaN/GaN high electron mobility transistor (HEMT), we studied the effect of on-chip light illumination on the de-trapping processes of electrons from both surface and bulk traps. Surface trapping was generated by applying OFF-state drain bias stress, while bulk trapping was generated by applying positive substrate bias stress. The detrapping processes of surface and/or bulk traps were monitored by measuring the recovery of dynamic on-resistance Ron and/or threshold voltage Vth of the HEMT. The results show that the recovery processes of both dynamic Ron and threshold voltage Vth of the HEMT can be accelerated by the on-chip SoH-LED light illumination, demonstrating the potentiality of on-chip hybrid opto-HEMTs to minimize the influences of traps during dynamic operation of AlGaN/GaN power HEMTs. [ABSTRACT FROM AUTHOR]

We report the first gallium nitride (GaN)-based pulse width modulation (PWM) integrated circuit (IC) featuring monolithically integrated enhancement- and depletion-mode high electron mobility transistors and lateral field-effect rectifiers on the GaN smart power technology platform. The PWM IC is able to generate 1-MHz PWM signal with its duty cycle modulated effectively by a reference voltage ( Vc) over a wide range with good linearity. It features a 5 V supply voltage and is composed of a sawtooth generator and a comparator, both of which can be operated at 1 MHz and exhibit proper functionality over a wide temperature range (from 25 °C to 250 °C). This circuit demonstration further proves the feasibility of an all-GaN solution that features monolithically integrated peripheral gate control circuits and power switches for GaN power converters. An all-GaN solution would lead to a compact system with improved efficiency and enhanced reliability. [ABSTRACT FROM AUTHOR]

Al2O3–AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) featuring indium tin oxide transparent gate electrode are fabricated for the purpose of evaluating the gate reliability. The transparent gate electrode allows electroluminescence (EL) observation in the region directly under the gate, which cannot be performed in conventional MIS-HEMTs with opaque gate electrode. Normally OFF transparent-gate MIS-HEMTs were realized by implanting fluorine ions into the AlGaN barrier prior to the deposition of Al2O3. The dependence of EL on bias condition was investigated with the color of EL resolved by filters. Gate dielectric degradation in MIS-HEMTs was induced by OFF state drain-bias stress, as detected by the increased gate leakage current. Location of the gate degradation could be clearly identified by EL imaging through the transparent gate. From the EL image, the passivation layer under the overhang of T-shaped gate is found to be vulnerable to OFF-state stress, which is confirmed by simulation. [ABSTRACT FROM AUTHOR]

We report the interface characterization of Al2O3/AlN/GaN MOS (metal-oxide-semiconductor) structures with an AlN interfacial layer. A thin monocrystal-like interfacial layer (AlN) is formed at the Al2O3/GaN to effectively block oxygen from the GaN surface and prevent the formation of detrimental Ga-O bonds. The suppression of Ga-O bonds is validated by X-ray photoelectron spectroscopy of the critical interface. Frequency-dispersion in C-V characteristics has been significantly reduced, owing to improved interface quality. Furthermore, using the conventional conductance method suitable for extracting the interface trap density Dit in MOS structures, Dit in the device with AlN was determined to be in the range of 1011-1012eV-1cm-2, showing one order of magnitude lower than that without AlN. Border traps near the gate-dielectric/GaN interface were identified and shown to be suppressed by the AlN interfacial layer as well. [ABSTRACT FROM AUTHOR]

High quality Al2O3 film grown by atomic layer deposition (ALD), with ozone (O3) as oxygen source, is demonstrated for fabrication of normally-off AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs). Significant suppression of Al-O-H and Al-Al bonds in ALD-Al2O3 has been realized by substituting conventional H2O source with O3. A high dielectric breakdown E-field of 8.5 MV/cm and good TDDB behavior are achieved in a gate dielectric stack consisting of 13-nm O3-Al2O3 and 2-nm H2O-Al2O3 interfacial layer on recessed GaN. By using this 15-nm gate dielectric and a high-temperature gate-recess technique, the density of positive bulk/interface charges in normally-off AlGaN/GaN MIS-HEMTs is remarkably suppressed to as low as 0.9 x 1012cm-2, contributing to the realization of normally-off operation with a high threshold voltage of +1.6 V and a low specific ON-resistance RON,sp of 0.49 mΩ cm². [ABSTRACT FROM AUTHOR]

In this work, we attempt to reveal the underlying mechanisms of divergent V TH-thermal-stabilities in III-nitride metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT) and MOS-Channel-HEMT (MOSC-HEMT). In marked contrast to MOSC-HEMT featuring temperature-independent VTH, MIS-HEMT with the same high-quality gate-dielectric/III-nitride interface and similar interface trap distribution exhibits manifest thermally induced VTH shift. The temperature-dependent VTH of MIS-HEMT is attributed to the polarized III-nitride barrier layer, which spatially separates the critical gate-dielectric/III-nitride interface from the channel and allows "deeper" interface trap levels emerging above the Fermi level at pinch-off. This model is further experimentally validated by distinct VG-driven Fermi level movements at the critical interfaces in MIS-HEMT and MOSC-HEMT. The mechanisms of polarized III-nitride barrier layer in influencing VTH-thermal-stability provide guidelines for the optimization of insulated-gate III-nitride power switching devices. [ABSTRACT FROM AUTHOR]

On a GaN smart power integrated circuit (IC) platform, a highly linear (i.e., proportional to absolute temperature) temperature sensor IC is demonstrated for building voltage references as well as temperature compensation functional blocks. The circuit is designed based on the temperature-dependent characteristics of GaN-based peripheral devices (e.g., heterojunction Schottky barrier diode, enhancement-/depletion-mode high electron mobility transistors, and lateral field-effect rectifiers) that are monolithically integrated with high-voltage power devices. This monolithic integration scheme facilitates the design efforts in taking full advantages of GaN’s superior capability to operate at high temperatures. Proper circuit operation was demonstrated at 275 °C. [ABSTRACT FROM AUTHOR]

In this paper, we report the device performance of a high-voltage normally off Al2O3/GaN MOSFET on the Si substrate. Normally off operation is obtained by multiple cycles of O2 plasma oxidation and wet oxide-removal gate recess process. The recessed normally off GaN MOSFET with 3 \mum gate-drain distance exhibits a maximum drain current of 585 mA/mm at 9 V gate bias. The threshold voltage of the MOSFET is 2.8 V with a standard derivation of 0.2 V on the sample with an area of 2 \,\times\, 2 {\rm cm}^{2} . The gate leakage current is below 10^{-6}~{\rm mA}/{\rm mm} during the whole gate swing up to 9 V and the I{\scriptstyleON}/I{\scriptstyle OFF} ratio is larger than 10^{9} , indicating the good quality of Al2O3 gate insulator. The MOSFET with 10 \mum gate-drain distance shows a three terminal OFF-state breakdown voltage (BV) of 967 V at zero gate-source bias with a drain leakage current criterion of 1 \muA/mm . The specific ON-resistance $(R_{{{\scriptstyle {\rm ON}}},{\rm SP}}) of the device is 1.6 m\Omega\,\cdot\,cm^2 and the power figure of merit (BV^2/R{{\scriptstyle ON},SP}) is 584 MW/cm^2 . [ABSTRACT FROM AUTHOR]

The degradation of transient OFF-state leakage current in AlGaN/GaN HEMTs induced by ON-state gate overdrive was observed and studied. The OFF-state leakage current increases significantly with a pre- ON-state gate overdrive. It takes more than 30 s for the leakage current decay to its equilibrium level in dark. The decay processes follow a stretched-exponential law. We propose that this degradation corresponds to the persistent photoconductivity of GaN buffer induced by the electroluminescence during the Schottky gate overdrive. Both the ON-state gate overdrive bias and duration dependences of the OFF-states leakage degradation were studied. This work indicates that gate-protection is necessary to preserve low OFF-state leakage current and improve device reliability. (© 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim) [ABSTRACT FROM AUTHOR]

The GaN-to-Si vertical conduction mechanisms on a low resistivity p-type (111) Si substrate under high-voltage operation are investigated using the temperature-dependent high-voltage C-V characterization and device simulation. It is found the deep depletion and weak inversion in Si will result in a high electric field at the GaN/Si interface and induce the impact ionization of Si. The generated electrons will be injected into GaN buffer layer, fill in buffer traps and act as free carriers in GaN, eventually leading to considerable vertical leakage in the AlGaN/GaN-on-Si structures. (© 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim) [ABSTRACT FROM AUTHOR]

We experimentally demonstrate a high-voltage low-standby power startup circuit for powering up the off-line switched-mode power supply (SMPS) during the startup period by exploiting monolithically integrated enhancement/depletion-mode metal–insulator–semiconductor high electron mobility transistors (E/D-mode MIS-HEMTs) fabricated on a GaN-on-Si power device platform. The E/D-mode MIS-HEMTs exhibit a threshold voltage of +1.2 and -11~V, respectively. The high-voltage D-mode device used in the demonstration features an OFF-state breakdown voltage of 640 V and a safe operating area with a thermal limitation of 11.6 W/mm, whereas the low-voltage E-mode device features a source-gate breakdown voltage of 98 V, satisfying the requirement of the startup circuit. The functionality of the startup circuit is successfully achieved with an input voltage range 10–200 V and a startup current of 1.08 mA. [ABSTRACT FROM AUTHOR]

In this paper, we investigate the enhancement-mode (E-mode) LaLuO3 (LLO)-AlGaN/GaN metal-insulator-semiconductor high-electron mobility transistors (MIS-HEMTs) fabricated using fluorine (F) plasma ion implantation with a gate-dielectric-first planar process. The E-mode MIS-HEMTs exhibit a threshold voltage (VTH) of 0.6 V, a peak transconductance of \sim193~mS/mm, a small hysteresis of 0.04 V in linear region characterized by a pulse-mode current-voltage measurement, and significantly suppressed current collapse under high-drain-bias switching conditions. X-ray photoelectron spectroscopy and secondary ion mass spectrometry analyses manifest that the negatively charged F ions penetrating into the (Al)GaN barrier layer serve as the primary VTH modulation mechanism, whereas the F ions in the fluorinated LLO film form chemical bonds with La/Lu atoms and become charge-neutral. The suppressed current collapse is verified as an advantageous byproduct of the F plasma ion implantation that also fluorinated the SiNx sidewalls in the vicinity of the gate electrode, and therefore, suppress electron injection to the gate-drain access region. [ABSTRACT FROM AUTHOR]

In this paper, we demonstrate a 253% improvement in the off-state breakdown voltage (BV) of the lattice-matched \In0.17\Al0.83 \N/GaN high-electron-mobility transistors (HEMTs) by using a new Schottky-contact technology. Based on this concept, the Schottky-source/drain and Schottky-source (SS) InAlN/GaN HEMTs are proposed. The proposed InAlN/GaN HEMTs with an LGD of 15 \mu\m showed a three-terminal BV of more than 600 V, while the conventional InAlN/GaN HEMTs of the same geometry showed a maximum BV of 184 V. Without using any field plate, the BV of 650 V was measured in the SS InAlN/GaN HEMTs with LGD = \15\ \mu\m, which is the highest BV ever achieved on InAlN/GaN HEMT. The corresponding specific on-resistance (Rsp, on) is as low as 3.4 \m\Omega \cdot \cm^2. A BV of 118 V was also obtained in SS InAlN/GaN HEMTs with LGD = \1\ \mu\m, which is the highest BV in GaN-based HEMTs featuring such a short LGD with GaN buffer. The improvement of the BV relies on the effective suppression of source carrier injection into the GaN buffer under the SS due to the smooth metal morphology and elimination of metal spikes in the Schottky metallization. [ABSTRACT FROM AUTHOR]

Improvement of the AlGaN/GaN high-electron mobility transistor's (HEMT's) off -state breakdown voltage is achieved by implanting ^19\F^+ ions at an energy of 50 keV and dose of \1 \times \10^12\ \cm^-2 under the gate region using \BF3 as the source. The charge state of the implanted fluorine ions changes from positive to negative in the AlGaN/GaN structure because of fluorine's strong electronegativity. The negative-charged fluorine ions at the back side of the two-dimensional electron gas can raise the energy barrier of the GaN buffer layer under the channel, effectively blocking the current injected from the source to the high-field region of the GaN channel when the HEMT is biased at off-state. The source-injected electrons, if not blocked, could flow to the high-field region and initiate a premature three-terminal off-state breakdown in a conventional AlGaN/GaN HEMT. A 38% improvement of the three-terminal off-state breakdown voltage and 40% improvement of the power figure-of-merit VBD-off^2/Ron are achieved in the enhanced back barrier HEMT. [ABSTRACT FROM AUTHOR]

AlGaN/GaN high-electron mobility transistor's (HEMT's) off-state breakdown is investigated using drain-current injection techniques with different injection current levels. Competitions between the source leakage and gate leakage, pure leakage and impact ionization, and source- and gate-injection-induced impact ionization during the drain-injection measurement are discussed in detail. It was found that the breakdown originates from the source/gate leakage at low drain injection levels but is dominated by source/gate-induced impact ionization process at high drain injection currents. The source-induced impact ionization usually precedes the gate-induced impact ionization in low-gate leakage devices, resulting in a premature three-terminal off-state breakdown. We also found that the gate-bias value affects the breakdown voltage in the conventional three-terminal off-state breakdown I-V measurement and should be carefully considered. [ABSTRACT FROM AUTHOR]

In this paper, a zero-bias mixer using a lateral field-effect diode fabricated on standard GaN-on-Si AlGaN/GaN high electron-mobility-transistor wafers is demonstrated. The diode features strong nonlinearity near zero bias, enabled by a threshold-voltage modulation using a fluorine-plasma-treatment technique. The maximum change in conductance was adjusted to ~0 V, leading to optimal conversion loss (CL) of the mixer at zero bias and eliminating the need for any dc supplies. The mixer is characterized from room temperature (RT) to 250 °C. At 2.5 GHz and at RT, the CL and third-order intermodulation intercept point are 12.9 dB and 17.64 dBm, respectively. The operation of the proposed diode is modeled by a physical equivalent circuit, wit the element values extracted from the measured S-parameters. The voltage-biasing dependence of the CL can be explained by a the model. The high-temperature operation of the mixer shows that the proposed mixer can perform well in high-temperature and ultralow-power applications. [ABSTRACT FROM AUTHOR]

Fabrication and characterization of AlGaN/GaN HEMT inverters and ring oscillators utilizing integrated enhancement/depletion-mode (E/D-mode) AlGaN/GaN HEMTs are presented. The core technique is a CF4 plasma treatment that can effectively convert a D-mode AlGaN/GaN heterostructure to an E-mode heterostructure. A significant advantage of the plasma-treated E-mode HEMTs is that the gate current is reduced in both reverse- and forward-bias regions due to the effectively enhanced barrier height induced by the negatively charged fluorine ions in the AlGaN barrier. As a result, the input voltage swing is expanded by about 1 V for the E-mode HEMT, enabling convenient input/output logic level matching for multistage logic circuits such as ring oscillators. The fabricated 17-stage direct-coupled field-effect transistor logic ring oscillator using the 1-μm-gate technology can operate properly at a larger supply voltage of 3.5 V, and a minimum propagation delay of 130 ps/stage is achieved. [ABSTRACT FROM AUTHOR]

This paper presents a method with an accurate control of threshold voltages (Vth) of AlGaN/GaN high-electron mobility transistors (HEMTs) using a fluoride-based plasma treatment. Using this method, the Vth of AlGaN/GaN HEMTs can be continuously shifted from 4 V in a conventional depletion-mode (D-mode) AlGaN/GaN HEMT to 0.9 V in an enhancement-mode AlGaN/GaN HEMT. It was found that the plasma-induced damages result in a mobility degradation of two-dimensional electron gas. The damages can be repaired and the mobility can be recovered by a post-gate annealing step at 400 °C. At the same time, the shift in Vth shows a good thermal stability and is not affected by the post-gate annealing. The enhancement-mode HEMTs show a performance (transconductance, cutoff frequencies) comparable to the D-mode HEMTs. Experimental results confirm that the threshold-voltage shift originates from the incorporation of F ions in the AlGaN barrier. In addition, the fluoride-based plasma treatment was also found to be effective in lowering the gate-leakage current, in both forward and reverse bias regions. A physical model of the threshold voltage is proposed to explain the effects of the fluoride-based plasma treatment on AlGaN/GaN HEMTs. [ABSTRACT FROM AUTHOR]

The correlation between the resistivity of an undoped GaN/Al2O3 interfacial layer and in-situ reflectance spectrum in metalorganic chemical vapor deposition and the mechanism of this correlation were investigated. The first minimum reflectance during the initial high-temperature GaN growth was found to be a good indicator of the resistivity of the GaN buffer. The background electron concentration and mobility were both higher in the samples with higher indicative reflectance at that point. The resistivity of the GaN buffer layer was predominantly determined by an ∼0.25-µm-thick layer near the GaN/Al2O3 interface. Atomic force microscope (AFM) and high-resolution x-ray diffraction (HRXRD) results showed that the samples with higher indicative reflectance had smaller sized but higher density nuclei before the high-temperature GaN growth and lower screw threading dislocation (TD) density in the initially grown GaN. The difference in the background electron concentration and mobility of the interfacial layer was related to the relatively higher concentration of the O and Al diffused from Al2O3, which is also dependent on the size and density of the nuclei. These differences were found not to affect the structural and electrical properties or the surface morphology of AlGaN/GaN high electron-mobility transistors (HEMTs, except for the buffer conduction) when the GaN buffer is thick enough (e.g., ∼2.5 µm). [ABSTRACT FROM AUTHOR]

High-frequency and high-temperature dynamic performance of plasma-enhanced atomic layer deposition AlN-passivated enhancement-mode GaN metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) has been investigated under hard switching conditions. Low dynamic ON-resistance ( $R_{{\mathrm{{\scriptscriptstyle ON}}}})$ degradation with small frequency dispersion and weak temperature dependence is obtained. The effectiveness of AlN passivation in suppressing current collapse is proved even under hard switching operations, which, according to other reports of SiNx-passivated devices, could worsen the dynamic $R_{{\mathrm{{\scriptscriptstyle ON}}}}$ degradation due to the trapping of additional hot electrons. [ABSTRACT FROM AUTHOR]

This letter reports a GaN high-electron mobility transistor (HEMT) with reduced current collapse using a multicycle combined plasma-free ozone oxidation and wet surface treatment before Si3N4 passivation. The surface oxide and decomposed layers could be effectively removed and a perfect AlGaN surface is obtained after the treatment. Pulsed $IV$ and RF power measurement indicate that the current collapse is greatly suppressed due to the removal of imperfect surface layer and damage free nature, providing an effective surface treatment method to improve the effect of passivation in GaN HEMT. [ABSTRACT FROM AUTHOR]

In this letter, we report high-performance enhancement-mode (E-mode) Al2O3/AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) fabricated with high-temperature low-damage gate recess technique. The high-temperature gate recess is implemented by increasing the substrate temperature to 180 °C to enhance the desorption of chlorine-based etching residues during the dry etching of AlGaN barrier. High-crystal-quality Al2O3 gate dielectric was grown by atomic-layer deposition using O3 as the oxygen source to suppress hydrogen-induced weak bonds. The fabricated E-mode MIS-HEMTs exhibit a threshold voltage of 1.6 V, a pulsed drive current of 1.13 A/mm, and very low OFF-state standby power of 6.8 \times 10^\mathrm -8 W/mm at V\mathrm {GS} =0 V and V\mathrm {DS} =30 V. At 4 GHz and in pulse-mode operation, the output power density and power-added efficiency were measured to be 5.76 W/mm and 57%, both of which are the highest for GaN-based E-mode MIS-HEMTs reported to date. [ABSTRACT FROM AUTHOR]

In this letter, silicon nitride (SiNx) film deposited at 780 °C by low-pressure chemical vapor deposition (LPCVD) was employed as gate dielectric for GaN-based metal–insulator–semiconductor high-electron-mobility transistors. The LPCVD-SiNx exhibit improved gate dielectric performance than the plasma enhanced chemical vapor deposition-SiNx, including smaller forward and reverse gate leakage, and higher forward gate breakdown voltage. [ABSTRACT FROM AUTHOR]

Al2O3/AlGaN/GaN enhancement-mode metal-isolator-semiconductor high-electron-mobility transistor (MIS-HEMT) featuring a partially recessed (Al) GaN barrier was realized by a fluorine plasma implantation/etch technique. By properly adjusting the RF power driving the fluorine plasma, the fluorine plasma is able to produce two desirable results: 1) a well-controlled slow dry etching for gate recess and 2) implanting fluorine ions into the AlGaN barrier. The fluorine ions become negatively charged in the barrier layer and induce a positive shift in the threshold voltage. The proposed MIS-HEMT exhibits a threshold voltage ( V\mathrm {\mathbf {TH}}) of +0.6 V at a drain current of 10~\mu \textA /mm, a maximum drive current of 730 mA/mm, an ON-resistance of 7.07~\Omega \,\cdot \, mm, and an OFF-state breakdown voltage of 703 V at an OFF-state drain leakage current of 1~\mu \text{A} /mm. From room temperature to 200 °C, the device exhibits a small negative shift of V_{\mathrm {\mathbf {TH}}}$ ( $\sim 0.5$ V) that is attributed to the high-quality dielectric/F-implanted-(Al) GaN interface and the partially recessed barrier. [ABSTRACT FROM AUTHOR]

We report a high-performance normally-off Al2O3/AlN/GaN MOS-channel-high electron mobility transistor (MOSC-HEMT) featuring a monocrystalline AlN interfacial layer inserted between the amorphous Al2O3 gate dielectric and the GaN channel. The AlN interfacial layer effectively blocks oxygen from the GaN surface and prevents the formation of detrimental Ga-O bonds. Frequency-dispersion in C–V characteristics and threshold voltage hysteresis are effectively suppressed, owing to improved interface quality. The new MOSC-HEMTs exhibit a maximum drain current of 660 mA/mm, a field-effect mobility of 165 cm \(^{2}\) /V \(\cdot \) s, a high on/off drain current ratio of \(\sim 10^{10}\) , and low dynamic on-resistance degradation. [ABSTRACT FROM AUTHOR]

This letter reports a 0.2-\mum gate AlGaN/GaN high-electron-mobility transistors (HEMTs) on an Si substrate passivated with an AlN/SiNx (4/20 nm) stack layer. The 4-nm-thick AlN was grown by plasma-enhanced atomic-layer-deposition. The AlN/SiNx-passivated HEMTs exhibit a high maximum drain current of 930 mA/mm, an three-terminal OFF-state breakdown voltage (BVDS) of 119 V, and a small threshold voltage shift of 130 mV in a wide drain bias range (VDS=3-24~V). Owing to the additional positive polarization charge in the AlN passivation layer, the access resistance Rs in the GaN-on-Si HEMTs is significantly reduced while maintaining small parasitic gate-drain capacitance Cgd, contributing to a high power-gain cutoff frequency fMAX of 182 GHz and a high Johnson's figure of merit of BVDS\times f\,T of 6.43\times 10^12~V/s simultaneously. The accuracy of the RF performance is verified by a small signal modeling based on measured S-parameters. [ABSTRACT FROM AUTHOR]

We report an in situ low-damage pre-gate treatment technology in an atomic layer deposition (ALD) system prior to the ALD-Al2O3 deposition, to realize high-quality Al2O3/III\-nitride (III-N) interface. The technology effectively removes the poor quality native oxide on the III-N surface while forming an ultrathin monocrystal-like nitridation interlayer (NIL) between Al2O3 and III-N surface. With the pre-gate treatment technology, high-performance Al2O3(NIL)/GaN/AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors are demonstrated, exhibiting well-behaved electrical characteristics including suppressed gate leakage current, a small subthreshold slope of \sim64~mV/dec, and a small hysteresis of \sim0.09~V. [ABSTRACT FROM AUTHOR]

In this letter, 600-V normally-OFF SiNx/AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistor (MIS-HEMT) is reported. Normally-OFF operation and low OFF-state gate leakage are obtained by using fluorine plasma ion implantation in conjunction with the adoption of a 17-nm SiNx thin film grown by plasma-enhanced chemical vapor deposition as the gate insulator. The normally-OFF MIS-HEMT exhibits a threshold voltage of +3.6~V, a drive current of 430 mA/mm at a gate bias of 14 V, a specific ON-resistance of 2.1 m\Omega\cdotcm^2 and an OFF-state breakdown voltage of 604 V at a drain leakage current of 1 \muA/mm with VGS=0~\rm V, and the substrate grounded. Effective current collapse suppression is obtained by AlN/SiNx passivation as proved by high-speed pulsed I\--V and low-speed high-voltage switching measurement results. [ABSTRACT FROM AUTHOR]

This letter reports a normally-OFF Al2O3/GaN gate-recessed MOSFET using a low-damage digital recess technique featuring multiple cycles of plasma oxidation and wet oxide removal process. The wet etching process eliminates the damage induced by plasma bombardment induced in conventional inductively coupled plasma dry etching process so that good surface morphology and high interface quality could be achieved. The fully recessed Al2O3/GaN MOSFET delivers true enhancement-mode operation with a threshold voltage of +1.7~V. The maximum output current density is 528 mA/mm at a positive gate bias of 8 V. A peak field-effect mobility of 251 cm^2/V\cdots is obtained, indicating high-quality Al2O3/GaN interface. [ABSTRACT FROM AUTHOR]

AlN/GaN heterostructures were realized by growing AlN thin film with low-thermal-budget (300^\circC) plasma-enhanced atomic layer deposition (ALD) on a semi-insulating GaN-on-sapphire template. Thin-film transistors (TFTs) have been successfully fabricated using in situ ALD-grown Al2O3 as the gate dielectric. The proposed TFTs exhibit good gate control with a low subthreshold swing of \sim85~mV/decade and a low-field mobility of \sim27~cm^2/(V\cdot s). This mobility is one order of magnitude higher than that obtained in AlN/GaN heterostructures grown by magnetron sputtering. The enhanced device performance is attributed to a high-quality ALD-AlN/GaN interface obtained by in situ remote-plasma predeposition cleaning and the subsequent epitaxial growth of AlN thin film by plasma-enhanced ALD. [ABSTRACT FROM PUBLISHER]

An effective passivation technique that yields low off-state leakage and low current collapse simultaneously in high-voltage (600-V) AlGaN/GaN high-electron-mobility transistors (HEMTs) is reported in this letter. The passivation structure consists of an AlN/\SiNx stack with 4-nm AlN deposited by plasma-enhanced atomic layer deposition and 50-nm \SiNx deposited by PECVD. The AlN/ \SiNx-passivated HEMTs with a gate–drain distance of 15 \mu\m exhibit a high maximum drain current of 900 mA/mm, a low off-state current of 0.7 \mu\A/mm at VDS = \600\ \V, and a steep subthreshold slope of 63 mV/dec. Compared with the static on-resistance of 1.3 \m\Omega \cdot \cm^2, the dynamic on-resistance after high off-state drain bias stress at 650 V only increases to 2.1 \m\Omega \cdot \cm^2. A high breakdown voltage of 632 V is achieved at a drain leakage current of 1 \mu\A/mm . [ABSTRACT FROM PUBLISHER]

We demonstrate high-voltage depletion-mode and enhancement-mode (E-mode) AlGaN/GaN high-electron-mobility transistors (HEMTs) on a GaN-on-silicon-on-insulator (SOI) platform. The GaN-on-SOI wafer features GaN epilayers grown by metal–organic chemical vapor deposition on a p-type (111) Si SOI substrate with a p-type (100) Si handle wafer. Micro-Raman spectroscopy significantly reveals reduced stress in the GaN epilayers, which is a result expected from the compliant SOI substrate. E-mode HEMTs fabricated by fluorine plasma implantation technique deliver high on/off current ratio (\10^8-\10^9), large breakdown voltage (1471 V with floating substrate), and low on-resistance (3.92 \m\Omega\cdot \cm^2). [ABSTRACT FROM PUBLISHER]

The physical mechanism of passivation of AlGaN/GaN HEMTs by AlN thin film prepared with plasma-enhanced atomic layer deposition (PEALD) is investigated by characterizing \Ni- \Al2\O3/\AlN-\GaN/\AlGaN/\GaN metal–insulator–semiconductor (MIS) diodes. The dielectric stack \Al2\O3/\AlN (13/2 nm) exhibits similar capability in suppressing the current collapse in AlGaN/GaN HEMTs as the 4-nm PEALD-AlN thin film used in our previous work but delivers much lower vertical leakage to facilitate the capacitance–voltage characterizations. Exceptionally large negative bias ( < -\8\ \V) is required to deplete the 2-D electron gas in the MIS diode's C– V measurement. By virtue of quasi-static C–V characterization, it is revealed that positive fixed charges of \sim\3.2 \times \10^13\ \e/\cm^2 are introduced by the PEALD-AlN. The positive fixed charges are suggested to be polarization charges in the monocrystal-like PEALD-AlN. They can effectively compensate the high-density slow-response acceptor-like interface traps, resulting in effective suppression of current collapse. [ABSTRACT FROM PUBLISHER]

On a GaN smart power integrated-circuit platform, a monolithically integrated gate-protected high-voltage AlGaN/GaN enhancement-/depletion-mode high-electron mobility transistor (HEMT) has been proposed. It can sustain large input gate voltage swing (> 20 V) with enhanced safety (no gate failure observed) and improved reliability (no observable shifting of the threshold voltage), and the breakdown voltage is not sacrificed. Such a protection scheme with a wide input gate bias range also facilitates simple and reliable connections between the gate driver circuits and the power switches without the level shifter circuits for conventional GaN Schottky gate power HEMTs. [ABSTRACT FROM AUTHOR]

Vertical leakage/breakdown mechanisms in AlGaN/GaN high-electron-mobility transistors grown on low-resistivity p-type (111) Si substrate are studied by temperature-dependent current–voltage (I–V) measurements. It is found that the top-to-substrate vertical breakdown voltage (BV) is dominated by the space-charge-limited current conduction involving both acceptor and donor traps in the GaN buffer/transition layer. From the temperature-dependent transient backgating measurements, the acceptor level at EV + \543\ \meV and the donor level at EC-616 meV were identified. [ABSTRACT FROM AUTHOR]

A high-\kappa\ \LaLuO3 (LLO) thin film is successfully incorporated into AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MISHEMTs) as the gate dielectric. The LLO–AlGaN/GaN MISHEMTs fabricated with a planar process exhibit a high ION/IOFF of \10^9, a maximum drain current of 820 mA/mm at VGS = 3\ \V, a peak transconductance (Gm) of \sim192 mS/mm, and a steep subthreshold slope (SS) of \sim73 mV/dec. [ABSTRACT FROM PUBLISHER]

An effective passivation technique for AlGaN/GaN high-electron-mobility transistors (HEMTs) is presented. This technique features an AlN thin film grown by plasma-enhanced atomic layer deposition (PEALD). With in situ remote plasma pretreatments prior to the AlN deposition, an atomically sharp interface between ALD-AlN and III-nitride has been obtained. Significant current collapse suppression and dynamic ON-resistance reduction are demonstrated in the ALD-AlN-passivated AlGaN/GaN HEMTs under high-drain-bias switching conditions. [ABSTRACT FROM AUTHOR]

In this letter, enhancement-mode (E-mode) AlGaN/GaN high electron mobility transistors (HEMTs) were demonstrated based on lateral scaling of the 2-D electron gas channel using nanochannel array (NCA) structure. The NCA structure consists of multiple parallel channels with nanoscale width defined by electron-beam lithography and dry etching. Because of the improved gate control from the channel sidewalls and partially relaxed piezoelectric polarization, the fabricated 2 \mu\m-gate-length NCA-HEMT with a nanochannel width of 64 nm showed a threshold voltage of +0.6 V and a higher extrinsic transconductance of 123 mS/mm, compared to -1.6 V and 106 mS/mm for the conventional HEMT with \mu \m-scale channel width. The scaling of threshold voltages, peak transconductance, and gate leakage as a function of the nanochannel width were investigated. Small-signal RF performance of NCA-HEMTs were characterized for the first time and compared with those of conventional HEMTs. [ABSTRACT FROM AUTHOR]

In this letter, we present the deployment of Schottky source/drain (SSD) in InAlN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MISHEMTs) for off-state breakdown voltage improvement. The improved breakdown voltage relies on the suppression of electron injection into the buffer under the Schottky source contact. A VBD of 460 V is obtained in an SSD MISHEMT with an LGD = \10\ \mu\m, at a 170% improvement compared with that of the control MISHEMT featuring ohmic source/drain. Despite the SSD contacts, an SSD MISHEMT with a gate length of 1 \mu\m exhibits a respectable drain current density of 416 mA/mm and a transconductance of 113 mS/mm. [ABSTRACT FROM PUBLISHER]

The Schottky-source forward current–voltage characteristics were measured and analyzed in a recently reported AlGaN/GaN metal–2-D-electron-gas tunnel junction field-effect transistor (FET) (TJ-FET) in order to characterize the effective Schottky barrier height (SBH) and its gate bias dependence. The SBHs were extracted and found to be gate bias dependent, varying from 0.57 eV at VGS = - \0.5\ \V to 0.3 eV at VGS = \1\ \V. This gate-induced Schottky barrier lowering (SBL) effect is explained by the image-charge effect. A 2-D device simulation is carried out to analyze the SBL effect and is shown to be in good agreement with the experiment results. The larger SBH at lower gate voltage enables off -state blocking, while the lower SBH at higher gate voltage leads to high on -state current driving capability in the AlGaN/GaN TJ-FETs. [ABSTRACT FROM PUBLISHER]

Kink effects are studied in conventional AlGaN/GaN high-electron-mobility transistors by measuring their current-voltage characteristics with various bias sweeping conditions at drain and gate terminals. It is found that the kink effect is induced by drain and gate pumping. The magnitude of kink is directly related to the maximum drain voltage and current levels during on-state operation. The hot electrons in the 2-D electron gas channel generated under high drain bias could be injected into the adjacent epitaxial buffer layer where they can be captured by donor-like traps. Hot electron trapping and the subsequent field-assisted de-trapping is suggested to be the dominant mechanism of kink generation in the studied device. The extracted activation energy of the traps accounting for the kink effect is 589 \pm 67 meV from temperature-dependent transient measurement, and is close to the energy of the E2 trap widely reported in GaN layers. [ABSTRACT FROM AUTHOR]

We present the first AlGaN/GaN tunnel-junction FETs (TJ-FETs) featuring a metal–2-D-electron-gas (2DEG) Schottky tunnel junction at the source. The control of the source-to-drain current flow is realized through a gate-controlled tunnel junction instead of a gate-controlled 2DEG channel. The TJ-FETs exhibit normally off operation (Vth = +\1.35\ \V) in an otherwise normally on as-grown sample. The unique high-density 2DEG in AlGaN/GaN heterostructures enables the formation of a Schottky tunnel barrier with nanometer-scale barrier thickness even with a large Schottky barrier height (e.g., \sim0.8 eV). In the off state, the source Schottky junction provides natural reverse-blocking capability, resulting in significant leakage reduction and low off-state current. A drive current of 326 mA/mm, a high ION/IOFF ratio (\10^10), and a low subthreshold swing (89 mV/dec) are obtained. [ABSTRACT FROM PUBLISHER]

A high-performance bootstrapped comparator operating with a single-polarity power supply is demonstrated for GaN high-temperature electronics applications. The comparator features monolithically integrated enhancement-mode (E-mode) and depletion-mode (D-mode) AlGaN/GaN HEMTs. The tail current source uses an E-mode HEMT, enabling single-polarity power supply. The E-mode input stage could cover a wide voltage comparison range (from 1 to 6 V) while the bootstrapped loads are implemented with D-mode HEMTs. At room temperature, the comparator delivers a voltage gain as high as 79 V/V and a unity-gain bandwidth of 206 MHz. At 250 ^ \circ\C, a maximum voltage gain of 40 V/V and a unity-gain bandwidth of 84 MHz are obtained. [ABSTRACT FROM AUTHOR]

Enhancement-mode (E-mode) AlGaN/GaN heterojunction field effect transistors (HFETs) with a nominal gate length of 0.35 \mu\m are fabricated on a SiC substrate by fluorine plasma ion implantation without the use of gate recess. The threshold voltage is measured to be +0.2 V by linear extrapolation from the transfer characteristics. The E-mode device exhibits a saturation drain current density of 735 mA/mm at a gate bias of 4 V, a peak transconductance of 269 mS/mm, a current-gain cutoff frequency (fT) of 39 GHz, and a maximum oscillation frequency (f\max) of 91 GHz. At 18 GHz, the fabricated E-mode device exhibits a maximum output power density of 3.65 W/mm, a linear gain of 11.6 dB, and a peak power-added efficiency of 42%. This is the first report of the large-signal performance of AlGaN/GaN E-mode HFETs in the Ku-band. [ABSTRACT FROM AUTHOR]